CN206412339U - 一种背面增强散热性能的无基岛封装结构 - Google Patents

一种背面增强散热性能的无基岛封装结构 Download PDF

Info

Publication number
CN206412339U
CN206412339U CN201621464381.XU CN201621464381U CN206412339U CN 206412339 U CN206412339 U CN 206412339U CN 201621464381 U CN201621464381 U CN 201621464381U CN 206412339 U CN206412339 U CN 206412339U
Authority
CN
China
Prior art keywords
island
free
window type
chip
type island
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201621464381.XU
Other languages
English (en)
Inventor
朱仲明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JCET Group Co Ltd
Original Assignee
Jiangsu Changjiang Electronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jiangsu Changjiang Electronics Technology Co Ltd filed Critical Jiangsu Changjiang Electronics Technology Co Ltd
Priority to CN201621464381.XU priority Critical patent/CN206412339U/zh
Application granted granted Critical
Publication of CN206412339U publication Critical patent/CN206412339U/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

本实用新型涉及一种背面增强散热性能的无基岛封装结构,它包括开窗型无基岛基板(1),所述开窗型无基岛基板(1)上方设置有芯片(3),所述芯片(3)正面通过电性连接部(2)连接至开窗型无基岛基板(1),所述电性连接部(2)和芯片(3)外围包封有塑封料(4),所述芯片(3)下表面、开窗型无基岛基板(1)的开窗侧壁以及临近开窗部分的下表面通过导热胶(5)贴装有透气金属(6),所述开窗型无基岛基板(1)底部设置有锡球(8)。本实用新型透气金属为透气散热,可以增加与空气热传递的面积,提升产品散热性能,并且可保护芯片,避免芯片受外物碰触而影响产品质量。

Description

一种背面增强散热性能的无基岛封装结构
技术领域
本实用新型涉及一种背面增强散热性能的无基岛封装结构,具体是涉及一种通过透气金属与基板(框架)和电性连接部贴合增强散热性能的封装结构,属于半导体封装技术领域。
背景技术
现有的开窗型基板的封装结构,可以使芯片非作用面暴露于基板的开窗处,以此提升散热效果。但是,由于芯片非作用面暴露于外界,在封装测试过程中容易被碰触到而造成产品质量异常的问题。
实用新型内容
本实用新型所要解决的技术问题是针对上述现有技术提供一种背面增强散热性能的无基岛封装结构,它能够保护芯片的同时,能够增强散热效果。
本实用新型解决上述问题所采用的技术方案为:一种背面增强散热性能的无基岛封装结构,它包括开窗型无基岛基板,所述开窗型无基岛基板上方设置有芯片,所述芯片正面通过电性连接部连接至开窗型无基岛基板,所述开窗型无基岛基板上方、电性连接部和芯片外围包封有塑封料,所述芯片下表面、开窗型无基岛基板的开窗侧壁以及临近开窗部分的下表面通过导热胶贴装有透气金属,所述开窗型无基岛基板底部设置有锡球。
所述开窗型无基岛基板采用无基岛框架替代。
所述透气金属是由金属微小颗粒(金属粉末)经高温烧结而成,透气金属内部各个方向都布满极微小细孔。
所述透气金属是由陶瓷粉末与金属粉末所构成的复合材料,由其各分子的组合排布,构成材料与材料间的间隙。
所述透气金属的最小厚度为0.3mm。
所述透气金属与导热胶之间可设置导热膜。
所述导热膜的厚度在0.1~1mm之间。
与现有技术相比,本实用新型的优点在于:
1、本实用新型透气金属贴装在芯片下表面、开窗型无基岛基板的开窗侧壁以及临近开窗部分的下表面,可以保护芯片,避免芯片受外物碰触而影响产品质量;
2、本实用新型透气金属为透气散热,增加与空气热传递的面积,增加其散热效果;
3、透气金属是由金属粉末烧结而成,因烧结工艺形成的凹凸表面可以增加透气金属与基板(框架)的结合能力。
附图说明
图1为本实用新型一种背面增强散热性能的无基岛封装结构的示意图。
图2为本实用新型另一种背面增强散热性能的无基岛封装结构的示意图。
其中:
开窗型无基岛基板1
电性连接部2
芯片3
塑封料4
导热胶5
透气金属6
导热膜7
锡球8。
具体实施方式
以下结合附图实施例对本实用新型作进一步详细描述。
实施例一:
如图1所示,本实施例中的一种背面增强散热性能的无基岛封装结构,它包括开窗型无基岛基板1,所述开窗型无基岛基板1上方设置有芯片3,所述芯片3正面通过电性连接部2连接至开窗型无基岛基板1,所述开窗型无基岛基板1上方、电性连接部2和芯片3外围包封有塑封料4,所述芯片3下表面、开窗型无基岛基板1的开窗侧壁以及临近开窗部分的下表面通过导热胶5贴装有透气金属6,所述开窗型无基岛基板1底部设置有锡球8,所述锡球8位于透气金属6外侧;
所述透气金属6用于加快封装体内部的散热所用;
所述开窗型无基岛基板1也可以是无基岛框架;
所述透气金属6是由金属微小颗粒(俗称粉末)经高温烧结而成,透气金属6内部各个方向都布满极微小细孔;
所述透气金属6是由陶瓷粉末与金属粉末所构成的复合材料,由其各分子的组合排布,构成材料与材料间的间隙;
所述透气金属6的外形并不限制为平板样式;
所述透气金属6的安装位置不限于封装产品的一侧;
所述透气金属6的厚度不是定值,可按需求定制,最小厚度为0.3mm。
实施例二:
如图2所示,实施例2与实施例1的区别在于:所述透气金属6与导热胶5之间设置导热膜7,以防止导热胶渗入透气金属6将一定厚度层次的透气孔堵塞减少透气金属6的与空气的接触面积,从而减低其透气性从而减缓散热效果,其导热膜7的厚度非常薄,尺寸定义:0.1~1mm之间,太厚的导热膜7将阻隔传热,达不到更有效的散热效果。
所述封装结构不限于仅WB或者FC形式的封装产品。
除上述实施例外,本实用新型还包括有其他实施方式,凡采用等同变换或者等效替换方式形成的技术方案,均应落入本实用新型权利要求的保护范围之内。

Claims (6)

1.一种背面增强散热性能的无基岛封装结构,其特征在于:它包括开窗型无基岛基板(1),所述开窗型无基岛基板(1)上方设置有芯片(3),所述芯片(3)正面通过电性连接部(2)连接至开窗型无基岛基板(1),所述开窗型无基岛基板(1)上方、电性连接部(2)和芯片(3)外围包封有塑封料(4),所述芯片(3)下表面、开窗型无基岛基板(1)的开窗侧壁以及临近开窗部分的下表面通过导热胶(5)贴装有透气金属(6),所述开窗型无基岛基板(1)底部设置有锡球(8)。
2.根据权利要求1所述的一种背面增强散热性能的无基岛封装结构,其特征在于:所述开窗型无基岛基板(1)采用无基岛框架替代。
3.根据权利要求1所述的一种背面增强散热性能的无基岛封装结构,其特征在于:所述透气金属(6)是由金属微小颗粒经高温烧结而成,透气金属(6)内部各个方向都布满极微小细孔。
4.根据权利要求1所述的一种背面增强散热性能的无基岛封装结构,其特征在于:所述透气金属(6)的最小厚度为0.3mm。
5.根据权利要求1所述的一种背面增强散热性能的无基岛封装结构,其特征在于:所述透气金属(6)与导热胶(5)之间可设置导热膜(7)。
6.根据权利要求5所述的一种背面增强散热性能的无基岛封装结构,其特征在于:
所述导热膜(7)的厚度在0.1~1mm之间。
CN201621464381.XU 2016-12-29 2016-12-29 一种背面增强散热性能的无基岛封装结构 Active CN206412339U (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201621464381.XU CN206412339U (zh) 2016-12-29 2016-12-29 一种背面增强散热性能的无基岛封装结构

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201621464381.XU CN206412339U (zh) 2016-12-29 2016-12-29 一种背面增强散热性能的无基岛封装结构

Publications (1)

Publication Number Publication Date
CN206412339U true CN206412339U (zh) 2017-08-15

Family

ID=59553365

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201621464381.XU Active CN206412339U (zh) 2016-12-29 2016-12-29 一种背面增强散热性能的无基岛封装结构

Country Status (1)

Country Link
CN (1) CN206412339U (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112420635A (zh) * 2020-11-09 2021-02-26 太极半导体(苏州)有限公司 一种cf存储卡的一体化散热结构

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112420635A (zh) * 2020-11-09 2021-02-26 太极半导体(苏州)有限公司 一种cf存储卡的一体化散热结构

Similar Documents

Publication Publication Date Title
CN204720447U (zh) 一种凹槽基板的电磁屏蔽模组封装结构
CN205177839U (zh) 一种气密型陶瓷封装的系统级封装电路
CN206412339U (zh) 一种背面增强散热性能的无基岛封装结构
CN204204829U (zh) 系统级封装用超大腔体陶瓷针栅阵列外壳
CN103928409B (zh) 一种集成电路倒扣焊气密性封装结构
CN206022344U (zh) 一种小间距四边引脚的mcp陶瓷外壳
CN206225350U (zh) 一种芯片封装结构
CN209000903U (zh) 一种空腔结构的rf射频产品封装结构
CN202818243U (zh) 一种倒装焊封装的多声表裸芯片模块
CN209000897U (zh) 一种芯片用耐高温吸嘴装置
CN206401309U (zh) 一种增强散热性能的封装结构
CN105990298A (zh) 一种芯片封装结构及其制备方法
WO2016015595A1 (zh) 一种复合电极热敏芯片
CN206505948U (zh) 一种高防潮性的片式led器件及其显示屏
CN205845941U (zh) Pip封装结构
CN205873892U (zh) 一体化吸气型陶瓷封装管壳
TW200824063A (en) Package assembly whose spacer has through hole
CN206610801U (zh) 一种集成电路封装体
CN203812872U (zh) 双列直插封装的框架
CN207602545U (zh) 一种倒装芯片式滤波器封装结构
CN206697450U (zh) 适用于功率mos的新型塑封结构
CN105280779A (zh) 一种led封装结构
CN106098632B (zh) 一种结构改良的集成电路封装
CN206412354U (zh) 一种背面增强散热性能的有基岛封装结构
CN202384327U (zh) 小体积芯片封装结构

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant