CN205959994U - Heterojunction solar cell of single face polishing - Google Patents
Heterojunction solar cell of single face polishing Download PDFInfo
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- CN205959994U CN205959994U CN201620789531.8U CN201620789531U CN205959994U CN 205959994 U CN205959994 U CN 205959994U CN 201620789531 U CN201620789531 U CN 201620789531U CN 205959994 U CN205959994 U CN 205959994U
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- sided polishing
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
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Abstract
The utility model discloses a heterojunction solar cell of single face polishing, it includes: N type single face polished silicon slice, establish at the intrinsic amorphous silicon layer of N type single face polished silicon slice sensitive surface with the face of being shaded, establish the N type doping amorphous silicon layer on N type single face polished silicon slice sensitive surface intrinsic amorphous silicon layer, establish the P type doping amorphous silicon layer on N type single face polished silicon slice is shaded face intrinsic amorphous silicon layer, establish the transparent conducting film layer on N type doping amorphous silicon layer and P type doping amorphous silicon layer respectively, establish the metal gate line electrode on N type doping amorphous silicon layer's transparent conducting film layer, establish on N type doping amorphous silicon layer's transparent conducting film layer, the mgF2 layer between the metal gate line electrode, establish the metal reflection layer on P type doping amorphous silicon layer's transparent conducting film layer, establish the metal gate line electrode on metal reflection layer. The utility model discloses be favorable to controlling the thick and homogeneity of the sedimentary membrane of amorphous silicon thin film, make the PN junction more level and more smooth, improved the electricity performance of battery piece.
Description
Technical field
The utility model is related to crystal silicon solar energy battery field, more particularly, to a kind of heterojunction solar of single-sided polishing
Battery.
Background technology
Monocrystalline hetero-junction solar cell piece surface generally forms positive pyramidal suede structure, and this pyramid-like exists sharp
Pyramid pinnacle of a pagoda, in heterojunction solar battery piece PN junction manufacturing process, the amorphous silicon layer that surface is formed only has several nanometers to arrive
Tens nanometers it is therefore desirable to round and smooth process is carried out to silicon chip surface pyramid pinnacle of a pagoda, to improve the one-tenth on surface for the amorphous silicon membrane
Film uniformity.But mellow and fullization processes on the one hand due to pyramidal uniformity difference, and process control is difficult, increased technique
Complexity, brings challenge to CVD plated film thickness and uniformity；After round and smooth process, silicon chip reflectivity has not matte simultaneously
With the rising of degree, lose a part of sunshine.Further, since monocrystalline hetero-junction solar cell sheet is main trend, silicon chip is got over
Thin, the sunshine being perforated through silicon chip is also more, and the short circuit current of battery has different degrees of loss, thus causing cell piece
The decline of conversion efficiency.
Utility model content
The purpose of this utility model is to overcome the defect of prior art, provides a kind of heterojunction solar of single-sided polishing
Battery, it is conducive to controlling thickness and the uniformity of amorphous silicon membrane deposition, makes PN junction more smooth, increased light in silicon chip
Absorption, improve the electric property of cell piece.
For achieving the above object, the utility model adopts following design：
A kind of heterojunction solar battery of single-sided polishing, it includes：
N-type single-sided polishing silicon chip；
It is located at the intrinsic amorphous silicon layer of N-type single-sided polishing silicon chip sensitive surface and shady face；
It is located at the n-type doping amorphous silicon layer in N-type single-sided polishing silicon chip sensitive surface intrinsic amorphous silicon layer；
It is located at the p-type doped amorphous silicon layer in N-type single-sided polishing silicon chip shady face intrinsic amorphous silicon layer；
It is respectively provided at the transparent conductive film layer on n-type doping amorphous silicon layer and p-type doped amorphous silicon layer；
It is located at the metal grid lines electrode on the transparent conductive film layer of n-type doping amorphous silicon layer；
It is located at the MgF on the transparent conductive film layer of n-type doping amorphous silicon layer, between metal grid lines electrode2Layer；
It is located at the metallic reflective layer on the transparent conductive film layer of p-type doped amorphous silicon layer；
It is located at the metal grid lines electrode on metallic reflective layer.
Preferably, described intrinsic amorphous silicon layer thickness is 1-20nm.
Preferably, described transparent conductive film layer is ITO or zinc oxide film, and its thickness is 60-120nm.
Preferably, described MgF2Thickness degree is 80-200nm.
Preferably, described metallic reflective layer is Ag or Al layer, and thickness is 500-2000nm.
The utility model adopts above technical scheme, by employing the N-type single-sided polishing silicon chip in single-sided polishing face, its throwing
Light face and P-type non-crystalline silicon film constitute PN junction, are conducive to controlling thickness and the uniformity of amorphous silicon membrane deposition, make PN junction more
Smooth；In addition the matte of N-type single-sided polishing silicon chip sensitive surface, transparent conductive film layer, MgF2Layer and metal reflective define layer by layer
Very excellent light trapping structure, increased absorption in silicon chip for the light, improves the electric property of cell piece.
Brief description
Below in conjunction with the accompanying drawings the utility model is further described
Fig. 1 is a kind of heterojunction solar battery structural representation of single-sided polishing of the utility model.
Specific embodiment
In order that the purpose of this utility model, technical scheme and advantage become more apparent, below in conjunction with accompanying drawing and enforcement
Example, is further elaborated to the utility model.It should be appreciated that specific embodiment described herein is only in order to explain
The utility model, is not used to limit the utility model.
As shown in figure 1, the utility model discloses a kind of heterojunction solar battery of single-sided polishing, it includes：
N-type single-sided polishing silicon chip 1；
It is located at the intrinsic amorphous silicon layer 2,3 of N-type single-sided polishing silicon chip 1 sensitive surface and shady face；
It is located at the n-type doping amorphous silicon layer 4 in N-type single-sided polishing silicon chip 1 sensitive surface intrinsic amorphous silicon layer 2；
It is located at the p-type doped amorphous silicon layer 5 in N-type single-sided polishing silicon chip 1 shady face intrinsic amorphous silicon layer 3；
It is respectively provided at the transparent conductive film layer 6,7 on n-type doping amorphous silicon layer 4 and p-type doped amorphous silicon layer 5；
It is located at the metal grid lines electrode 10 on the transparent conductive film layer 6 of n-type doping amorphous silicon layer 4；
It is located at the MgF on the transparent conductive film layer 6 of n-type doping amorphous silicon layer 4, between metal grid lines electrode 102Layer 8；
It is located at the metallic reflective layer 9 on the transparent conductive film layer 7 of p-type doped amorphous silicon layer 5；
It is located at the metal grid lines electrode 11 on metallic reflective layer 9.
Wherein, described intrinsic amorphous silicon layer 2,3 thickness are 1-20nm；Described P-type non-crystalline silicon layer 5 and N-type non-crystalline silicon layer 4 are thick
Spend for 1-30nm；Described transparent conductive film layer 6,7 is ITO or zinc oxide film, and its thickness is 60-120nm；Described MgF2Layer 8
Thickness is 80-200nm；Described metallic reflective layer 9 is Ag or Al layer, and thickness is 500-2000nm.
Wherein, the burnishing surface of the type single-sided polishing silicon chip of N described in the utility model can be using alkalescence or acid solution
Etch polishing is formed, and making herbs into wool face is that alkali lye making herbs into wool is formed again after burnishing surface single sided deposition protective film, and described protective film is permissible
It is silica membrane, alkaline solution is one kind of NaOH or KOH solution；Acid solution is that HF acid is molten with the mixing of HNO3 acid
Liquid.The utility model is by employing the N-type single-sided polishing silicon chip in single-sided polishing face, its burnishing surface and P-type non-crystalline silicon film structure
Become PN junction, be conducive to controlling thickness and the uniformity of amorphous silicon membrane deposition, make PN junction more smooth；In addition N-type single-sided polishing
The matte of silicon chip sensitive surface, transparent conductive film layer, MgF2Layer and metallic reflective layer define very excellent light trapping structure, increase
Absorption in silicon chip for the light, improves the electric property of cell piece.
The foregoing is only preferred embodiment of the present utility model, not in order to limit the utility model, all this
Any modification, equivalent and improvement made within the spirit of utility model and principle etc., should be included in the utility model
Protection domain within.
Claims (5)
1. a kind of heterojunction solar battery of single-sided polishing is it is characterised in that include：
N-type single-sided polishing silicon chip；
It is located at the intrinsic amorphous silicon layer of N-type single-sided polishing silicon chip sensitive surface and shady face；
It is located at the n-type doping amorphous silicon layer in N-type single-sided polishing silicon chip sensitive surface intrinsic amorphous silicon layer；
It is located at the p-type doped amorphous silicon layer in N-type single-sided polishing silicon chip shady face intrinsic amorphous silicon layer；
It is respectively provided at the transparent conductive film layer on n-type doping amorphous silicon layer and p-type doped amorphous silicon layer；
It is located at the metal grid lines electrode on the transparent conductive film layer of n-type doping amorphous silicon layer；
It is located at the MgF on the transparent conductive film layer of n-type doping amorphous silicon layer, between metal grid lines electrode2Layer；
It is located at the metallic reflective layer on the transparent conductive film layer of p-type doped amorphous silicon layer；
It is located at the metal grid lines electrode on metallic reflective layer.
2. single-sided polishing according to claim 1 heterojunction solar battery it is characterised in that：Described intrinsic amorphous silicon
Thickness degree is 1-20nm.
3. single-sided polishing according to claim 1 heterojunction solar battery it is characterised in that：Described nesa coating
Layer is ITO or zinc oxide film, and its thickness is 60-120nm.
4. single-sided polishing according to claim 1 heterojunction solar battery it is characterised in that：Described MgF2Thickness degree
For 80-200nm.
5. single-sided polishing according to claim 1 heterojunction solar battery it is characterised in that：Described metallic reflective layer
For Ag or Al layer, thickness is 500-2000nm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620789531.8U CN205959994U (en) | 2016-07-26 | 2016-07-26 | Heterojunction solar cell of single face polishing |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620789531.8U CN205959994U (en) | 2016-07-26 | 2016-07-26 | Heterojunction solar cell of single face polishing |
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| Publication Number | Publication Date |
|---|---|
| CN205959994U true CN205959994U (en) | 2017-02-15 |
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| CN201620789531.8U Active CN205959994U (en) | 2016-07-26 | 2016-07-26 | Heterojunction solar cell of single face polishing |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113140640A (en) * | 2021-04-16 | 2021-07-20 | 中国科学院上海微系统与信息技术研究所 | Efficient back reflection crystalline silicon heterojunction solar cell and preparation method thereof |
| CN113363349A (en) * | 2021-01-14 | 2021-09-07 | 宣城睿晖宣晟企业管理中心合伙企业(有限合伙) | Preparation method of heterojunction battery and heterojunction battery |
| CN114300565A (en) * | 2020-09-22 | 2022-04-08 | 嘉兴阿特斯技术研究院有限公司 | Heterojunction solar cell |
-
2016
- 2016-07-26 CN CN201620789531.8U patent/CN205959994U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114300565A (en) * | 2020-09-22 | 2022-04-08 | 嘉兴阿特斯技术研究院有限公司 | Heterojunction solar cell |
| CN113363349A (en) * | 2021-01-14 | 2021-09-07 | 宣城睿晖宣晟企业管理中心合伙企业(有限合伙) | Preparation method of heterojunction battery and heterojunction battery |
| CN113140640A (en) * | 2021-04-16 | 2021-07-20 | 中国科学院上海微系统与信息技术研究所 | Efficient back reflection crystalline silicon heterojunction solar cell and preparation method thereof |
| CN113140640B (en) * | 2021-04-16 | 2022-11-29 | 中国科学院上海微系统与信息技术研究所 | Efficient back reflection crystalline silicon heterojunction solar cell and preparation method thereof |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20211130 Address after: No.17, Quanyuan Road, Jinjiang Economic Development Zone (wuliyuan), Quanzhou City, Fujian Province, 362000 Patentee after: FUJIAN JINSHI ENERGY Co.,Ltd. Address before: 362000 Jiangnan hi tech Zone, South Ring Road, Licheng District, Fujian, Quanzhou Patentee before: GS-SOLAR (FU JIAN) Co.,Ltd. |
|
| TR01 | Transfer of patent right |