CN205861854U - Circuit and power management chip are tested in trimming of a kind of power management chip - Google Patents

Circuit and power management chip are tested in trimming of a kind of power management chip Download PDF

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Publication number
CN205861854U
CN205861854U CN201620871588.2U CN201620871588U CN205861854U CN 205861854 U CN205861854 U CN 205861854U CN 201620871588 U CN201620871588 U CN 201620871588U CN 205861854 U CN205861854 U CN 205861854U
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China
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circuit
signal
power management
test
trim
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CN201620871588.2U
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魏汝新
唐沛寅
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Hanxin Microelectronics (Wuxi) Co., Ltd
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Shanghai Bao Bao Microelectronics Co Ltd
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Abstract

The utility model proposes a kind of power management chip trims test circuit and power management chip.Foregoing circuit is used for trimming the finished chip after encapsulation, including: data transmission module, control module and feedback unit.Data transmission module and the first pin connect, and use asynchronous logic transmission pulse triggering signal of input at the first pin.Control module is connected with data transmission module, receive pulse triggering signal, and control the read-write of fuse read-write cell on power management chip, wherein, foregoing circuit also includes the feedback unit being connected with control module, and the signal after circuit can be trimmed by feedback unit feeds back to the first pin output.Trim test circuit by use power management chip of the present utility model, the key index of finished chip after encapsulation can be tested and adjusting, and and the earth saved cost.

Description

Circuit and power management chip are tested in trimming of a kind of power management chip
Technical field
This utility model relates to power management chip technical field, and particularly relate to a kind of power management chip trims test Circuit and power management chip.
Background technology
At present, a lot of power management chips are required for by the way of trimming improving the performance of product and with relatively low Cost extended products.Traditional chip trims mode, increases and trims pad, in middle survey stage of chip to chip on chip Performance be adjusted, then, just carry out the encapsulation of chip.Owing to the crystal circle structure manufacturing chip can be caused certain by encapsulation Impact, is easily caused between the parameter of the chip finished product after encapsulation, and chip parameter during middle survey and there is deviation, cause yield Loss.Meanwhile, chip finished product cannot be adjusted by traditional mode that trims again, therefore, can cause the pressure produced on stock.
Traditional method is to use the bigger pad of area as the physical contact of probe, blows selected fuse, or Use the digital circuit of complexity, control the state of fuse.But, such scheme is substantially more expensive, and cannot realize encapsulation after Trim.In prior art, it is also possible to realize in the finished product stage, chip being trimmed, but often bring significantly going up of cost Rising, actually used value is the highest.It addition, the product special to some, the most only device of three pins, these schemes also without Can be power.
Utility model content
One to be solved in the utility model technical problem is that, reduces testing cost.In order to solve above-mentioned technical problem, According to an aspect of the present utility model, it is provided that a kind of power management chip trim test circuit, including: data transmission mould Block, control module and feedback unit.Data transmission module and the first pin connect, and use asynchronous logic to transmit at the first pin The pulse triggering signal of input.Control module is connected with data transmission module, receives pulse triggering signal, and controls power management The read-write of the fuse read-write cell on chip.Wherein, foregoing circuit also includes the feedback unit being connected with control module, feedback Signal after circuit can be trimmed by unit feeds back to the first pin output.
Preferably, circuit also includes the packet decoding unit being connected with data transmission module.Data decoding unit connects Receive pulse triggering signal and be grouped and be decoded as testing signal accordingly and/or trimming signal.
Preferably, control module includes the test pattern controller being sequentially connected in series and trims mode controller.Test pattern Controller receives test signal, correspondingly tests circuit;Trim mode controller reception and trim signal, control fuse and read The read-write of r/w cell.
Preferably, test pattern controller and trim mode controller and be all connected with feedback unit, and pass through feedback unit Export test information with the first pin and/or trim information.
Preferably, foregoing circuit also include being connected to described in trim mode controller trim pattern definition unit, described Trim pattern definition unit to preset and trim pattern information.
Preferably, circuit also includes the test pattern judge module being connected with the first pin, and test pattern judge module is used In judging whether pulse triggering signal meets test request to enter test pattern.
Preferably, circuit also includes the second pin being connected with fuse read-write cell, and the second pin is used for will be after trimming Signal be connected to internal circuit.
Preferably, feedback unit includes interconnective data router and/or multiplexer.
Preferably, the read-write of the fuse on control power management chip, for by controlling metal-oxide semiconductor (MOS) crystal The conducting of pipe, and then control whether fuse is forever blown, to adjust the height of the level of output in circuit.
According to another aspect of the present utility model, additionally provide and have employed the above-mentioned power management trimming test circuit Chip.
The utility model has the advantage of: (1), in the case of avoiding using pad, by optimizing circuit, specifically leads to Cross employing pin multiplexing, signal feedback, data serial transmission and packet decoding etc., it is achieved that to the finished chip after encapsulation Key index carry out testing and adjusting, and the earth saved cost.(2) pattern definition unit is trimmed owing to have employed, permissible Easily the quantity of required circuit characteristic parameter is made an amendment.Such as trim reference voltage, reference current and benchmark at needs During clock, three can be preset and trim pattern;And when having only to revise reference voltage, one can be preset and trim pattern, because of The favorable expandability of this circuit.(3) test function is comprehensive, except controlling certain amount of trimming, it is also possible to carry out a lot of simple Test function.
Accompanying drawing explanation
Hereinafter based on embodiment reference accompanying drawing, this utility model will be described in more detail.Wherein:
In order to be illustrated more clearly that embodiment of the present utility model or technical scheme of the prior art, below will be to enforcement In example or description of the prior art, the required accompanying drawing used is briefly described, it should be apparent that, the accompanying drawing in describing below is Embodiments more of the present utility model, for those of ordinary skill in the art, on the premise of not paying creative work, Other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the theory diagram trimming test circuit of the power management chip of this utility model embodiment;
Fig. 2 is the theory diagram trimming test circuit of the power management chip of another embodiment of this utility model;
Fig. 3 is that the test circuit that trims of Fig. 2 is applied to the catenation principle figure of three terminal regulator;And
Fig. 4 is the circuit catenation principle figure of the fuse read-write cell of this utility model embodiment.
In the accompanying drawings, identical parts use identical reference.Accompanying drawing is not according to actual ratio.
Detailed description of the invention
Below in conjunction with accompanying drawing, the utility model is described in further detail.
For making the purpose of this utility model embodiment, technical scheme and advantage clearer, new below in conjunction with this practicality Accompanying drawing in type embodiment, is clearly and completely described the technical scheme in this utility model embodiment, it is clear that retouched The embodiment stated is the embodiment of this utility model part rather than whole embodiments.Based on the reality in this utility model Execute example, the every other embodiment that those of ordinary skill in the art are obtained under not making creative work premise, all belong to Scope in this utility model protection.
In a specific embodiment of the present utility model, as it is shown in figure 1, electricity is tested in trimming of power management chip Road, including: data transmission module, it is connected with the first pin, uses asynchronous logic transmission pulse of input at the first pin to touch Signal;And control module, it is connected with data transmission module, receives pulse triggering signal, and control on power management chip The read-write of fuse read-write cell;Wherein, circuit also includes the feedback unit being connected with control module, and circuit is repaiied by feedback unit Signal after tune feeds back to the first pin output.In this case, owing to having abandoned traditional complex digital circuitry, and use Asynchronous logic makes circuit need not agitator to carry out synchrodata, thus simplifies circuit structure, has saved cost.Meanwhile, electricity Signal after internal trimming is fed back to multiplexing pins by feedback unit by road so that measured result data share with input Same pin output signal.
In a specific embodiment of the present utility model, as it is shown in figure 1, power management chip trim test circuit Also include the packet decoding unit being connected with data transmission module.Data decoding unit receives pulse triggering signal and by it Packet decoding is for corresponding test signal and/or trims signal.Thus, it is possible to realize the key of the finished chip after encapsulation is referred to Mark carries out testing and adjusting.
In order to make test circuit be possible not only to control certain amount of trimming, it is also possible to carry out the most simple test function, The control module of test circuit includes the test pattern controller being sequentially connected in series and trims mode controller.Test pattern controller Receive test signal, circuit is correspondingly tested;Trim mode controller reception and trim signal, control fuse read-write cell Read-write operation.Specifically, as in figure 2 it is shown, pulse triggering signal inputs from multiplexing pins, it is via power up reset test mode detection Device realizes electrification reset, and detects whether the signal from multiplexing pins input meets entrance test pattern requirement.
Pulse triggering signal divides two-way to be transmitted separately to asynchronous shift buffer and packet counter, carries out key logic fortune Input to data register after calculation.From data register, the successively input of the signal of output to test pattern controller and trims In mode controller.Test pattern controller receives and identifies test signal, correspondingly tests circuit;Trim pattern control Device processed receives and identifies and trims signal, controls the read-write operation of fuse read-write cell.
It addition, test pattern controller and trim mode controller and be all connected with feedback unit, and pass through feedback unit with First pin exports test information and/or trims information.Preferably, feedback unit include interconnective data router and/ Or multiplexer.Above-mentioned test pattern controller and trimming after mode controller is connected to data router again with many Path multiplexer connects.Multiplexer is connected to multiplexing pins, and with trimming signal, test signal is fed back to multiplexing pins output.
In order to be able to preset the pattern of trimming, foregoing circuit also includes that the pattern that trims being connected to trim mode controller is fixed Justice unit, trims pattern definition unit and can preset and trim pattern information.In this case, by pre-setting the pattern of trimming Number and classification, can make an amendment the quantity of required circuit characteristic parameter and different performance.Specifically, base is trimmed at needs When quasi-voltage, reference current and reference clock, three can be preset and trim pattern;And when having only to revise reference voltage, can Pattern is trimmed, the therefore favorable expandability of circuit with default one.
In a specific embodiment of the present utility model, as it is shown in figure 1, what circuit also included being connected with the first pin Test pattern judge module, test pattern judge module is used for judging whether pulse triggering signal meets test request to enter survey Die trial formula.It is additionally provided with the second pin, for the signal after trimming being connected to internal electricity it addition, be connected with fuse read-write cell Road.Above-mentioned pulse triggering signal can be pulse width modulating signal.
It addition, this utility model additionally provides a kind of power management chip employing foregoing circuit.
Fig. 3 is that the test circuit that trims of this utility model embodiment is applied to the catenation principle figure of three terminal regulator.From figure Knowable in, outfan is defined as multiplexing pins.So, pulse width modulating signal adds from above-mentioned outfan, and in chip Portion's key node, such as, a reference source node, the voltage and current signal of built-in error amplifier negative feedback node etc. is also from this output End is drawn.So, by adding the pulse width modulating signal preset in multiplexing pins, flip chip enters debugging mode.? Multiplexing pins can record the key signal of chip internal, and such as, the side-play amount under the first test pattern is to obtain trimming coding letter Breath.Afterwards, by multiplexing pins, the above-mentioned coding information that trims being inputted chip, chip performs to trim action automatically, and it is right to blow The fuse answered.Until the first test pattern trim end after, the instruction of next test pattern can be inputted, next signal is entered Row trims.
Fig. 4 is the circuit catenation principle figure of the fuse read-write cell of this utility model embodiment.It can be seen that by control The conducting of metal oxide semiconductor transistor M1, M2, M3, M4 processed, the fuse FUSE that can control on fuse read-write cell is No forever blown, to adjust the height of the level of output in circuit.Specifically, transistor M1, M2 receive control signal EN and WRITE, drags down M3 signal, and M3 opens.M3 driving M4 is by FUSE short circuit between power supply and ground, thus is melted by FUSE Disconnected.Transistor M5 receives READ signal, in a burst pulse, if the input of LATCH is pulled low, then and output low level, instead Output high level.
Although this utility model being described by reference to preferred embodiment, but without departing from model of the present utility model In the case of enclosing, it can be carried out various improvement and parts therein can be replaced with equivalent.Especially, as long as not depositing The every technical characteristic being previously mentioned in structural hazard, each embodiment all can combine in any way.This utility model It is not limited to specific embodiment disclosed herein, but includes all technical schemes fallen within the scope of the appended claims.

Claims (10)

1. a power management chip trim test circuit, it is characterised in that including:
Data transmission module, is connected with the first pin, uses asynchronous logic transmission pulse of input at described first pin to touch Signal;And
Control module, is connected with described data transmission module, receives described pulse triggering signal, and controls described power management core The read-write of the fuse read-write cell on sheet;
Wherein, described circuit also includes the feedback unit being connected with described control module, and described feedback unit can be by described circuit Signal after trimming feeds back to described first pin output.
Circuit the most according to claim 1, it is characterised in that also include that the data being connected with described data transmission module are divided Group decoding unit;
Described data decoding unit receives described pulse triggering signal and is grouped and is decoded as testing signal accordingly and/or repairing Adjust signal.
Circuit the most according to claim 2, it is characterised in that described control module includes the test pattern control being sequentially connected in series Device processed and trim mode controller;Described test pattern controller receives described test signal, carries out described circuit correspondingly Test;Described trimming trims signal described in mode controller reception, controls the read-write of described fuse read-write cell.
Circuit the most according to claim 2, it is characterised in that described test pattern controller and to trim mode controller equal It is connected with described feedback unit, and exports test information by described feedback unit and the first pin and/or trim information.
Circuit the most according to claim 2, it is characterised in that trim trimming of mode controller described in also including being connected to Pattern definition unit, described in trim pattern definition unit and can preset and trim pattern information.
Circuit the most according to claim 1, it is characterised in that also include that the test pattern being connected with described first pin is sentenced Disconnected module, described test pattern judge module is used for judging whether described pulse triggering signal meets test request to enter test Pattern.
Circuit the most according to claim 1, it is characterised in that also include that be connected with described fuse read-write cell second draws Foot, described second pin is for being connected to internal circuit by the signal after trimming.
Circuit the most according to claim 1, it is characterised in that described feedback unit includes interconnective data router And/or multiplexer.
Circuit the most according to claim 1, it is characterised in that the read-write of the fuse on described control power management chip, For by control metal oxide semiconductor transistor conducting, and then control fuse whether forever blown, to adjust circuit The height of the level of middle output.
10. a power management chip, it is characterised in that have employed trimming as described in any of the above claim and test electricity Road.
CN201620871588.2U 2016-08-12 2016-08-12 Circuit and power management chip are tested in trimming of a kind of power management chip Active CN205861854U (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106093755A (en) * 2016-08-12 2016-11-09 上海宝司芯微电子有限公司 Circuit and power management chip are tested in trimming of a kind of power management chip
CN109613420A (en) * 2019-01-30 2019-04-12 上海华虹宏力半导体制造有限公司 The test method of chip
CN109831719A (en) * 2019-02-26 2019-05-31 深圳市美恩微电子有限公司 A kind of microphone preamplifier circuit trimmed with gain
CN110673584A (en) * 2019-10-14 2020-01-10 上海拿森汽车电子有限公司 Reliability detection method and device for electric power-assisted brake system
CN111273154A (en) * 2020-01-21 2020-06-12 浙江大华技术股份有限公司 Pin multiplexing test trimming system, method, computer device and storage medium

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106093755A (en) * 2016-08-12 2016-11-09 上海宝司芯微电子有限公司 Circuit and power management chip are tested in trimming of a kind of power management chip
CN109613420A (en) * 2019-01-30 2019-04-12 上海华虹宏力半导体制造有限公司 The test method of chip
CN109613420B (en) * 2019-01-30 2021-04-06 上海华虹宏力半导体制造有限公司 Chip testing method
CN109831719A (en) * 2019-02-26 2019-05-31 深圳市美恩微电子有限公司 A kind of microphone preamplifier circuit trimmed with gain
CN110673584A (en) * 2019-10-14 2020-01-10 上海拿森汽车电子有限公司 Reliability detection method and device for electric power-assisted brake system
CN111273154A (en) * 2020-01-21 2020-06-12 浙江大华技术股份有限公司 Pin multiplexing test trimming system, method, computer device and storage medium

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TR01 Transfer of patent right

Effective date of registration: 20191009

Address after: 201203 Room 102, building 2, No. 1690, Cailun Road, Pudong New Area, Shanghai

Patentee after: Hanxin Microelectronics (Shanghai) Co., Ltd.

Address before: 201203 Shanghai city Pudong New Area Cailun Road No. 1690 Building 2 room 414

Patentee before: Shanghai Bao Bao Microelectronics Co., Ltd.

TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20210603

Address after: 214000 16 / F, Jizhi Business Plaza, No.19 Erquan East Road, Xishan District, Wuxi City, Jiangsu Province

Patentee after: Hanxin Microelectronics (Wuxi) Co., Ltd

Address before: 201203 Room 102, building 2, no.1690 Cailun Road, Pudong New Area, Shanghai

Patentee before: Hanxin Microelectronics (Shanghai) Co.,Ltd.

TR01 Transfer of patent right