CN208655575U - A kind of multistation IC fuses trim test macro - Google Patents
A kind of multistation IC fuses trim test macro Download PDFInfo
- Publication number
- CN208655575U CN208655575U CN201821234593.8U CN201821234593U CN208655575U CN 208655575 U CN208655575 U CN 208655575U CN 201821234593 U CN201821234593 U CN 201821234593U CN 208655575 U CN208655575 U CN 208655575U
- Authority
- CN
- China
- Prior art keywords
- fuse
- test
- over panel
- probe
- control bit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
The utility model relates to a kind of multistation IC fuses trim test macro, it is characterized in that it includes test machine (1), relay control bit change-over panel (2), fuse board (3) and probe station (4), probe card (5) are provided on probe station (4), probe in probe card (5) is contacted with wafer (6) downwards, carries out test and fuse operation to wafer (6);Test machine (1) is converted out more relay control bits by the decoder on relay control bit change-over panel (2), and the relay that each relay control bit is connected on fuse board (3) is used to control multiple fuse probes on probe card (5).A kind of multistation IC fuses of the utility model trim test macro, when so that it being used to test and trim the more IC chip of fuse quantity, it saved cost, reduced preamble work difficulty and workload, working efficiency can have been improved in subsequent test process.
Description
Technical field
The utility model relates to a kind of multistation IC fuses to trim test macro.
Background technique
Integrated circuit production procedure is made of test etc. after wafer manufacture, wafer test, chip package and encapsulation.Wafer is surveyed
Examination is the first stop of road packaging and testing after semiconductor.Equipment used in wafer test: test machine (IC Tester), probe card
Interface (Mechanical between (Probe Card), probe station (Prober) and test machine and probe card
Interface).The purpose of wafer test is that the feature or design specification book of device can be substantially met to screen
(Specification) desired qualified die (verifying for generally including voltage, electric current, timing and function).It is undesirable
Chip can be marked as bad products, not encapsulate in subsequent cutting encapsulated phase.Wafer test is not only to improve finished product
The yield of packaging and testing, it usually needs necessary trim scheme is carried out to the certain parameters or function of chip and is trimmed.Commonly repair
Tune method is changed the connection of chip under test by fusing fuse, realizes trimming for parameter.
Fuse, which trims, is generally divided into three basic steps:
1, the initial value of parameter need to be trimmed by chip under test being tested before fuse, to select the fuse trimmed to combine.Initial value is surveyed
The accuracy of examination be it is vital, directly decide the effect for trimming fuse.
2, fuse is trimmed.According to the fuse combination of initial value selection, by the programming Control Zapping circuit of test machine come real
Existing fuse trims work.
3, test chip under test fuse after parameter value, judge whether test value meets design parameter requirement.
The test data of above-mentioned steps 1,3 is obtained by the test probe feedback test parameter in probe card to pc machine
, the operation of step 2 is then to need to complete by the fuse probe in probe card.Correspondingly, every one kind fuse trims type core
On piece is designed with the fuse pad to match with fuse probe and test probe, so as to the contact of fuse probe.
Currently, prior art, trimming cake core for different types of fuse can be arranged in corresponding probe card
The test probe and fuse probe of different function.Normal practice is directed to some specific kind, will trim fuse, relay
Device, capacitor all weld on the probe card.It for different kinds, requires to weld out different fuses every time and trims circuit, make
At the waste of resource, increase the development time.Some of them needs the kind of more fuse combinations, due to the PCB space of a whole page of probe card
It is limited, more relays can not be also carried with capacitor.
Therefore seek a kind of multistation IC fuses and trim test macro and its method for repairing and regulating, so that it is used to test
When with trimming the more IC chip of fuse quantity, saving cost, having reduced preamble work difficulty and workload, it can
Working efficiency is improved in subsequent test process.
Summary of the invention
Purpose of the utility model is to overcome the above-mentioned shortcomings and provide a kind of multistation IC fuses to trim test system
System when so that it being used to test and trim the more IC chip of fuse quantity, has saved cost, has reduced preamble work
Difficulty and workload can improve working efficiency in subsequent test process.
Purpose of the utility model is realized as follows:
A kind of multistation IC fuses trim test macro, it includes test machine, relay control bit change-over panel, molten
Filament plate and probe station are provided with probe card on probe station, and the probe in probe card downwards and wafer contacts, is surveyed wafer
Examination and fuse operation;
Test machine is converted out more relay control bits, each relay by the decoder on relay control bit change-over panel
Device control bit is connected to the relay on fuse board for controlling multiple fuse probes in probe card.
Relay control bit change-over panel contact pin and the conversion of relay control bit are provided on relay control bit change-over panel
Plate cattle horn socket is also integrated with multiple groups decoder on relay control bit change-over panel, and multiple groups decoder is parallel to relay control
Between position change-over panel contact pin and relay control bit change-over panel cattle horn socket, wherein relay control bit change-over panel contact pin and survey
The relay output station of test-run a machine is connected by the first winding displacement,
It is provided with the first fuse board cattle horn socket and the second fuse board cattle horn socket on fuse board, is also integrated on fuse board
There is a capacitor of multiple relays and corresponding number, the capacitor of multiple relays and corresponding number is parallel to the first fuse board ox
Between corner socket and the second fuse board cattle horn socket, wherein the first fuse board cattle horn socket and relay control bit change-over panel ox
It is connected between corner socket by the second winding displacement,
It is provided with the first probe card cattle horn socket and the second probe card cattle horn socket in probe card, is also integrated in probe card
There are probe groups, probe groups include multiple fuse probes and multiple test probes, wherein the first probe card cattle horn socket and second
Fuse board cattle horn socket is connected by third winding displacement, and the second probe card cattle horn socket is connect with test machine by the 4th winding displacement.
Preferably as the first, the mounting hole of the quadrangle of fuse board is connected on the board of probe station by connector, and
The mounting hole of the quadrangle of relay control bit change-over panel is connected to the side of test machine by connector.
Preferably as second, relay control bit change-over panel and fuse board are integrated in one and are installed on probe station
On board.
Trim the IC chip of parameter for not providing specific fuse, a kind of multistation IC fuses trim
The method for repairing and regulating of test macro the following steps are included:
Step 1: fuse quantity required by the first IC chip provided according to client, calculates in test program
All fuses combination out, then return test value is tested by probe station, it calculates the needs that every kind of fuse combination generates and repairs
The database of the data deposit test machine of these variable quantities is formed data by the specific variable quantity risen or fallen for adjusting parameter
Library,
Step 2: in the volume production test process of back, call directly database to carry out fuse trims work.
Step 3: whether the IC chip after detecting the replacement first after the replacement of subsequent IC chip
Superfusion silk is carried out in the machine before and trims test, if having carried out fuse trims test, is called directly in database
The data progress fuse of the trade mark of corresponding IC chip trims work, if it is the integrated circuit after the detection replacement
Chip carries out superfusion silk not in the machine and trims test, then circulation step one and step 2.
Trim the IC chip of parameter for specific fuse has been given, a kind of multistation IC fuses are repaired
The method for repairing and regulating of commissioning test system the following steps are included:
Step 1: first import provide specific fuse trim parameter to test machine formed database,
Step 2: in the volume production test process of back, call directly database to carry out fuse trims work.
For requiring relatively high product, trims parameter for specific fuse has been given there may be small mistakes
Difference can be according to required by the IC chip that client provides between step 1 and step 2 in order to correct the error
Fuse quantity calculates all fuse combinations in test program, then tests return test value by probe station, calculates
The specific variable quantity risen or fallen for needing to trim parameter that every kind of fuse combination generates, therewith by the data of these variable quantities
The database of preceding importing compares, if unanimously then carrying out step 2, if it is inconsistent, connection client confirms that fuse trims
Subsequent job is carried out after parameter again.
Compared with prior art, the utility model has the beneficial effects that
A kind of multistation IC fuses of the utility model trim test macro saved test development time and at
This, improves resource utilization.If continuing to add test board higher cost on former test machine, which is utilized decoder
It converts out more relay control bits, meets wanting for more fuse bits under the premise of not increasing exploitation testing cost
It asks.A kind of multistation IC fuses of the utility model trim test macro, so that it is used to test and trim fuse quantity
When more IC chip, cost is saved, has reduced preamble work difficulty and workload, can have been tested subsequent
Working efficiency is improved in journey.
Detailed description of the invention
Fig. 1 is that a kind of multistation IC fuses trim test system structure schematic diagram.
Fig. 2 is that a kind of multistation IC fuses trim test principle schematic diagram.
Fig. 3 is a kind of chip schematic diagram for the embodiment one that multistation IC fuses trim test macro.
Wherein:
Test machine 1
Relay control bit change-over panel 2, relay control bit change-over panel contact pin 2.1, relay control bit change-over panel ox horn
Socket 2.2, decoder 2.3
Fuse board 3, the first fuse board cattle horn socket 3.1, the second fuse board cattle horn socket 3.2, relay 3.3, capacitor 3.4
Probe card 5, the first probe card cattle horn socket 5.1, the second probe card cattle horn socket 5.2
Wafer 6.
Specific embodiment
The following will be combined with the drawings in the embodiments of the present invention, carries out the technical scheme in the embodiment of the utility model
It clearly and completely describes, it is clear that described embodiment is only invention a part of the embodiment, instead of all the embodiments.
Based on the embodiments of the present invention, obtained by those of ordinary skill in the art without making creative efforts
Every other embodiment, fall within the protection scope of the utility model.
Referring to Fig. 1-Fig. 2, the utility model relates to a kind of multistation IC fuses trim test macro, it includes
Test machine 1, relay control bit change-over panel 2, fuse board 3 and probe station 4 are provided with probe card 5 on probe station 4, wherein visiting
Wafer conveying mechanism is provided with below needle platform 4, wafer 6 is delivered to below probe card 5 by wafer conveying mechanism, in probe card 5
Probe contacted with wafer 6 downwards, to wafer 6 carry out test with fuse operation.
Wherein:
Test machine 1 is the test machine with 32PIN relay output station,
Relay control bit change-over panel contact pin 2.1 and relay control bit are provided on relay control bit change-over panel 2
Change-over panel cattle horn socket 2.2 is also integrated with multiple groups decoder 2.3 on relay control bit change-over panel 2, and multiple groups decoder 2.3 is simultaneously
It is coupled between relay control bit change-over panel contact pin 2.1 and relay control bit change-over panel cattle horn socket 2.2, wherein relay
Control bit change-over panel contact pin 2.1 is connect with the relay output station of test machine 1 by the first winding displacement,
The first fuse board cattle horn socket 3.1 and the second fuse board cattle horn socket 3.2, fuse board 3 are provided on fuse board 3
On be also integrated with the capacitor 3.4 of multiple relays 3.3 and corresponding number, the capacitor of multiple relays 3.3 and corresponding number
3.4 are parallel between the first fuse board cattle horn socket 3.1 and the second fuse board cattle horn socket 3.2, wherein the first fuse board ox
It is connected between corner socket 3.1 and relay control bit change-over panel cattle horn socket 2.2 by the second winding displacement,
The first probe card cattle horn socket 5.1 and the second probe card cattle horn socket 5.2, probe card 5 are provided in probe card 5
On be also integrated with probe groups 5.3, probe groups 5.3 include multiple fuse probes and multiple test probes, wherein the first probe card
Cattle horn socket 5.1 is connect with the second fuse board cattle horn socket 3.2 by third winding displacement, the second probe card cattle horn socket 5.2 and survey
Test-run a machine 1 is connected by the 4th winding displacement;
Wherein:
Preferably as the first, the mounting hole of the quadrangle of fuse board 3 is connected on the board of probe station 4 by connector,
And the mounting hole of the quadrangle of relay control bit change-over panel 2 is connected to the side of test machine 1 by connector;
Preferably as second, relay control bit change-over panel 2 and fuse board 3 are integrated in one and are installed on probe station
On 4 board.
Trim the IC chip of parameter for not providing specific fuse, a kind of multistation IC fuses trim
The method for repairing and regulating of test macro the following steps are included:
Step 1: fuse quantity required by the first IC chip provided according to client, calculates in test program
All fuses combination out, then return test value is tested by probe station, it calculates the needs that every kind of fuse combination generates and repairs
The database of the data deposit test machine of these variable quantities is formed data by the specific variable quantity risen or fallen for adjusting parameter
Library,
Step 2: in the volume production test process of back, call directly database to carry out fuse trims work.
Step 3: whether the IC chip after detecting the replacement first after the replacement of subsequent IC chip
Superfusion silk is carried out in the machine before and trims test, if having carried out fuse trims test, is called directly in database
The data progress fuse of the trade mark of corresponding IC chip trims work, if it is the integrated circuit after the detection replacement
Chip carries out superfusion silk not in the machine and trims test, then circulation step one and step 2.
Trim the IC chip of parameter for specific fuse has been given, a kind of multistation IC fuses are repaired
The method for repairing and regulating of commissioning test system the following steps are included:
Step 1: first import provide specific fuse trim parameter to test machine formed database,
Step 2: in the volume production test process of back, call directly database to carry out fuse trims work.
For requiring relatively high product, trims parameter for specific fuse has been given there may be small mistakes
Difference can be according to required by the IC chip that client provides between step 1 and step 2 in order to correct the error
Fuse quantity calculates all fuse combinations in test program, then tests return test value by probe station, calculates
The specific variable quantity risen or fallen for needing to trim parameter that every kind of fuse combination generates, therewith by the data of these variable quantities
The database of preceding importing compares, if unanimously then carrying out step 2, if it is inconsistent, connection client confirms that fuse trims
Subsequent job is carried out after parameter again.
Embodiment one,
Referring to Fig. 3, for the IC chip that certain fuse to be done trims, underlying parameter is as follows:
Test is divided into following nine step, and (test pattern, VDD=16V, GND=0, FB voltage add for test index and test method
Negative pulse, amplitude are -0.5V~3V, and duration 1ms is executed in order.
For the IC chip of 20 fuses, 20 fuses are respectively P1-P20, do not provide fuse parameter, step
The one fuse combination tested out, the database for being stored in test machine form database are as follows:
The various fuse parameter combinations of P1-P4:
TRIM detailed annotation:
The various fuse parameter combinations of P5-P7:
The various fuse parameter combinations of P8-P10:
The various fuse parameter combinations of P11-P13:
The various fuse parameter combinations of P14-P17:
The various fuse parameter combinations of P18-P20:
The relay control bit change-over panel contact pin 2.1 of corresponding relay control bit change-over panel 2 is 32PIN, relay control
Position change-over panel cattle horn socket 2.2 processed is 64PIN, and being also integrated with multiple groups decoder 2.3 on relay control bit change-over panel 2 has four
Group, the first fuse board cattle horn socket 3.1 of fuse board 3 are 64PIN, and the second fuse board cattle horn socket 3.2 is 64PIN, relay
3.3 and capacitor 3.4 be respectively 64, the first probe card cattle horn socket 5.1 in probe card 5 is 64PIN, the second probe card ox
Corner socket 5.2 is 64PIN, and the fuse probe of probe groups 5.3 has 20;Therefore this kind of multistation IC fuses are trimmed
The fuse that test macro can carry out 3 IC chips simultaneously trims test, improves efficiency.
The above is only the specific application examples of the utility model, do not constitute any limit to the protection scope of the utility model
System.Any technical scheme formed by adopting equivalent transformation or equivalent replacement, all fall within the utility model rights protection scope it
It is interior.
Claims (4)
1. a kind of multistation IC fuses trim test macro, it is characterised in that it includes test machine (1), relay control
Position change-over panel (2), fuse board (3) and probe station (4) are provided with probe card (5) on probe station (4), the spy in probe card (5)
Needle is contacted with wafer (6) downwards, carries out test and fuse operation to wafer (6);
Test machine (1) is converted out more relay control bits, Mei Geji by the decoder on relay control bit change-over panel (2)
The relay that electrical equipment control position is connected on fuse board (3) is used to control multiple fuse probes on probe card (5).
2. a kind of multistation IC fuses according to claim 1 trim test macro, it is characterised in that relay
Relay control bit change-over panel contact pin (2.1) and relay control bit change-over panel ox horn are provided on control bit change-over panel (2)
Socket (2.2) is also integrated with multiple groups decoder (2.3) on relay control bit change-over panel (2), and multiple groups decoder (2.3) is in parallel
Between relay control bit change-over panel contact pin (2.1) and relay control bit change-over panel cattle horn socket (2.2), wherein relay
Device control bit change-over panel contact pin (2.1) is connect with the relay output station of test machine (1) by the first winding displacement,
The first fuse board cattle horn socket (3.1) and the second fuse board cattle horn socket (3.2), fuse are provided on fuse board (3)
It is also integrated with the capacitor (3.4) of multiple relays (3.3) and corresponding number on plate (3), multiple relays (3.3) and corresponding
The capacitor (3.4) of number is parallel between the first fuse board cattle horn socket (3.1) and the second fuse board cattle horn socket (3.2),
Wherein pass through the second winding displacement between the first fuse board cattle horn socket (3.1) and relay control bit change-over panel cattle horn socket (2.2)
Connection,
The first probe card cattle horn socket (5.1) and the second probe card cattle horn socket (5.2), probe are provided in probe card (5)
It being also integrated with probe groups (5.3) on card (5), probe groups (5.3) include multiple fuse probes and multiple test probes, wherein the
One probe card cattle horn socket (5.1) is connect with the second fuse board cattle horn socket (3.2) by third winding displacement, the second probe card ox horn
Socket (5.2) is connect with test machine (1) by the 4th winding displacement.
3. a kind of multistation IC fuses according to claim 2 trim test macro, it is characterised in that fuse board
(3) mounting hole of quadrangle is connected on the board of probe station (4) by connector, and relay control bit change-over panel (2)
The mounting hole of quadrangle is connected to the side of test machine (1) by connector.
4. a kind of multistation IC fuses according to claim 2 trim test macro, it is characterised in that relay
Control bit change-over panel (2) and fuse board (3) are integrated in one and are installed on the board of probe station (4).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201821234593.8U CN208655575U (en) | 2018-08-02 | 2018-08-02 | A kind of multistation IC fuses trim test macro |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201821234593.8U CN208655575U (en) | 2018-08-02 | 2018-08-02 | A kind of multistation IC fuses trim test macro |
Publications (1)
Publication Number | Publication Date |
---|---|
CN208655575U true CN208655575U (en) | 2019-03-26 |
Family
ID=65788225
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201821234593.8U Active CN208655575U (en) | 2018-08-02 | 2018-08-02 | A kind of multistation IC fuses trim test macro |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN208655575U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108878306A (en) * | 2018-08-02 | 2018-11-23 | 江苏七维测试技术有限公司 | A kind of multistation IC fuses trim test macro and its method for repairing and regulating |
-
2018
- 2018-08-02 CN CN201821234593.8U patent/CN208655575U/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108878306A (en) * | 2018-08-02 | 2018-11-23 | 江苏七维测试技术有限公司 | A kind of multistation IC fuses trim test macro and its method for repairing and regulating |
CN108878306B (en) * | 2018-08-02 | 2024-05-28 | 江苏七维测试技术有限公司 | Multi-station integrated circuit fuse trimming test system and trimming method thereof |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN108878306A (en) | A kind of multistation IC fuses trim test macro and its method for repairing and regulating | |
CN201392350Y (en) | Probe card for anti-interference asynchronous trimming wafer test | |
CN101510520B (en) | Test method for asynchronously repairing and adjusting silicon wafer with anti-interference | |
CN100466168C (en) | Method for identifying semiconductor integrated circuit device, method for manufacturing semiconductor integrated circuit device, semiconductor integrated circuit device and semiconductor chip | |
CN108519550A (en) | IC wafers test optimization method | |
CN86105604A (en) | The circuit structure that is used for testing integrated circuit components | |
CN102520332B (en) | Wafer testing device and method for the same | |
US11454665B2 (en) | Integrated circuit spike check test point identification apparatus and method | |
CN102103185A (en) | Method and device for measuring inter-chip signals | |
CN109473361A (en) | The parallel test method of semiconductor power device | |
CN205861854U (en) | Circuit and power management chip are tested in trimming of a kind of power management chip | |
CN208655575U (en) | A kind of multistation IC fuses trim test macro | |
US6584606B1 (en) | Fast method of I/O circuit placement and electrical rule checking | |
CN106093755A (en) | Circuit and power management chip are tested in trimming of a kind of power management chip | |
US20040189332A1 (en) | Automatically adjustable wafer probe card | |
CN202330470U (en) | Testing interface board of integrated circuit chip | |
CN115166485A (en) | Integrated circuit chip OS test machine | |
CN102662092A (en) | Device and method for testing wafer | |
CN109727882A (en) | The concurrent testing equipment of semiconductor power device | |
CN110501633B (en) | Packaging-level chip testing device and method | |
CN111435145A (en) | Test system for smart card chip | |
CN106526459B (en) | High-performance radio frequency remote control automatic test system and method thereof | |
CN105206545B (en) | A kind of high density integrated circuit test chip of alternative configuration connection and preparation method thereof | |
CN209821110U (en) | Thermal resistance testing device | |
JP2001272435A (en) | Outlet for measurement of electric characteristic of semiconductor chip and evaluation method for electric characteristic of semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |