CN205843877U - 介质隔离式压力传感器 - Google Patents
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Abstract
一种介质隔离式压力传感器包括压力感测元件和顶盖。压力感测元件包括具有埋置密封腔体的键合晶片衬底。埋置密封腔体的壁形成感测隔膜。一个或更多个感测元件由感测隔膜支撑,以及一个或更多个键合焊盘由键合晶片衬底的上侧支撑。键合焊盘分别定位成邻近感测隔膜并且电连接到一个或更多个感测元件。顶盖可固定至键合晶片衬底的上侧使得顶盖中的孔有助于介质以向下方向穿过至感测隔膜。顶盖也可配置成使键合焊盘与介质隔离。
Description
相关申请的交叉引用
本申请要求于2014年8月提交的国际申请号为PCT/US2014/052604的,题为“MEDIAISOLATED PRESSURE SENSOR”的国家阶段的优先权,其要求2013年9月12日提交的美国专利申请序列号14/024,919,题为“MEDIA ISOLATED PRESSURE SENSOR”的优先权,这两者均整体上通过引用并入本文中。
技术领域
本申请大体涉及压力传感器,以及更确切地,涉及介质隔离式压力传感器。
背景技术
压力传感器使用在多种多样的应用中,例如包括商业的、机动车辆的、航天的、工业的和医学的应用。压力传感器经常使用压力感测芯片,其使用芯片附接工艺安装到压力传感器封装。压力感测芯片经常配置成通过将压力感测芯片的感测隔膜中由被感测介质所感测的机械应力转换成电输出信号的方式来检测被感测介质的压力。用于高压应用的压力传感器的最常见构型允许将流体压力施加到压力感测芯片的顶侧,同时允许待感测的流体与传感器的电子部件接触。如果流体是惰性气体,则此类构型可以是足够的。然而,在一些应用中,被感测的介质可能是腐蚀性的或传导性的,并且显露至待感测流体会导致对压力传感器芯片的一些部件的损害和/或可导致压力感测芯片中一些电子部件的短路。针对这些应用,可期望使压力传感器芯片的敏感部件与待感测介质隔离。而且,针对更高压力的应用,期望将压力感测芯片安装至压力传感器封装,使得介质所引入的向下的压力不会导致芯片附接失效,而此失效是在将高压应用至传感器背侧时传感器的常见的缺点。允许对感测芯片施加向下的压力以及也能将压力感测芯片的敏感部件与待感测介质隔离开的传感器构造可提供稳健的压力传感器,其能够应用在多种环境中。
实用新型内容
本申请大体涉及压力传感器,以及更确切地,涉及介质隔离式压力传感器。
压力传感器示例可包括压力感测元件和顶盖。压力感测元件可包括具有埋置密封腔体的键合(bonded)晶片衬底。埋置密封腔体的壁可形成沿着键合晶片衬底上侧的感测隔膜。一个或更多个感测元件可由键合晶片衬底的感测隔膜所支撑,以及一个或更多个键合焊盘(bond pad)可由键合晶片衬底的上侧所支撑。一个或更多个键合焊盘分别定位成邻近感测隔膜并且电连接到一个或更多个感测元件。顶盖可固定至键合晶片衬底的上侧,使得顶盖中的孔有助于介质穿过至感测隔膜。顶盖也可配置成将压力感测元件的一个或更多个键合焊盘与介质隔离。
制造压力传感器的方法可包括获得具有埋置密封腔体的键合晶片衬底,其中,埋置密封腔体的壁形成沿键合晶片衬底的上侧上的感测隔膜。可在键合晶片衬底的感测隔膜上提供一个或更多个感测元件。可以在键合晶片衬底的上侧上提供一个或更多个键合焊盘。一个或更多个键合焊盘可分别定位成邻近感测隔膜并且电连接到感测元件中的一个或更多个。顶盖可固定至键合晶片衬底的上侧。顶盖可包括有助于介质穿过至感测隔膜的孔。顶盖也可配置成使一个或更多个键合焊盘在使用期间与介质隔离。
提供前述的实用新型内容来帮助理解针对本申请特有的一些创新性特征,且并不旨在是完整的说明。能够通过整体上结合说明书、权利要求书、附图和摘要来获得对本公开的充分理解。
附图说明
通过结合相应的附图来考虑如下的多种说明性实施例,可更完整地理解本公开,其中:
图1是说明性的介质隔离式压力传感器的透视图;
图2是图1中所示的压力传感器的分解图;
图3是图1中所示的压力传感器的截面图;
图4是可使用在图1的压力传感器中的压力感测元件的示意性的顶视图;以及
图5是可使用在图1的压力传感器中的顶盖晶片的示意性的顶视图。
虽然本公开能够接受多种修改和可替代形式,其特性已经以示例的方式在附图中示出并且将进行详细说明。然而,应该理解到,其并不旨在将本公开的各个方面限于所描述的特定的说明性的实施例。相反地,其旨在覆盖落入本公 开的精神和范围内的所有修改、等效方案和可替代方案。
具体实施方式
以下说明应该参考附图进行阅读,其中贯穿这几个视图中相同的附图标记指示相同的元件。说明书和附图(其不一定按比例绘制)描述了说明性的实施例,且并不旨在限制本公开的范围。所描述的说明性实施例仅旨在是示例性的。
如此处所使用的,术语“流体”不旨在限于液体。而且,术语“流体”旨在包括任何可流动的材料种类,例如但不限于液体和/或气体。
图1-3提供用于感测液体或气体的压力的说明性的介质隔离式参考压力传感器10的不同视图。图1是说明性的介质隔离式参考压力传感器10的透视图。图2和图3分别是图1中参考压力传感器10的分解图和截面图。可以预期的是,如此文中所述的,参考压力传感器10可适用于高压应用中。高压应用可以是压力超过250psi的那些应用。虽然此处描述的压力传感器10可提供用于高压应用的更鲁棒的传感器设计,但是仍将通常理解到,此类压力传感器10还可用于低压应用中。
说明性的介质隔离式参考压力传感器10可包括附接到顶盖20的压力端口14,该顶盖可联接到压力感测元件,例如压力感测芯片24。在一些情况下,压力感测芯片24可使用具有埋置密封腔体64的键合硅晶片来制造。埋置密封腔体64可根据需要具有真空参考压力或任何其它合适的参考压力。当如此设置时,键合的硅晶片可形成感测隔膜60,其以埋置密封腔体64中的参考压力作为参考。感测隔膜60可响应于介质所施加的压力被施加应力和/或产生形变。此应力和/或形变能够由位于感测隔膜60上或嵌在其中的一个或更多个感测元件80检测到。与所施加的压力相关的输出信号可经由一个或更多个键合焊盘34来提供。
顶盖20可键合到压力感测芯片24,使得位于压力感测芯片24的上表面38上的引线键合焊盘(wire bond pad)34与待检测介质隔离。虽然不是必需的,压力传感器10可以如此构造,使得来自待感测介质的压力施加至如所示的压力感测芯片24的上表面38,其可以迫使压力感测芯片24朝向合适的托架26(见图1),例如陶瓷托架、玻璃托架、印刷电路板(PCB)。向压力感测芯片24的上表面38和托架26施加向下的压力可防止或减少压力感测芯片24从托架26移位的可能性,并且可引起压力感测芯片24与托架26之间的芯片键合界面处的拉开作用力很小或没有,这样可提供能够承受更高压力的更鲁棒的传感器。 这在高压应用中是尤其有用的,例如超过250psi的那些应用。
如图1-3中所示,压力端口14可限定流体通道42,该流体通道42允许介质(流体或气体)从第一端46至第二端48流入压力传感器10。在许多情况下,流体通道42可引导介质,使得介质接触压力感测芯片24的上侧38,如将在下文更详细说明的。在一些情况下,压力端口14可包括伸长的管状结构52,其限定流体通道42。在一些情况下,伸长的管状结构52可包括弯管,其根据应用具有弯曲的或一些其它构型或形状。无论具有何种构型,流体通道42可引导流体流至压力感测芯片24,使得其接触压力感测芯片24的上表面38。压力端口14可由金属、陶瓷、玻璃、热塑性和/或任何其它合适的材料或材料组合所形成。在一些情况下,压力端口14可以是注塑模制的、热塑性压力端口14,但这并非必需的。在一些情况下,根据所期望的应用,流体通道42的第一端46处的开口包括多种接口选项和/或连接。例如在一种情况下,压力端口14可包括位于第一端46处的螺纹区域,其用于与另外的螺纹部件以螺纹方式接合。如图1-3所示,压力端口14可附接到顶盖20。在一些情况下,压力端口14可使用芯片附接材料附接至顶盖20。示例性的芯片附接材料包括多种粘合剂和/或硅树脂,但是这些仅仅是示例。
在一些情况下,顶盖20可以是硅或玻璃芯片(die),并且可包括开口或其它孔56,当顶盖晶片20键合到压力感测芯片24时,该开口或孔允许通过压力端口14所引入的介质与压力感测芯片24的上表面38接触,如能够从图2和图3中最佳所见的。孔56的大小和形状可以是允许流体通过顶盖晶片20使得流体与压力感测芯片24接触并向其施加压力的任何合适的大小和/或形状。在一些情况下,孔56可包括多种孔径。预期的是,顶盖20可使用多种键合技术键合至压力感测芯片24,包括但不限于阳极键合、玻璃介质键合、直接键合、粘接键合、金属键合和/或使用任何其它合适的键合技术。顶盖20可键合至压力感测芯片24的上表面38,使得压力感测芯片24的上表面38上的引线键合焊盘34与待感测介质隔离。使引线键合焊盘34和/或压力感测芯片的其它电气部件与待感测介质隔离可防止对压力传感器芯片的一些部件的损坏,和/或可防止否则当电气部件与导电和/或腐蚀性介质接触时所导致的电短路。这样可增强压力传感器10的长期性能和可靠性。在一些情况下,如图5中更详细描述地,顶盖20可包括多个开口或孔94,其对应于压力感测芯片24的上表面38上的引线键合焊盘 34中的一个或更多个,使得当顶盖20键合至压力感测芯片24时,引线键合焊盘34通过顶盖晶片20的孔94显露,并且通过引线键合或类似方式使得至其它部件的电连接是可行的,但这不是必需的。
如上文所论述的,压力感测芯片24可由具有埋置密封腔体64的键合的硅晶片开始制造。如图3中最佳所示,键合的硅晶片可包括键合至第二晶片72的第一晶片70。第二晶片72(和/或第一晶片70)可包括凹部,该凹部在第一晶片70键合至第二晶片72之后形成埋置密封腔体64。可用于形成凹部的多种微制造技术包括但不限于:光刻技术、湿法刻蚀技术和干法刻蚀技术。第一晶片70可在真空环境中键合至第二晶片72,由此在埋置密封腔体64中留出真空参考压力。可利用包括直接键合技术的多种键合技术将第二晶片72键合至第一晶片70。将第一晶片70直接键合至第二晶片72可使材料之间的热失配最小化。如所能够看见的,第一晶片70可限定埋置密封腔体64的部分,由此方便地形成感测隔膜60(见图3)。
第一晶片70和第二晶片72可以是如上所述的键合在一起的硅晶片。在另外的示例中,压力感测芯片24可以使用具有埋置密封腔体64的绝缘体上硅薄膜(SOI)晶片形成。此类压力感测芯片24可以与图3中所示的相似,除了在第一晶片70与第二晶片72之间包括绝缘层。而且,第一晶片70可包括外延生长硅层,而不是孤立的硅晶片。在任何情况下,这些都只是具有埋置密封腔体64的示例性硅晶片。可以预期的是,可根据需要使用任何合适的衬底和/或任何合适的材料或材料组合。
在一些情况下,以具有埋置密封腔体64的键合的硅晶片开始,标准模式、植入、扩散和/或金属连接工艺可用于形成键合的硅晶片的上表面38上的一个或更多个元件。例如,一个或更多个压阻感测元件80可形成在感测隔膜60上。压阻感测元件80可配置成具有根据所施加的机械应力(例如压力感测隔膜60的挠度)而变化的电阻。压阻感测元件80能够由此用于将施加的压力转化成电信号。在一些情况下,压阻部件可包括硅压阻材料;然而,可使用其它非硅材料。在一些情形下,压阻感测元件80可连接成惠斯通电桥构型(全桥或半桥)。通常将理解到,压阻感测元件80仅仅是压力感测元件的一个示例,并且可以预期的是,可根据需要使用任何其它合适的感测元件。
一个或更多个键合焊盘34可形成在键合的硅晶片的上表面38上并且邻近 感测隔膜60。可提供金属、扩散或其它互连方式用于使一个或更多个压阻传感器元件80和一个或更多个键合焊盘34互连。在一些情况下,信号调理电路81也可形成在键合的硅晶片的上表面38内或其上(见图3)。信号调理电路81可以调理接收自一个或更多个感测元件80的一个或更多个传感器信号,然后将经调理的输出提供给键合焊盘34中的一个或更多个。例如,信号调理电路81可包括放大、模数转换、偏移补偿电路、线性化、温度补偿和/或其它合适的信号调理功能。
图4是示例性压力传感器芯片24的自上而下的示意图,其可用在此文中所讨论的压力传感器10中。如图4所示,压力感测芯片24可包括形成在上表面38上的一个或更多个引线键合焊盘34,其通过形成在上表面38上的金属滑条82、84提供与感测元件80的电连接。在一些情况下,下压铁件(duck under)86可形成在上表面38下方并且穿过顶盖20可键合至压力感测芯片24的区域90下方。下压铁件86可以埋置的方式互连。在一些情况下,下压铁件86可以是扩散或植入的表现出传导性的区域。
图5是示例性顶盖20的自上而下的示意图。如图5所示,顶盖20可包括开口或孔56,其可在压力传感器10的制造期间与压力感测隔膜60大体对准,使得通过压力端口14所引入的介质达到与压力感测芯片24的感测隔膜60的上表面38接触。另外,如图5所示,顶盖20可包括一个或更多个开口或孔94,其对应于置于压力感测芯片24的上表面38上的引线键合焊盘34中的一个或更多个。在压力传感器的制造期间,开口或孔94可以与置于压力感测芯片24上的引线键合焊盘34对准,使得在装配后,引线键合焊盘34通过顶盖20显露,并且通过引线键合或类似方式使得至其它部件的电连接是可行的。虽然开口或孔94可具有适用于提供连接到引线键合焊盘34的任何形状或大小,但在一些情况下,孔或开口94的大小、形状和维度可大体对应于置于压力感测芯片24上的引线键合焊盘34的大小、形状和维度。另外,通常将理解到,顶盖20可根据应用具有多种大小和形状,并且不限于图5中示出的大小和形状。例如,在一些情况下,顶盖晶片20可具有大体盘状的形状。
在操作中,待感测介质能够提供给可选择的压力端口14的流体通道42的第一端46。待感测的介质将具有一压力,其通过介质传输给感测隔膜60。所施加的压力使隔膜60产生形变。待感测介质的压力与埋置密封腔体64中的压力 之间的压差引起压力感测芯片24中的压力感测隔膜60中产生应力和/或挠曲,然后此应力和/或挠曲向压力感测隔膜60上的一个或更多个感测元件80施加应力。当感测元件80是压阻感测元件时,施加通过感测元件80的电流提供对应于介质向感测隔膜60所施加的压力量的信号。在一些情况下,产生的信号可由调理电路81调理并通过电导线(未示出)输出。
制造压力传感器10的方法可包括获得具有埋置密封腔体64的键合晶片衬底,其中埋置密封腔体64的壁形成沿着键合晶片衬底的上侧上的感测隔膜60。可以在键合晶片衬底的感测隔膜60上提供一个或更多个感测元件80。可以在键合晶片衬底的上侧上提供一个或更多个键合焊盘34。一个或更多个键合焊盘34分别定位成邻近感测隔膜60并且电连接到感测元件80中的一个或更多个。顶盖20可固定至键合晶片衬底的上侧。顶盖20可包括有助于介质通过至感测隔膜60的孔56。顶盖20还可配置成使一个或更多个键合焊盘34在使用中与介质隔离。
在已经由此描述了本公开的若干说明性的实施例之后,本领域技术人员将容易领会到,在所附的权利要求书的范围内还可得到和使用其它实施例。本公开的由此文献所涵盖的许多优点已经在前述说明书中详细阐明。然而将理解到,本公开在许多方面仅仅是说明性的。在不超过本公开的范围的条件下,可在细节方面做一些改变,特别是在形状、大小和部件的布置方面。当然,本公开的范围由所述的权利要求书采用的语言所界定。
Claims (10)
1.一种介质隔离式压力传感器,其包括:
压力感测元件,其包括:
键合晶片衬底,其具有埋置密封腔体,其中所述埋置密封腔体的壁形成沿着所述键合晶片衬底的上侧上的感测隔膜;
一个或更多个感测元件,其由所述键合晶片衬底的所述感测隔膜支撑;
一个或更多个键合焊盘,其由所述键合晶片衬底的上侧支撑,一个或更多个键合焊盘分别定位成邻近所述感测隔膜并且电连接到一个或更多个感测元件中的一个或更多个;以及
顶盖,其包括孔,所述顶盖相对于所述键合晶片衬底的上侧固定,使得所述孔有助于介质沿向下方向穿过至所述感测隔膜,所述顶盖能够进一步配置成使所述压力感测元件的所述一个或更多个键合焊盘与所述介质隔离。
2.如权利要求1所述的介质隔离式压力传感器,其中,所述键合晶片衬底包括:
第一衬底;
第二衬底;
所述第一衬底键合至所述第二衬底,使得形成在所述第一衬底和/或第二衬底中的凹部产生所述第一衬底与所述第二衬底之间的埋置密封腔体;以及
所述第一衬底限定所述感测隔膜,所述感测隔膜形成所述密封腔体的一部分。
3.如权利要求1或2中任一项所述的介质隔离式压力传感器,其进一步包括与所述孔流体连通的压力端口,其中,所述压力端口和孔至少部分地限定介质流动路径,所述介质流动路径与所述压力感测元件的所述一个或更多个键合焊盘隔离。
4.如权利要求1或2中任一项所述的介质隔离式压力传感器,其中,所述埋置密封腔体是参考压力腔体或真空密封参考腔体。
5.如权利要求1或2中任一项所述的介质隔离式压力传感器,其中,所述一个或更多个感测元件包括一个或更多个压阻元件。
6.如权利要求1或2中任一项所述的介质隔离式压力传感器,其中,所述键合晶片衬底包括硅衬底或绝缘体上硅薄膜(SOI)衬底。
7.如权利要求1或2中任一项所述的介质隔离式压力传感器,其中,所述介质的压力是相对于所述埋置密封腔体中的压力所测量的。
8.如权利要求1或2中任一项所述的介质隔离式压力传感器,其中,所述顶盖包括与一个或更多个键合焊盘中的一个或更多个配准的孔或凹部,使得当所述顶盖相对于所述键合晶片衬底的上侧键合时,通过孔或凹部能够接近所述一个或更多个键合焊盘以进行电连接。
9.如权利要求1或2中任一项所述的介质隔离式压力传感器,其进一步包括信号调理电路,所述信号调理电路可操作地联接到所述键合焊盘中的一个或更多个用于调理响应于所述一个或更多个感测元件的信号。
10.如权利要求1或2中任一项所述的介质隔离式压力传感器,其中,所述埋置密封腔体由所述键合晶片衬底的下表面与所述键合晶片衬底的上表面之间的空间所限定。
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2013
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-
2014
- 2014-08-26 CN CN201490001041.6U patent/CN205843877U/zh not_active Expired - Lifetime
- 2014-08-26 JP JP2016600088U patent/JP3207123U/ja not_active Expired - Lifetime
- 2014-08-26 EP EP14761522.3A patent/EP3044558A1/en not_active Ceased
- 2014-08-26 WO PCT/US2014/052604 patent/WO2015038320A1/en active Application Filing
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CN114323370A (zh) * | 2017-03-15 | 2022-04-12 | 霍尼韦尔国际公司 | 具有向边缘通气的埋置腔的微机电系统(mems)力芯片 |
CN108896233A (zh) * | 2017-03-22 | 2018-11-27 | 阿自倍尔株式会社 | 压力传感器芯片、压力发送器以及压力传感器芯片的制造方法 |
CN107036740A (zh) * | 2017-04-14 | 2017-08-11 | 苏州敏芯微电子技术股份有限公司 | 一种微传感器封装结构及其制作工艺 |
Also Published As
Publication number | Publication date |
---|---|
EP3044558A1 (en) | 2016-07-20 |
US20150068315A1 (en) | 2015-03-12 |
US9470593B2 (en) | 2016-10-18 |
WO2015038320A1 (en) | 2015-03-19 |
JP3207123U (ja) | 2016-10-27 |
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