CN205159315U - Lead frame strip - Google Patents
Lead frame strip Download PDFInfo
- Publication number
- CN205159315U CN205159315U CN201520995651.9U CN201520995651U CN205159315U CN 205159315 U CN205159315 U CN 205159315U CN 201520995651 U CN201520995651 U CN 201520995651U CN 205159315 U CN205159315 U CN 205159315U
- Authority
- CN
- China
- Prior art keywords
- lead frame
- pin
- frame unit
- adjacent
- chip carrier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn - After Issue
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
The utility model discloses a lead frame strip. The utility model discloses an embodiment provides a lead frame strip who is used for the encapsulation of flat no pin, sets up a plurality of lead frame units that are array arrangement on it. Each person in these a plurality of lead frame units contains: chip holder, extend in a plurality of pins of this chip holder's four sides to and a plurality of pin connecting portion of this pin of connection. This chip holder has through upper surface and with this upper surface relative lower surface of configuration with the hosting core piece. Wherein, has fretwork portion in these a plurality of lead frame units between the adjacent pin connecting portion between them. The embodiment of the utility model provides a lead frame strip who provides can effectively avoid the bridging phenomenon between the pin.
Description
Technical field
The utility model is about field of semiconductor package technology, particularly about lead frame in field of semiconductor package (leadframe) bar.
Background technology
Along with the development of electronic technology and semiconductor packaging, market expects that electronic product size is more and more less always.Between the pin that less size means integrated circuit, spacing is also less just can satisfy the demands.But due to the good ductility of copper, when manufacturing lead frame bar, it can extend copper thorn along with cut direction.Found at present for pin-pitch be less than or equal to 0.5mm without pin package, as quad flat non-pin package (QFN, QuadFlatNo-leadPackage) product can exist bear from a pin copper thorn extend on an other pin, i.e. the situation of bridge joint.The pin of bridge joint can make the encapsulating products in later stage there is the risk of short circuit, thus cannot meet the quality requirement of encapsulation.
To sum up, existing lead frame bar needs to improve further to meet the demand of market to small size semiconductor package product.
Utility model content
One of the purpose of this utility model is to provide a kind of lead frame bar, and it effectively can avoid the bridge joint phenomenon between pin, thus the space that raising pin-pitch reduces further.
According to an embodiment of the present utility model, one arranges the some lead frame unit be arranged in array on the lead frame bar of flat no-lead packages; Each in this some lead frame unit comprises: chip carrier, extend some pins of four sides of this chip carrier, and connects some pin connection of this pin.This chip carrier has the upper surface and the lower surface relative with this upper surface that are configured to carries chips.Between both pin connection adjacent, there is hollow-out parts in this some lead frame unit.
In an embodiment of the present utility model, this some pin connection is connected between the corresponding side pin of adjacent two lead frame unit further.In another embodiment of the present utility model, this some pin connection is connected between this some pin and this chip carrier.In this some lead frame unit, both corresponding side pin adjacent is connected with the other side's chip carrier.In this some lead frame unit, both corresponding side pin connection adjacent is staggered.In this some lead frame unit, both corresponding side pin adjacent is also staggered.In this some lead frame unit the side pin of a lead frame unit compared with corresponding side pin in its adjacent wires frame unit away from the chip carrier of this lead frame unit.In another embodiment of the present utility model, in this some lead frame unit, every side pin-pitch of each is less than or equal to 0.5mm.In this some pin, the upper surface of each is at least locally half-etching.Have plastic packaging region in this some lead frame unit each, in this some lead frame unit, both plastic packaging region adjacent offsets a distance each other.
The lead frame bar that the utility model embodiment provides, even directly omits the intercell connector of corresponding side pin between adjacent wires frame unit by hollow out, to reducing residual copper amount thus effectively avoiding " bridge joint " phenomenon between adjacent leads, and then improve product yield.
Accompanying drawing explanation
It is the floor map of the lead frame bar according to the utility model one embodiment shown in Fig. 1
It is the local schematic top plan view of a lead frame unit in Fig. 1 shown in Fig. 2
The pin of respective side and the partial schematic diagram of connecting portion thereof between two adjacent lead frame unit in Fig. 2 shown in Fig. 3
Fig. 4 is the fragmentary bottom schematic diagram of the lead frame bar according to another embodiment of the utility model
Fig. 5 cuts lead frame bar in Fig. 4 and is separated the elevational schematic view of different conductor frame unit
Embodiment
For better understanding spirit of the present utility model, below in conjunction with part preferred embodiment of the present utility model, it is described further.
It is the floor map of the lead frame bar 10 according to the utility model one embodiment shown in Fig. 1.It is the local schematic top plan view of a lead frame unit 20 in Fig. 1 shown in Fig. 2.
As shown in Figure 1, for the semiconductor package body of some types, as comprised the packaging body of the flat outer-pin-free type of QFN, its lead frame bar 10 used comprises some some lead frame unit 20 lining up array.
Further, according to Fig. 2, each lead frame unit 20 comprises: chip carrier 22 and extend some pins 24 of this chip carrier 22 4 side, and wherein every side pin-pitch is less than or equal to 0.5mm.Certainly in other embodiments, pin 24 spacing also can be greater than 0.5mm.Chip carrier 22 has the upper surface 220 and the lower surface 222 (see Fig. 3) relative with this upper surface 220 that are configured to carries chips 12.In this some lead frame unit 20, both corresponding side pin 24 adjacent is connected by pin connection 26, this pin connection 26 local hollow out.This hollow-out parts 28 realizes by etch process.
Be the pin 24 of two adjacent lead frame unit, 20 respective side and the partial schematic diagram of connecting portion 26 thereof in Fig. 2 shown in Fig. 3, wherein dashed part represents that this part is through half-etching process.Be described for clearer, distinguishing identifier has been done to the pin 24 of different conductor frame unit 20 and pin connection 26.Wherein the pin 24 of side and pin connection 26 belong to a lead frame unit 20, are designated 241a-241e, 261a-261e respectively; And the pin 24 of opposite side and pin connection 26 belong to another lead frame unit 20, be designated 242a-242e, 262a-262e respectively.Concrete, in the present embodiment, pin connection 261a and the 262a of every a pair respective pins 241a and 242a, 241b and 242b, 241c and 242c, 241d and 242d, 241e and 242e, 261b and 262b, 261c and 262c, 261d and 262d, 261e and 262e extension combine, and so have hollow-out parts 28 each other.Hollow-out parts 28 can reduce the residual copper amount between pin 24, thus avoid the copper caused when wire cutting sheth 10 to sting as far as possible, and then the encapsulation requirement making lead frame bar 10 of the present utility model be applicable to pin-pitch to be less than or equal to 0.5mm, realize the further miniaturization of packaging body.
Certainly, hollow-out parts 28 can be arranged at other position but not illustrated center in other embodiments, as being partial to the lead frame unit 20 of wherein certain side, numerous.Such as, in another embodiment, the bound fraction of the pin connection 26 of adjacent two pairs of respective pins 24 has hollow-out parts 28, as pin to 241a, 242a and pin to pin connection 26 bound fraction between 241b and 242b, pin to 241b, 242b and pin to pin connection 26 bound fraction between 241c and 242c, pin to 241c, 242c and pin to pin connection 26 bound fraction between 241d and 242d, pin to 241d, 242d and pin to pin connection 26 part between 241e and 242e.
According in an embodiment of the present utility model, for more reducing residual copper amount, also on the upper surface 220 of each pin 24, at least local half-etching can be done.And according to embodiments more of the present utility model, the design of hollow-out parts 28 even makes do not have bound fraction between the pin connection 26 of adjacent two pairs of respective pins 26.
Fig. 4 is the fragmentary bottom schematic diagram of the lead frame bar 40 according to another embodiment of the utility model, and Fig. 5 cuts lead frame bar 40 in Fig. 4 and is separated the elevational schematic view of different conductor frame unit 50, wherein dashed part represents that this part is through half-etching process.
Composition graphs 4,5, similar, this lead frame bar 40 comprises the some lead frame unit 50 lining up array, is applicable to the packaging body of the flat outer-pin-free type comprising QFN.Each lead frame unit 50 comprises: chip carrier 52 and extend some pins 54 of this chip carrier 52 4 side, and wherein every side pin-pitch can be set to be less than or equal to 0.5mm.Chip carrier 52 has the upper surface (not shown) and the lower surface 522 relative with this upper surface that are configured to carries chips (not shown).In this some lead frame unit 50, both corresponding side pin 54 adjacent is connected with the other side's chip carrier 52 by pin connection 56, and this pin connection 56 extends from the other side's chip carrier 52.Between both corresponding side pin 54 adjacent, there is hollow-out parts 58 in this some lead frame unit 50 and be staggered, thus the connecting portion between the pin 54 that can dispense different conductor frame unit 50.
Concrete, in the present embodiment, can two adjacent wires frame unit 501,502 be example in Fig. 4,5, wherein the side pin 541 of a lead frame unit 501 be that the pin connection 561 extended by the corresponding side of the chip carrier 522 from another lead frame unit 502 extends; And be extend pin connection 562 from the corresponding side of the chip carrier 521 of this lead frame unit 501 to extend from the corresponding side pin 542 of this another lead frame unit 502.In the present embodiment, the side pin 541 of lead frame unit 501 compared with the pin 542 of corresponding side in its adjacent wires frame unit 502 away from the chip carrier 521 of this lead frame unit 501; The side pin 542 of corresponding lead frame unit 502 compared with the pin 541 of corresponding side in its adjacent wires frame unit 501 away from the chip carrier 522 of this lead frame unit 502.As shown in Figure 4,5, the configuration structure of two adjacent wires frame unit 501,502 of this example is equally applicable to other lead frame unit 50.
The lead frame bar 40 of the present embodiment can meet the encapsulation requirement that pin 54 spacing is less than or equal to 0.5mm equally, or at least does local half-etching to the upper surface of pin 54 and reduce residual copper amount further.
In addition, in the present embodiment, in this some lead frame unit 50, the sealing region 51 of neighbor offsets a distance each other, also becomes to be staggered.
To sum up, the lead frame bar that the utility model embodiment provides significantly reduces residual copper amount by hollow out, reduce single packaging body shaping time the bridge joint risk that produces.
Technology contents of the present utility model and technical characterstic disclose as above, but those of ordinary skill in the art still may do all replacement and the modification that do not deviate from the utility model spirit based on teaching of the present utility model and announcement.Therefore, protection range of the present utility model should be not limited to the content that embodiment discloses, and should comprise various do not deviate from replacement of the present utility model and modification, and is contained by present patent application claims.
Claims (10)
1., for a lead frame bar for flat no-lead packages, it is arranged the some lead frame unit be arranged in array; Each in described some lead frame unit comprises:
Chip carrier, has the upper surface and the lower surface relative with described upper surface that are configured to carries chips; And
Some pins, extend four sides of described chip carrier;
Some pin connection, connect described pin;
It is characterized in that between both pin connection adjacent, there is hollow-out parts in described some lead frame unit.
2. lead frame bar as claimed in claim 1, is characterized in that described some pin connection are connected between the corresponding side pin of adjacent two lead frame unit further.
3. lead frame bar as claimed in claim 1, is characterized in that described some pin connection are connected between described some pins and described chip carrier.
4. lead frame bar as claimed in claim 3, is characterized in that in described some lead frame unit, both corresponding side pin adjacent is connected with the other side's chip carrier.
5. lead frame bar as claimed in claim 1, is characterized in that in described some lead frame unit, both corresponding side pin connection adjacent is staggered.
6. lead frame bar as claimed in claim 1, is characterized in that in described some lead frame unit, both corresponding side pin adjacent is staggered.
7. lead frame bar according to claim 1, is characterized in that the side pin of a lead frame unit in described some lead frame unit compared with corresponding side pin in its adjacent wires frame unit away from the chip carrier of this lead frame unit.
8. lead frame bar as claimed in claim 1, is characterized in that every side pin-pitch of each in described some lead frame unit is less than or equal to 0.5mm.
9. lead frame bar as claimed in claim 1, is characterized in that the upper surface of each in described some pins is at least locally half-etching.
10. lead frame bar as claimed in claim 1, to is characterized in that in described some lead frame unit each having plastic packaging region, and in described some lead frame unit, both plastic packaging region adjacent offsets a distance each other.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520995651.9U CN205159315U (en) | 2015-12-03 | 2015-12-03 | Lead frame strip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520995651.9U CN205159315U (en) | 2015-12-03 | 2015-12-03 | Lead frame strip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205159315U true CN205159315U (en) | 2016-04-13 |
Family
ID=55694977
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520995651.9U Withdrawn - After Issue CN205159315U (en) | 2015-12-03 | 2015-12-03 | Lead frame strip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205159315U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105355619A (en) * | 2015-12-03 | 2016-02-24 | 日月光封装测试(上海)有限公司 | Lead frame bar |
-
2015
- 2015-12-03 CN CN201520995651.9U patent/CN205159315U/en not_active Withdrawn - After Issue
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105355619A (en) * | 2015-12-03 | 2016-02-24 | 日月光封装测试(上海)有限公司 | Lead frame bar |
| CN105355619B (en) * | 2015-12-03 | 2018-11-02 | 日月光封装测试(上海)有限公司 | Lead frame item |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20161229 Address after: 201201 room T3-100201, No. 5001 East Road, Shanghai, Pudong New Area Patentee after: Advanced integrated circuit manufacturing (Chinese) Co. Ltd. Patentee after: ASE Assembly & Test (Shanghai) Ltd. Address before: 201203 Shanghai Guo Shou Jing Road, Pudong New Area Zhangjiang hi tech Park No. 669 Patentee before: ASE Assembly & Test (Shanghai) Ltd. |
|
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20170401 Address after: 201203 Shanghai city Chinese (Shanghai) free trade zone 669 GuoShouJing Road No. six building Patentee after: ASE Assembly & Test (Shanghai) Limited Address before: 201201 room T3-100201, No. 5001 East Road, Shanghai, Pudong New Area Patentee before: Advanced integrated circuit manufacturing (Chinese) Co. Ltd. Patentee before: ASE Assembly & Test (Shanghai) Limited |
|
| AV01 | Patent right actively abandoned | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20160413 Effective date of abandoning: 20181102 |