CN204464266U - A kind of POP Stacked die package structure of little sphere gap - Google Patents
A kind of POP Stacked die package structure of little sphere gap Download PDFInfo
- Publication number
- CN204464266U CN204464266U CN201520238397.8U CN201520238397U CN204464266U CN 204464266 U CN204464266 U CN 204464266U CN 201520238397 U CN201520238397 U CN 201520238397U CN 204464266 U CN204464266 U CN 204464266U
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- CN
- China
- Prior art keywords
- top layer
- weld pad
- packaging
- base plate
- potted element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
The utility model discloses a kind of POP Stacked die package structure of little sphere gap, it comprises top layer potted element (1) and bottom potted element (2), and top layer potted element (1) comprises the upper weld pad (7) being arranged on top layer base plate for packaging (4) upper surface, the lower weld pad (8) being arranged on top layer base plate for packaging (4) lower surface and via (9); Bottom potted element (2) also comprises the upper weld pad (7) being arranged on bottom seal (12) upper surface, the lower weld pad (8) being arranged on bottom base plate for packaging (13) lower surface and via (9); The upper weld pad (7) be connected, lower weld pad (8) and via (9) composition I-shaped structure, the lower weld pad (8) of top layer base plate for packaging (4) is connected with the upper weld pad (7) of bottom potted element (2) by top layer soldered ball (11), and via (9) is in trapezium structure.The utility model has the features such as structural strength is large, load performance good, radiating efficiency is high, little sphere gap.
Description
Technical field
The utility model relates to field of semiconductor package, particularly relates to a kind of POP Stacked die package structure of little sphere gap.
Background technology
Boundary line between the appearance of PoP (Package on Package) stacking mounting technology is fuzzyyer level package and secondary assemble, while greatly improving logical operation function and memory space, also for terminal use provides the possibility of unrestricted choice combination of devices, production cost is also able to more effective control.A considerable preferred version is undoubtedly for 3G mobile PoP.Not mediocre put no, along with the appearance of small-sized high density encapsulation, at a high speed and the high accuracy requirement of assembling become more crucial.Relevant mounting equipment and technique also have more advance and high flexibility.The stacking assembling of components and parts (Package on Package) technology must stand this new challenge.
Current POP laminated packaging structure, usually can run into the problems such as packaging body warpage, load performance is poor, radiating efficiency is low, space between solder balls is large.
Utility model content
The purpose of this utility model is to overcome the deficiencies in the prior art, provides a kind of POP Stacked die package structure of little sphere gap, has the features such as structural strength is large, load performance good, radiating efficiency is high, little sphere gap.
The purpose of this utility model is achieved through the following technical solutions: a kind of POP Stacked die package structure of little sphere gap, it comprises top layer potted element and bottom potted element, comprise top layer seal, one or more top layer packaged chip, encapsulation pad, top layer base plate for packaging and top layer soldered ball in top layer potted element from top to bottom successively, in bottom potted element, comprise bottom seal, bottom packaged chip, bottom base plate for packaging and bottom soldered ball from top to bottom successively.
Top layer potted element also comprises the upper weld pad being arranged on top layer base plate for packaging upper surface, the lower weld pad being arranged on top layer base plate for packaging lower surface and the via for being connected upper weld pad and lower weld pad.
Bottom potted element also comprises the upper weld pad being arranged on bottom seal upper surface, the lower weld pad being arranged on bottom base plate for packaging lower surface and the via for being connected upper weld pad and lower weld pad.
The upper weld pad be connected, lower weld pad and via composition I-shaped structure, the lower weld pad of top layer base plate for packaging is connected with the upper weld pad of bottom potted element by top layer soldered ball, and via is trapezium structure.
The sphere diameter of top layer soldered ball is 0.26 mm, and the sphere diameter of bottom soldered ball is 0.25 mm, and the astrosphere spacing of adjacent two top layer soldered balls is 0.5mm, and the astrosphere spacing of adjacent two bottom soldered balls is 0.283 mm.
Described top layer packaged chip is fixed on encapsulation pad, and is connected by the upper weld pad of connecting line with top layer base plate for packaging upper surface, and bottom packaged chip is fixed on bottom base plate for packaging by the mode of upside-down mounting.
Described bottom packaged chip is arranged in the trapezoidal tapers bench-type groove of bottom seal.
The beneficial effects of the utility model are:
1) the utility model adopts the upper weld pad of composition I-shaped structure, lower weld pad and via, wherein, via is also set to trapezium structure, the load performance of effective lifting stacked package body, thinner substrate also can not be affected, the pressure-bearing property problem of Multi-Stack Die, the utility model structural strength is larger.
2) in the utility model, bottom seal is provided with trapezoidal tapers bench-type groove, has both ensured that bottom potted element had stronger structural, and has expanded again the heat-dissipating space of bottom packaged chip, can solve the heat dissipation problem of stacked package chip better.
3) in the utility model, soldered ball sphere diameter can be arranged between 0.245mm ~ 0.25mm, and the spacing between soldered ball can be made as 0.283mm, reaches the object that thin space POP encapsulates.
Accompanying drawing explanation
Fig. 1 is the structure chart of the utility model POP Stacked die package structure;
In figure, 1-top layer potted element, 2-bottom potted element, 3-top layer seal, 4-top layer base plate for packaging, 5-top layer packaged chip, 6-encapsulates pad, the upper weld pad of 7-, weld pad under 8-, 9-via, 10-bonding wire, 11-top layer soldered ball, 12-bottom seal, 13-bottom base plate for packaging, 14-bottom packaged chip, 15-bottom soldered ball.
Embodiment
Below in conjunction with accompanying drawing, the technical solution of the utility model is described in further detail, but protection range of the present utility model is not limited to the following stated.
As shown in Figure 1, a kind of POP Stacked die package structure of little sphere gap, it comprises top layer potted element 1 and bottom potted element 2.
Top layer seal 3, one or more top layer packaged chip 5, encapsulation pad 6, top layer base plate for packaging 4 and top layer soldered ball 11 is comprised from top to bottom successively in top layer potted element 1.
Top layer potted element 1 also comprises the upper weld pad 7 being arranged on top layer base plate for packaging 4 upper surface, the lower weld pad 8 being arranged on top layer base plate for packaging 4 lower surface and the via 9 for being connected upper weld pad 7 and lower weld pad 8.
Bottom seal 12, one or more bottom packaged chip 14, bottom base plate for packaging 13 and bottom soldered ball 15 is comprised from top to bottom successively in bottom potted element 2.
Bottom potted element 2 also comprises the upper weld pad 7 being arranged on bottom seal 12 upper surface, the lower weld pad 8 being arranged on bottom base plate for packaging 13 lower surface and the via 9 for being connected upper weld pad 7 and lower weld pad 8.
Be copper post in via 9, the height of the via 9 of top layer potted element 1 is identical with the thickness of top layer base plate for packaging 4, and the height of the via 9 of bottom potted element 2 and bottom seal 12 are identical with after the thickness of bottom base plate for packaging 13.
The upper weld pad 7 be connected, lower weld pad 8 and via 9 form I-shaped structure, and the lower weld pad 8 of top layer base plate for packaging 4 is connected with the upper weld pad 7 of bottom potted element 2 by top layer soldered ball 11, and via 9 is in trapezium structure.The load performance of effective lifting stacked package body, makes thinner substrate also can not affect, and the pressure-bearing property problem of Multi-Stack Die, the utility model structural strength is larger.
The sphere diameter of top layer soldered ball 11 is 0.26mm, and the sphere diameter of bottom soldered ball 15 is 0.25mm, and ball center's spacing of adjacent two top layer soldered balls 11 is 0.5mm, and the astrosphere spacing of adjacent two bottom soldered balls 15 is 0.283mm.
The thick scaling powder of 0.175mm is also provided with between top layer potted element 1 and bottom potted element 2.The thickness of bottom potted element 2 is 0.3mm.
Described top layer packaged chip 5 is fixed on encapsulation pad 6, and is connected by the upper weld pad 7 of connecting line 10 with top layer base plate for packaging 4 upper surface, and multiple top layer packaged chip 5 is all electrically connected with top layer base plate for packaging 4 by the mode of formal dress.Bottom packaged chip 14 is electrically connected with bottom base plate for packaging 13 by the mode of upside-down mounting.
Described bottom packaged chip 14 is arranged in the trapezoidal tapers bench-type groove of bottom seal 12.Both ensured that bottom potted element had stronger structural, and expanded again the heat-dissipating space of bottom packaged chip, the heat dissipation problem of stacked package chip can be solved better.
Claims (3)
1. the POP Stacked die package structure of a little sphere gap, it is characterized in that: it comprises top layer potted element (1) and bottom potted element (2), comprise top layer seal (3), one or more top layer packaged chip (5), encapsulation pad (6), top layer base plate for packaging (4) and top layer soldered ball (11) in top layer potted element (1) from top to bottom successively, in bottom potted element (2), comprise bottom seal (12), one or more bottom packaged chip (14), bottom base plate for packaging (13) and bottom soldered ball (15) from top to bottom successively;
Top layer potted element (1) also comprises the upper weld pad (7) being arranged on top layer base plate for packaging (4) upper surface, the lower weld pad (8) being arranged on top layer base plate for packaging (4) lower surface and the via (9) for being connected upper weld pad (7) and lower weld pad (8);
Bottom potted element (2) also comprises the upper weld pad (7) being arranged on bottom seal (12) upper surface, the lower weld pad (8) being arranged on bottom base plate for packaging (13) lower surface and the via (9) for being connected upper weld pad (7) and lower weld pad (8);
The upper weld pad (7) be connected, lower weld pad (8) and via (9) composition I-shaped structure, the lower weld pad (8) of top layer base plate for packaging (4) is connected with the upper weld pad (7) of bottom potted element (2) by top layer soldered ball (11), and via (9) is in trapezium structure;
The sphere diameter of top layer soldered ball (11) is 0.26mm, and the sphere diameter of bottom soldered ball (15) is 0.25mm, and ball center's spacing of adjacent two top layer soldered balls (11) is 0.5mm, and ball center's spacing of adjacent two bottom soldered balls (15) is 0.283mm.
2. the POP Stacked die package structure of a kind of little sphere gap according to claim 1, it is characterized in that: described top layer packaged chip (5) is fixed in encapsulation pad (6), and be connected with the upper weld pad (7) of top layer base plate for packaging (4) upper surface by connecting line (10), bottom packaged chip (14) is fixed on bottom base plate for packaging (13) by the mode of upside-down mounting.
3. the POP Stacked die package structure of a kind of little sphere gap according to claim 1, is characterized in that: described bottom packaged chip (14) is arranged in the trapezoidal tapers bench-type groove of bottom seal (12).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520238397.8U CN204464266U (en) | 2015-04-20 | 2015-04-20 | A kind of POP Stacked die package structure of little sphere gap |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520238397.8U CN204464266U (en) | 2015-04-20 | 2015-04-20 | A kind of POP Stacked die package structure of little sphere gap |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204464266U true CN204464266U (en) | 2015-07-08 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520238397.8U Expired - Fee Related CN204464266U (en) | 2015-04-20 | 2015-04-20 | A kind of POP Stacked die package structure of little sphere gap |
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| Country | Link |
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| CN (1) | CN204464266U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115656968A (en) * | 2022-11-04 | 2023-01-31 | 扬州扬芯激光技术有限公司 | High-interconnection high-integration laser radar chip packaging structure and packaging process |
-
2015
- 2015-04-20 CN CN201520238397.8U patent/CN204464266U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115656968A (en) * | 2022-11-04 | 2023-01-31 | 扬州扬芯激光技术有限公司 | High-interconnection high-integration laser radar chip packaging structure and packaging process |
| CN115656968B (en) * | 2022-11-04 | 2023-12-01 | 扬州扬芯激光技术有限公司 | High-interconnection high-integration laser radar chip packaging structure and packaging process |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150708 Termination date: 20160420 |
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| CF01 | Termination of patent right due to non-payment of annual fee |