CN115656968A - High-interconnection high-integration laser radar chip packaging structure and packaging process - Google Patents
High-interconnection high-integration laser radar chip packaging structure and packaging process Download PDFInfo
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 44
- 238000003466 welding Methods 0.000 claims description 33
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- 229910052802 copper Inorganic materials 0.000 claims description 30
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- 239000010703 silicon Substances 0.000 claims description 4
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Abstract
The invention discloses a high-interconnection high-integration laser radar chip packaging structure and a packaging process, belongs to the technical field of integrated circuit packaging, and solves the problems of low integration level, weak electrical interconnection and low return loss in the prior art. The electric chip, the optical chip and the substrate are arranged in the same packaging body and are tightly stacked, so that the integration level of laser radar packaging is effectively improved, the packaging body is made of a packaging material with a lens shape and directly used as an optical signal transmission path, the integration level of the laser radar chip is further improved, and the electric interconnection among the optical chip, the electric chip and the substrate is realized through the cooperation of the electric through hole and the RDL wiring layer.
Description
Technical Field
The invention belongs to the technical field of integrated circuit packaging, and particularly relates to a high-interconnection high-integration laser radar chip packaging structure and a packaging process.
Background
In applications such as automatic driving and automatic robots, laser radar is a key component, and with the popularization of laser radar equipment, laser radar chip packaging also becomes integrated and miniaturized. In the field of high-density packaging of integrated circuits, it is generally desired to achieve further miniaturization of thickness and size of packaged chips, and advanced chip packaging technologies such as 2.5D and 3D have appeared as compared with past packaging structures, so that the advanced packaging technologies can achieve lower power consumption, smaller size, and superior compatibility of chips. In view of these advantages, the use of such advanced packaging techniques is necessary. In advanced packaging, designing electrical vias (copper pillar interconnects) is a key technology. The technology has multiple advantages, such as improved electromigration resistance, improved electrical and thermal conductivity, simplified Under Bump Metallization (UBM) and higher I/O (input/output) density, and the copper pillar interconnection technology can replace the wire bonding technology by matching with the micro bump preparation technology to realize the integration and miniaturization of the packaging structure. Compared with the conventional packaging technology, the copper pillar interconnection technology has the advantages of small size of a packaged body, low power consumption, large stacking density in the three-dimensional direction and the like after packaging, so that the technology is popularized in various high-speed circuits and miniaturized systems and becomes one of the excellent electronic packaging technologies at present. However, since the lidar needs to be applied to a severe environment, such as high radiation, high temperature fluctuation, etc., during operation, the reliability of the package structure needs to be ensured, and electrical interconnection is a key of a high-density package technology.
In the case of high-speed interconnection, transmission loss, crosstalk and reflection caused by interconnection leads between chips cannot be ignored, and parasitic inductance of the interconnection leads also greatly affects performance. The laser radar packaging body has the advantages of large volume, low integration level, small IO (input output) scale and high parasitic inductance. Meanwhile, the traditional electrical through holes are rectangular, cylindrical and the like in geometric shape, the electrical through holes are large in full size, so that the overall electrical performance of the electrical through holes is reduced, the electrical through holes are large in capacitance, and the defects of low gain, low return loss and low electrical interconnection performance are caused under the high-frequency condition.
Disclosure of Invention
The invention aims to provide a high-interconnection high-integration laser radar chip packaging structure and a packaging process, which have high integration level, strong electrical interconnection and high return loss, aiming at the defects in the prior art.
In order to achieve the technical purpose, the high-interconnection high-integration laser radar chip packaging structure and the packaging process adopt the technical scheme that:
the utility model provides a high integration laser radar chip packaging structure of interconnection height, includes the packaging body, be provided with strip optical chip along the horizontal direction in the packaging body, optical chip afterbody top is equipped with arranges the electric chip in the packaging body in, connect through copper post interconnect structure between optical chip and the electric chip, copper post interconnect structure includes along optical chip afterbody horizontal direction evenly distributed's a plurality of electric through-hole spare, electric through-hole spare internal diameter is narrowed to the middle part by top and bottom simultaneously, forms the upper and lower constant diameter circular truncated cone and the middle part narrow diameter cylinder of integrative connection, electric through-hole spare includes by interior electric through-hole copper layer and the silica layer of establishing toward outer cover in proper order, the silica layer internal portion forms the electric through-hole who link up, the internal surface is equipped with bonding pad and bonding pad down respectively about the electric through-hole spare, it has the solder ball to go up bonding of bonding pad surface, go up solder ball another side and the electric core piece of transversely arranging in the packaging body in mutually, the electric chip surface stacks and is equipped with heat dissipation sheetmetal piece, closely pack transparent packaging material body surface between electric chip lateral part and packaging body inner wall, packaging body, packaging material makes the optical signal transmission material body bonding pad bonding, the welding bottom substrate is stacked under the welding is equipped with a plurality of solder ball bonding pad, the welding substrate under the welding.
Preferably, the optical chip is a transmitting optical chip or a receiving optical chip, the upper end and the lower end of the tail part of the optical chip are respectively provided with a plurality of electric through holes, and the electric chip is used for processing and controlling the optical chip.
Preferably, the optical chip, the electrical chip and the substrate are arranged in the same package body in a laminated manner, the electrical chip is flip-chip bonded to the optical chip, and the optical chip is bonded to the substrate.
Preferably, the upper surface and the lower surface of the optical chip and the substrate are both provided with wiring RDLs.
Preferably, the heat dissipation metal sheet is a copper sheet plated on the surface of the electric chip and clings to the plastic packaging layer on the upper surface of the packaging body.
Preferably, the package material is a molding compound having a lens morphology.
A high-interconnection high-integration laser radar chip packaging process comprises the following steps:
(1) Performing silicon through holes on the right part of the optical chip to form an electrical through hole part, and simultaneously performing RDL wiring on the upper and lower surfaces of the optical chip and the substrate, wherein the RDL wiring layer is communicated with the electrical through hole part;
(2) The method comprises the following steps of (1) inversely crystal welding an electric chip on the surface of an optical chip, welding the optical chip on the surface of a substrate, plating a heat dissipation metal sheet on the surface of the electric chip to form a packaging body with a lens shape, wrapping the substrate and the optical chip by the packaging body, covering the surface of the electric chip, and tightly attaching the heat dissipation metal sheet to the inner wall of the packaging body;
(3) Electrically introducing the RDL wiring layer at the bottom of the substrate into the plastic packaging layer at the bottom of the packaging body, and connecting the RDL wiring layer with the circuit board through a bottom solder ball;
(4) The coating film is coated on the outer part of the surface of the packaging body except the heat dissipation metal sheet, so that the light signal transmittance is improved, and useless light is filtered.
The RDL wiring process in the step (1) comprises the following steps:
s1, cleaning and drying an optical chip and a substrate with an electric through hole;
s2, sputtering a copper seed layer on the surfaces of the optical chip and the substrate;
s3, throwing positive photoresist, then coating a layer of photoresist, wherein the positive photoresist is AZ series, and patterning by a photoetching machine according to wiring trend;
s4, depositing metal copper in the copper electroplating solution to realize copper electroplating;
and S5, removing the photoresist and the seed layer to form the RDL wiring layer.
The preparation of the packaging body in the step (2) comprises the following steps: and carrying out lens patterning treatment on the mold, and filling the transparent plastic packaging material into the mold to form the whole lens morphology packaging body.
The coating layer in the step (4) is prepared by a sol-gel method and then is subjected to acid catalysis to prepare the silicon dioxide antireflection film, the light transmittance of the silicon dioxide antireflection film exceeds 95%, the working wavelength range of the silicon dioxide film is 200-2000 nm, and the refractive index of the silicon dioxide film is 1.46.
Compared with the prior art, the invention has the beneficial effects that:
1. the electric chip, the optical chip and the substrate are arranged in the same packaging body and are tightly stacked, so that the integration level of the laser radar packaging is effectively improved, and the packaging body is made of a packaging material with a lens shape and directly used as an optical signal transmission path, so that the integration level of the laser radar chip is further improved, and the problem that lenses with other shapes are inconsistent with the packaging body structure is avoided;
2. the optical chip is used as an intermediate layer, the high-interconnection electric through holes are designed in the optical chip, the electric chips and the substrate are electrically interconnected by matching the electric through holes with the RDL wiring layer, and meanwhile, the lead bonding in the traditional process is replaced;
3. according to the invention, the silicon dioxide layer is arranged in the electric through hole part, so that the thermal stress released by the electric through hole is relieved, the reliability of the electric through hole is improved, meanwhile, the upper part and the lower part of the electric through hole are conical, the high return loss is realized by utilizing the low capacitance characteristic of the conical capacitor, and the electric interconnection and the reliability between chips are effectively improved.
Drawings
FIG. 1 is a schematic structural view of the present invention;
FIG. 2 is a schematic structural view of an electrical via of the present invention;
fig. 3 is a graph comparing the return loss of the electrical via of the present invention with that of the conventional cylindrical electrical via.
In the figure: 1. a package body; 2. an optical chip; 3. an electrical chip; 4. an electrical via; 5. mounting a welding disc; 6. a lower welding plate; 7. solder balls are arranged; 8. a heat dissipating metal sheet; 9. an encapsulating material body; 10. coating a film layer; 11. a lower solder ball; 12. a substrate; 13. welding a disc; 14. bottom solder balls;
401. an electrical via layer; 402. a silicon dioxide layer.
Detailed Description
The invention is further described with reference to the following figures and detailed description:
as shown in fig. 1-2, a highly-interconnected highly-integrated lidar chip package structure comprises a package body 1, wherein a strip-shaped optical chip 2 is arranged in the package body 1 along the horizontal direction, an electrical chip 3 arranged in the package body 1 is arranged above the tail part of the optical chip 2, the optical chip 2 and the electrical chip 3 are connected through a copper pillar interconnection structure, the copper pillar interconnection structure comprises a plurality of electrical through hole parts 4 uniformly distributed along the horizontal direction of the tail part of the optical chip 2, the inner diameters of the electrical through hole parts 4 are narrowed from the top part and the bottom part to the middle part simultaneously to form an integrally connected upper and lower equal-diameter truncated cone and a middle narrow-diameter cylinder, the electrical through hole parts 4 comprise an electrical through hole copper layer 401 and a silicon dioxide layer 402 which are sequentially sleeved from inside to outside, the silicon dioxide layer 402 is internally provided with a through electric through hole, the upper inner surface and the lower inner surface of the electric through hole part 4 are respectively provided with an upper welding disc 5 and a lower welding disc 6, the surface of the upper welding disc 5 is welded with an upper welding ball 7, the other surface of the upper welding ball 7 is welded with an electric chip 3 transversely arranged in a packaging body 1, the surface of the electric chip 3 is overlapped with a heat dissipation metal sheet 8, a transparent packaging material body 9 is tightly filled between the side part of the electric chip 3 and the inner wall of the packaging body 1, the packaging material body 9 enables optical signals to be stably transmitted, the surface of the packaging material body 9 is overlapped with a coating layer 10, the bottom of the lower welding disc 6 is welded with a lower welding ball 11, the other surface of the lower welding ball 11 is welded with a substrate 12 transversely arranged in the packaging body 1, and the bottom of the substrate 12 is welded with a plurality of bottom welding balls 14 through a welding disc 13. The substrate 12 is a silicon substrate or a substrate made of other materials, so that the optical chip 2 is electrically conducted with a conventional PCB, and the optical chip 2 is protected, supported, radiated and formed with a standardized mounting size, and the optical chip has the characteristics of thinness, high density and high precision, the silicon dioxide layer 402 in the electrical through hole piece 4 effectively relieves the thermal stress released by the electrical through hole, so that the reliability of the electrical through hole is improved, and meanwhile, the electrical through hole leads out the electrical property of the optical chip 2, so that the optical chip 2, the electrical chip 3 and the substrate 12 are electrically connected.
In the invention, the optical chip 2 is a light emitting chip or a light receiving chip, the upper end and the lower end of the tail part of the optical chip are respectively provided with a plurality of electric through holes, and the electric chip 3 is used for processing and controlling the optical chip.
In the invention, the optical chip 2, the electric chip 3 and the substrate 12 are arranged in the same packaging body 1 through lamination, the electric chip 3 is welded on the optical chip 2 in an inverted crystal mode, and the optical chip 2 is welded on the substrate 12.
In the present invention, the upper and lower surfaces of the optical chip 2 and the substrate 12 are provided with wirings RDL. The RDL wiring layer is connected with the electric through holes, so that the optical chip 2, the electric chip 3 and the substrate 12 are conveniently and electrically connected with each other, then the electric property is introduced to the surface of the plastic package layer through the RDL wiring layer on the upper surface and the lower surface of the substrate 12, and then the RDL wiring layer is connected with the circuit board through the bottom welding balls 14, and the wire bonding process in the traditional process is effectively replaced.
In the invention, the heat dissipation metal sheet 8 is a copper sheet, and is plated on the surface of the electric chip 3 and tightly attached to the plastic packaging layer on the upper surface of the packaging body 1. The heat conductivity coefficient of the metal copper material is 401 (W/m.K), the metal copper material has good heat transfer performance, good ductility and strong corrosion resistance, and can enable heat generated by the electric chip 3 to be dissipated out of the packaging body through the copper sheet in time.
In the invention, the packaging body material is a plastic packaging material with a lens shape. The packaging body is set to have the lens shape, so that the packaging body replaces a lens which needs to be additionally set, the problem that the structure of the additional lens is inconsistent with that of the packaging body is avoided, meanwhile, the packaging body is directly used as an optical transmission path of the optical chip, optical signals are directly transmitted, and the integration level of the laser radar chip is further improved.
In the case of high-speed interconnection, transmission loss, crosstalk and reflection caused by interconnection leads among chips cannot be ignored, and parasitic inductance of the interconnection leads also greatly influences performance, while the existing optical chip and electric chip are packaged respectively, and then are interconnected by using a wire bonding packaging technology, but the whole laser radar packaging body has large volume, low integration level, small IO scale and high parasitic inductance;
the optical chip, the electric chip and the substrate are arranged in the same packaging body in a laminated mode, the electric chip is welded on the optical chip in an inverted crystal mode, and the optical chip is welded on the substrate;
the electrical through hole part is internally provided with the silicon dioxide layer, so that the thermal stress released by the electrical through hole is effectively relieved, the reliability of the electrical through hole is improved, the electrical through hole is arranged into an integrated structure of an upper equal-diameter truncated cone, a lower equal-diameter truncated cone and a middle narrow-diameter cylinder, the surface area of the structure is reduced at high frequency, the electrical through hole has the low capacitance of a tapered capacitor, and the Z-axis structure is Z-axis cap Very small, the reflection coefficient becomes negative, as shown by the equation:
the small capacitance (large ZCap) of the tapered electrical vias provides a small emissivity
Resulting in a small negative reflected voltage that cancels a portion of the incident voltage and thus a small undershoot in the peak voltage of the impedance, the tapered electrical via is relatively high return loss, high gain, and thus the structure improves the electrical interconnection between chips.
As shown in fig. 3, under different frequencies, the electrical via structure of the present invention has a higher return loss than the conventional cylindrical electrical via structure, where the return loss is reflection generated by impedance mismatch of a cable link and introduces signal fluctuation, and the electrical via structure of the present invention has a high return loss, good matching, less reflection of electrical signals, and good transmission.
A high-interconnection high-integration laser radar chip packaging process comprises the following steps:
(1) Performing silicon through holes on the right part of the optical chip to form an electric through hole part, and simultaneously performing RDL wiring on the upper and lower surfaces of the optical chip and the substrate, wherein the RDL wiring layer is communicated with the electric through hole part;
(2) The method comprises the following steps of (1) inversely crystal welding an electric chip on the surface of an optical chip, welding the optical chip on the surface of a substrate, plating a heat dissipation metal sheet on the surface of the electric chip to form a packaging body with a lens shape, wrapping the substrate and the optical chip by the packaging body, covering the surface of the electric chip, and tightly attaching the heat dissipation metal sheet to the inner wall of the packaging body;
(3) The RDL wiring layer at the bottom of the substrate electrically introduces the plastic package layer at the bottom of the package body and is connected with the circuit board through a bottom solder ball;
(4) The coating film is coated outside the part, except the heat dissipation metal sheet, of the surface of the packaging body, so that the light signal transmittance is improved, and the useless light is filtered.
The RDL wiring process in the step (1) comprises the following steps:
s1, cleaning and drying an optical chip and a substrate with an electric through hole;
s2, sputtering a copper seed layer on the surfaces of the optical chip and the substrate;
s3, throwing positive photoresist, then coating a layer of photoresist, wherein the positive photoresist is AZ series, and patterning is carried out by a photoetching machine according to wiring trend;
s4, depositing metal copper in the copper plating solution to realize copper electroplating;
and S5, removing the photoresist and the seed layer to form the RDL wiring layer.
The preparation of the packaging body in the step (2) comprises the following steps: and carrying out lens patterning treatment on the mold, and filling the mold with a transparent plastic package material to form the whole lens shape packaging body.
The film coating layer in the step (4) is prepared by a sol-gel method, and then the silicon dioxide antireflection film is prepared by acid catalysis, the light transmittance of the silicon dioxide antireflection film exceeds 95%, the working wavelength range of the silicon dioxide film is 200-2000 nm, and the refractive index of the silicon dioxide film is 1.46.
Therefore, the present invention is not limited to the specific embodiments, but rather, the present invention is intended to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.
Claims (10)
1. The utility model provides a high integration laser radar chip package structure of high interconnection, includes the packaging body, be provided with strip optical chip along the horizontal direction in the packaging body, optical chip afterbody top is equipped with arranges the electric chip in the packaging body in, its characterized in that: the optical chip and the electric chip are connected through a copper column interconnection structure, the copper column interconnection structure comprises a plurality of electric through hole pieces which are uniformly distributed along the horizontal direction of the tail of the optical chip, the inner diameters of the electric through hole pieces are narrowed from the top to the middle simultaneously through the top and the bottom, an upper equal-diameter cone frustum and a middle narrow-diameter cylinder which are connected integrally are formed, each electric through hole piece comprises an electric through hole copper layer and a silicon dioxide layer which are sequentially sleeved from the inside to the outside, a through electric through hole is formed in each silicon dioxide layer, an upper welding disc and a lower welding disc are respectively arranged on the upper inner surface and the lower inner surface of each electric through hole piece, an upper welding ball is welded on the surface of the upper welding disc, the other surface of the upper welding ball is welded with an electric core plate which is transversely arranged in a packaging body, a heat dissipation metal plate is stacked on the surface of the electric chip, a transparent packaging material body is tightly filled between the side of the electric chip and the inner wall of the packaging body, the packaging material body enables optical signals to be stably transmitted, a coating film is stacked on the surface of the packaging material body, a lower welding ball layer is stacked on the surface of the packaging material, a lower welding disc is welded on the bottom of the lower welding disc, the lower welding ball is welded with a substrate which is welded with the substrate which is transversely arranged in the packaging body, and a plurality of the bottom of the packaging body.
2. The highly-interconnected and highly-integrated lidar chip package structure of claim 1, wherein: the optical chip is a transmitting optical chip or a receiving optical chip, the upper end and the lower end of the tail part of the optical chip are respectively provided with a plurality of electric through holes, and the electric chips are used for processing and controlling the optical chip.
3. The highly-interconnected and highly-integrated lidar chip package structure of claim 1, wherein: the optical chip, the electric chip and the substrate are arranged in the same packaging body in a laminated mode, the electric chip is welded on the optical chip in an inverted crystal mode, and the optical chip is welded on the substrate.
4. The highly-interconnected highly-integrated lidar chip package structure of claim 3, wherein: and wiring RDLs are arranged on the upper surface and the lower surface of the optical chip and in the substrate.
5. The highly-interconnected highly-integrated lidar chip package structure of claim 1, wherein: the heat dissipation metal sheet is a copper sheet which is plated on the surface of the electric chip and clings to the plastic packaging layer on the upper surface of the packaging body.
6. The highly-interconnected highly-integrated lidar chip package structure of claim 1, wherein: the packaging body material is a plastic packaging material with a lens shape.
7. A high-interconnection high-integration laser radar chip packaging process is characterized by comprising the following steps: the method comprises the following steps:
(1) Performing silicon through holes on the right part of the optical chip to form an electric through hole part, and simultaneously performing RDL wiring on the upper and lower surfaces of the optical chip and the substrate, wherein the RDL wiring layer is communicated with the electric through hole part;
(2) The method comprises the following steps of (1) inversely crystal welding an electric chip on the surface of an optical chip, welding the optical chip on the surface of a substrate, plating a heat dissipation metal sheet on the surface of the electric chip to form a packaging body with a lens shape, wrapping the substrate and the optical chip by the packaging body, covering the surface of the electric chip, and tightly attaching the heat dissipation metal sheet to the inner wall of the packaging body;
(3) The RDL wiring layer at the bottom of the substrate electrically introduces the plastic package layer at the bottom of the package body and is connected with the circuit board through a bottom solder ball;
(4) The coating film is coated outside the part, except the heat dissipation metal sheet, of the surface of the packaging body, so that the light signal transmittance is improved, and the useless light is filtered.
8. The high-interconnection high-integration laser radar chip packaging process according to claim 7, wherein: the RDL wiring process in the step (1) comprises the following steps:
s1, cleaning and drying an optical chip and a substrate with an electric through hole;
s2, sputtering a copper seed layer on the surfaces of the optical chip and the substrate;
s3, throwing positive photoresist, then coating a layer of photoresist, wherein the positive photoresist is AZ series, and patterning is carried out by a photoetching machine according to wiring trend;
s4, depositing metal copper in the copper plating solution to realize copper electroplating;
and S5, removing the photoresist and the seed layer to form the RDL wiring layer.
9. The high-interconnection high-integration laser radar chip packaging process according to claim 7, wherein: the preparation of the packaging body in the step (2) comprises the following steps: and carrying out lens patterning treatment on the mold, and filling the mold with a transparent plastic package material to form the whole lens shape packaging body.
10. The high-interconnection high-integration laser radar chip packaging process according to claim 7, wherein: the coating layer in the step (4) is prepared by a sol-gel method and then is subjected to acid catalysis to prepare the silicon dioxide antireflection film, the light transmittance of the silicon dioxide antireflection film exceeds 95%, the working wavelength range of the silicon dioxide film is 200-2000 nm, and the refractive index of the silicon dioxide film is 1.46.
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| CN108242433A (en) * | 2017-12-05 | 2018-07-03 | 上海交通大学 | A kind of method that hyperfine package lead is realized based on photoetching and plating |
| US20210181310A1 (en) * | 2019-03-13 | 2021-06-17 | Shanghai Jiao Tong University | Chip-scale silicon-based hybrid-integrated lidar system |
| CN111146194A (en) * | 2019-12-30 | 2020-05-12 | 华进半导体封装先导技术研发中心有限公司 | System-in-package structure and manufacturing method |
| CN111554647A (en) * | 2020-05-19 | 2020-08-18 | 上海先方半导体有限公司 | Wafer-level chip structure, multi-chip stacking interconnection structure and preparation method |
| CN112820725A (en) * | 2020-12-30 | 2021-05-18 | 华进半导体封装先导技术研发中心有限公司 | Laser radar chip packaging structure and packaging method |
| CN114582731A (en) * | 2022-05-05 | 2022-06-03 | 华进半导体封装先导技术研发中心有限公司 | Lower packaging body structure of stacked package and forming method thereof |
| CN217522004U (en) * | 2022-07-01 | 2022-09-30 | 江苏明微电子有限公司 | Photoelectric chip integrated packaging structure |
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