CN217522004U - Photoelectric chip integrated packaging structure - Google Patents
Photoelectric chip integrated packaging structure Download PDFInfo
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- CN217522004U CN217522004U CN202221694090.5U CN202221694090U CN217522004U CN 217522004 U CN217522004 U CN 217522004U CN 202221694090 U CN202221694090 U CN 202221694090U CN 217522004 U CN217522004 U CN 217522004U
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- packaging
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Abstract
The application discloses integrated packaging structure of photoelectricity chip includes: the optical chip is arranged in a positive mode and provided with a first bonding pad; the packaging layer is coated on the optical chip, a convex block is formed on the upper portion of the packaging layer and is in a spherical crown shape, the position of the convex block is opposite to that of the optical chip, and a conductive connecting piece vertically penetrating through the packaging layer is embedded in the packaging layer; the electric chip is reversely mounted on the upper part of the packaging layer, the electric chip and the optical chip are arranged in a staggered mode, and the electric chip is provided with a second bonding pad connected to the upper end of the conductive connecting piece and a third bonding pad arranged opposite to the first bonding pad; and the wiring layer is arranged at the lower part of the packaging layer, one end of a wire of the wiring layer is connected with the lower end of the conductive connecting piece, and a solder ball is formed at the other end of the wire of the wiring layer. The utility model provides a current laser radar chip encapsulation with high costs, bulky problem.
Description
Technical Field
The utility model relates to a chip package technical field, concretely relates to integrated packaging structure of photoelectricity chip.
Background
The optical chip is applied to the fields of laser radars, detectors and the like. Lidar chip packages are also being developed towards miniaturization. In the prior art, ceramic metal packaging is generally adopted to package the optical and electrical chips respectively. The optical chip is packaged in a ceramic package with an optical window, the lens group and the transmitting mirror are used for transmitting and receiving light in a specific direction, and the corresponding control electric chip and the optical chip are respectively packaged in two packaging bodies. Thus, the packaging cost is high and the volume is large.
SUMMERY OF THE UTILITY MODEL
In order to overcome the defects in the prior art, a photoelectric chip integrated packaging structure is provided so as to solve the problems of high cost and large volume of the conventional laser radar chip packaging.
In order to achieve the above object, there is provided a photoelectric chip integrated package structure, including:
the optical chip is arranged in a normal installation mode and provided with a first bonding pad;
the packaging layer is coated on the optical chip, a convex block is formed on the upper portion of the packaging layer and is in a spherical crown shape, the position of the convex block is opposite to that of the optical chip, and a conductive connecting piece vertically penetrating through the packaging layer is embedded in the packaging layer;
the electric chip is reversely mounted on the upper part of the packaging layer, the electric chip and the optical chip are arranged in a staggered mode, and the electric chip is provided with a second bonding pad connected to the upper end of the conductive connecting piece and a third bonding pad arranged opposite to the first bonding pad; and
and the wiring layer is arranged at the lower part of the packaging layer, one end of a wire of the wiring layer is connected with the lower end of the conductive connecting piece, and a solder ball is formed at the other end of the wire of the wiring layer.
Furthermore, an insulating layer is laid on the outer side of the wiring layer.
Further, the conductive connecting piece is a metal column.
Further, the packaging layer is a transparent packaging layer.
The beneficial effects of the utility model reside in that, the utility model discloses an integrated packaging structure of photoelectricity chip is through on with optical chip and the integrated packaging layer of electric chip, whole structure adopts the plastic envelope mode, the lug through plano-convex lens is with the lens that replaces independent setting simultaneously, direct light transmission route as optical chip, the integrated level of laser radar chip has further been improved, the shape phase-match of having avoided biconvex lens to be difficult to with general packaging structure, lead to it to occupy the great defect of volume, very big reduction whole packaging structure's size, and a plurality of parts and structure have been saved, realized that the encapsulation integrated level is high, thickness is little and small, advantages such as with low costs.
Drawings
Other features, objects and advantages of the present application will become more apparent upon reading of the following detailed description of non-limiting embodiments thereof, made with reference to the accompanying drawings in which:
fig. 1 is a schematic structural diagram of an integrated package structure of a photoelectric chip according to an embodiment of the present invention.
Detailed Description
The present application will be described in further detail with reference to the following drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the relevant invention and are not limiting of the invention. It should be noted that, for convenience of description, only the portions related to the present invention are shown in the drawings.
It should be noted that, in the present application, the embodiments and features of the embodiments may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.
Referring to fig. 1, the utility model provides a photoelectric chip integrated package structure, include: optical chip 1, encapsulation layer 2, electrical chip 3 and wiring layer 21.
The optical chip 1 is arranged upright. The optical chip 1 has a first pad. In the present embodiment, "front-loading" is a setting in which the pads of the chip face upward; "Flip chip" refers to a chip with its pads facing down.
The encapsulation layer 2 covers the optical chip 1. Wherein, the packaging layer 2 is a transparent packaging layer. Bumps 23 are formed on the upper portion of the package layer 2. The projection 23 is in the shape of a spherical cap. The position of the bump 23 is the same as the optical chip 1. The conductive connecting piece 24 vertically penetrating through the packaging layer 2 is embedded in the packaging layer 2.
The conductive connecting member 24 is a metal pillar.
In this embodiment, the bump has the function of a plano-convex lens. The bumps are aligned with the optical functional component of the optical chip having the optical coupling structure.
The electrical chip 3 is flip-chip mounted on the upper portion of the encapsulation layer 2. The electric chips 3 are arranged in a staggered manner with the optical chips 1. The electric chip 3 has a second pad 32 connected to the upper end of the conductive connector 24 and a third pad 31 disposed opposite to the first pad.
The wiring layer 21 is provided at a lower portion of the encapsulation layer 2. One end of the wire of the wiring layer 21 is connected to the lower end of the conductive connector 24, and the other end of the wire of the wiring layer 21 is formed with a solder ball 211.
An insulating layer 22 is laid on the outer side of the wiring layer 21.
The utility model discloses an integrated packaging structure of photoelectricity chip makes the pad of photoelectricity chip and electric chip place relatively and the position corresponds through just adorning and the mode of flip-chip to can connect corresponding pad through the solder ball, perhaps direct bonding connection or contact connection between the pad.
The electric chip is an active photoelectric chip such as a laser, a modulator, a detector and the like or a photoelectric integrated chip with a plurality of structures. Specifically, the electrical chip is a silicon optical chip.
The utility model discloses an integrated packaging structure of photoelectricity chip passes through the wiring layer, can be so that the solder ball at the bottom evenly distributed of packaging layer, can the balanced overall electrical characteristic.
The utility model discloses an integrated packaging structure of photoelectricity chip is through on with optical chip and the integrated packaging layer of electric chip, whole structure adopts the plastic envelope mode, the lug through plano-convex lens is with replacing the lens that sets up alone simultaneously, direct light transmission route as optical chip, the integrated level of laser radar chip has further been improved, the shape phase-match of biconvex lens difficult to with general packaging structure has been avoided, lead to it to occupy the great defect of volume, very big reduction whole packaging structure's size, and a plurality of parts and structure have been saved, realized that the encapsulation integrated level is high, thickness is little and small, advantages such as with low costs.
The above description is only a preferred embodiment of the application and is illustrative of the principles of the technology employed. It will be understood by those skilled in the art that the scope of the present invention is not limited to the specific combination of the above-mentioned features, but also covers other embodiments formed by any combination of the above-mentioned features or their equivalents without departing from the spirit of the present invention. For example, the above features may be replaced with (but not limited to) features having similar functions disclosed in the present application.
Claims (4)
1. An optoelectronic chip integrated package structure, comprising:
the optical chip is arranged in a positive mode and provided with a first bonding pad;
the packaging layer is coated on the optical chip, a convex block is formed on the upper portion of the packaging layer and is in a spherical crown shape, the position of the convex block is opposite to that of the optical chip, and a conductive connecting piece vertically penetrating through the packaging layer is embedded in the packaging layer;
the electric chip is reversely mounted on the upper part of the packaging layer, the electric chip and the optical chip are arranged in a staggered mode, and the electric chip is provided with a second bonding pad connected to the upper end of the conductive connecting piece and a third bonding pad arranged opposite to the first bonding pad; and
the wiring layer is arranged at the lower part of the packaging layer, one end of a wire of the wiring layer is connected to the lower end of the conductive connecting piece, and a solder ball is formed at the other end of the wire of the wiring layer.
2. The optoelectronic chip integrated package structure of claim 1, wherein an insulating layer is disposed on an outer side of the wiring layer.
3. The optoelectronic chip integrated package structure of claim 1, wherein the conductive connecting element is a metal pillar.
4. The optoelectronic chip integrated package structure of claim 1, wherein the encapsulation layer is a transparent encapsulation layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221694090.5U CN217522004U (en) | 2022-07-01 | 2022-07-01 | Photoelectric chip integrated packaging structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221694090.5U CN217522004U (en) | 2022-07-01 | 2022-07-01 | Photoelectric chip integrated packaging structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN217522004U true CN217522004U (en) | 2022-09-30 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202221694090.5U Active CN217522004U (en) | 2022-07-01 | 2022-07-01 | Photoelectric chip integrated packaging structure |
Country Status (1)
| Country | Link |
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| CN (1) | CN217522004U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115656968A (en) * | 2022-11-04 | 2023-01-31 | 扬州扬芯激光技术有限公司 | High-interconnection high-integration laser radar chip packaging structure and packaging process |
-
2022
- 2022-07-01 CN CN202221694090.5U patent/CN217522004U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115656968A (en) * | 2022-11-04 | 2023-01-31 | 扬州扬芯激光技术有限公司 | High-interconnection high-integration laser radar chip packaging structure and packaging process |
| CN115656968B (en) * | 2022-11-04 | 2023-12-01 | 扬州扬芯激光技术有限公司 | High-interconnection high-integration laser radar chip packaging structure and packaging process |
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