CN110310932A - A kind of integrated encapsulation structure and manufacturing method of optical chip and electrical chip - Google Patents
A kind of integrated encapsulation structure and manufacturing method of optical chip and electrical chip Download PDFInfo
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- CN110310932A CN110310932A CN201910639073.8A CN201910639073A CN110310932A CN 110310932 A CN110310932 A CN 110310932A CN 201910639073 A CN201910639073 A CN 201910639073A CN 110310932 A CN110310932 A CN 110310932A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
Abstract
The invention discloses a kind of optical chips and electrical chip integrated encapsulation structure, comprising: plastic packaging layer；Optical chip, by the plastic packaging layer around cladding, the top surface of the optical chip has fiber entrance for the optical chip side；Electrical chip, the electrical chip side is by the plastic packaging layer around cladding；Again placement-and-routing's layer, the layer of placement-and-routing again are electrically connected the optical chip and the electrical chip；And dielectric layer.
Description
Technical field
The present invention relates to chip encapsulation technology field more particularly to the integrated encapsulation structures of a kind of optical chip and electrical chip
And manufacturing method.
Background technique
It mainly include two parts in optoelectronic package module: opticator chip and control circuit and control chip.
Wherein, photon chip mainly includes active and passive two kinds.That active mainly includes electrooptic modulator (modulator), light
Electric explorer (photodetector), passive device are then mainly some multiplex/demultiplex (mux, demux) and optical waveguide
Deng.Electrical chip is then mainly concerned with the amplifier (trans-impedance amplifier of the driving (Driver) of electrooptic modulator, photodetector
TIA or limitation amplifier LA or other kinds of amplifier), there are also some other matching and control circuit, such as clock
Restore (CDR), serioparallel exchange (Serdes), switching circuit (Switches) etc..
Existing high speed optoelectronic Integrated Solution has COB (Chip on Board) Integrated Solution, TSV Integrated Solution etc..At present
Common COB scheme is that discrete electrical chip and optical chip are assembled to pcb board by way of wire bonding or Flip chip
On, as shown in Figure 1, realizing that the high speed of optical chip and electrical chip interconnects.Although the program is at low cost, easy to assembly, due to
Optical chip and the longer loss of electrical chip interconnection path are big, make it in high-frequency high-speed system using being limited, especially in current optical mode
Block has evolved under 100G even 400G high frequency situations, is unable to satisfy requirement.
In order to meet the miniaturization of optoelectronic package, the requirement of high-frequency high-speed, need using system-level optoelectronic package, i.e.,
Optical chip and electrical chip are encapsulated into an encapsulating structure, the system module of specific function is formed, to reduce path damage
Consumption.It in existing technology, is by playing the three-dimensionally integrated encapsulation that TSV realizes optical chip and electrical chip in optical chip, specifically in fact
Existing mode such as patent CN103787268B, CN103787264B, encapsulating structure is as shown in Fig. 2, need the substrate in optical chip
Then the upper hole TSV of beating carries out conductive fill, there are complex process, the shortcomings such as yield is low, at high cost, reliability is low.
Summary of the invention
In order to overcome interconnection path existing for the three-dimensionally integrated encapsulation of existing optical chip and electrical chip that big, technique is lost
Complicated, the problems such as yield is low, at high cost, reliability is low, the present invention propose a kind of optical chip and electrical chip integrated encapsulation structure and
Manufacturing method, at least part of above problem.
The loss of interconnection path existing for three-dimensionally integrated encapsulation for existing optical chip and electrical chip is big, complex process,
The problems such as yield is low, at high cost, reliability is low provides a kind of optical chip and electrical chip according to an aspect of the present invention
Integrated encapsulation structure, comprising:
Plastic packaging layer；
Optical chip, by the plastic packaging layer around cladding, the top surface of the optical chip enters with optical fiber for the optical chip side
Mouthful；
Electrical chip, the electrical chip side is by the plastic packaging layer around cladding；
Again placement-and-routing's layer, the layer of placement-and-routing again are electrically connected the optical chip and the electrical chip；And
Dielectric layer.
In one embodiment of the invention, optical chip and electrical chip integrated encapsulation structure further include and the outermost layer
Again the external soldered ball of placement-and-routing's layer electrical connection.
In one embodiment of the invention, optical chip and electrical chip integrated encapsulation structure further include being arranged in the electricity
The radiator structure of chip back.
In one embodiment of the invention, the layer of placement-and-routing again has M layers, wherein M >=2.
In one embodiment of the invention, the optical chip is electrooptic modulator, photodetector or optical waveguide；
The electrical chip is driving chip, signal amplification chip or control chip.
According to another embodiment of the invention, a kind of optical chip and electrical chip integrated encapsulation structure are provided, comprising:
Plastic packaging layer；
Optical chip, three sides of the optical chip are by the plastic packaging layer around cladding, the 4th side tool of the optical chip
There is fiber entrance；
Electrical chip, the electrical chip side is by the plastic packaging layer around cladding；
Again placement-and-routing's layer, the layer of placement-and-routing again are electrically connected the optical chip and the electrical chip；And
Dielectric layer.
In another embodiment of the present invention, optical chip and electrical chip integrated encapsulation structure further include with it is described outermost
The layer external soldered ball that placement-and-routing's layer is electrically connected again.
In another embodiment of the present invention, optical chip further includes being arranged described with electrical chip integrated encapsulation structure
The radiator structure at the electrical chip back side.
According to still another embodiment of the invention, the manufacturer of a kind of optical chip and electrical chip integrated encapsulation structure is provided
Method, comprising:
Optical chip and electrical chip pin are temporarily bonded on support plate upward；
Whole plastic packaging is carried out to optical chip and electrical chip, forms plastic packaging layer, to realize that wafer reconstructs；
Plastic packaging layer is thinned, leaks out the pin of optical chip and electrical chip；
Placement-and-routing's layer, dielectric layer and external soldered ball are made again on thinned plastic packaging layer；
Tear bonding removal support plate open；
Optical fiber connecting hole is formed in the grating coupler region of optical chip；And
Radiator structure is formed at the back side of electrical chip.
In yet another embodiment of the present invention, the manufacturer of a kind of optical chip and electrical chip integrated encapsulation structure is provided
Method, comprising:
Multiple groups optical chip and electrical chip pin are temporarily bonded on support plate upward；
Whole plastic packaging is carried out to multiple groups optical chip and electrical chip, forms plastic packaging layer, to realize that wafer reconstructs；
Plastic packaging layer is thinned, leaks out the pin of multiple groups optical chip and electrical chip；
Placement-and-routing's layer, dielectric layer and external soldered ball are made again on thinned plastic packaging layer；
Tear bonding removal support plate open；
Cutting groove is formed on the grating coupler side of optical chip and plastic packaging layer；
Slice separation forms single package structure；And
Radiator structure is formed at the back side of electrical chip.
The present invention provides a kind of optical chip and electrical chip integrated encapsulation structure and manufacturing method, by more electrical chips and light
Chip completes wafer reconstruct by EMC plastic packaging, and placement-and-routing's layer is made again on the wafer of reconstruct and realizes optical chip and battery core
The short distance of piece, high speed interconnect, and then realize external interconnection using soldered ball；Followed by the grating coupler in optical chip
The vertical coupled of optical fiber and grating coupler is realized in region punching, or by etching scribing by the end coupling of optical chip
The end coupling for realizing optical fiber and optical chip is exposed in device；Radiator can also be arranged at the back side of electrical chip simultaneously to mention
The heat-sinking capability of the system of liter, thus the reliability of lifting system.Based on this kind of optical chip and electrical chip integration packaging of the invention
Compared with existing COB scheme, optical chip and electrical chip interconnection path are short with better electrical property, damage for structure and manufacturing method
It consumes low conducive to high-speed transfer；Compared with existing TSV Integrated Solution, do not need to process TSV, technique on silicon support plate or optical chip
Simply, at low cost；For the program compared with existing TSV Integrated Solution, packaging body is welded to PCB, and electrical chip and PCB interconnect distance
Short thermal resistance is small, and furthermore the cooling fin on electrical chip surface can effectively improve electrical chip heat dissipation, to reduce due to electrical chip fever pair
The influence of optical chip.
Detailed description of the invention
For the above and other advantages and features for each embodiment that the present invention is furture elucidated, will be in reference to attached drawing
The more specific description of existing various embodiments of the present invention.It is appreciated that these attached drawings only describe exemplary embodiments of the invention,
Therefore it is not to be regarded as being restriction on its scope.In the accompanying drawings, in order to cheer and bright, identical or corresponding component will use phase
Same or similar label indicates.
Fig. 1 shows a kind of integrated encapsulation structure signal of optical chip and electrical chip based on PCB substrate of the prior art
Figure.
Fig. 2 shows a kind of integrated encapsulation structure schematic diagrames of optical chip and electrical chip based on TSV of the prior art.
Fig. 3 shows a kind of optical chip and electrical chip integration packaging knot 300 formed according to one embodiment of present invention
Diagrammatic cross-section.
Fig. 4 A to Fig. 4 G is shown forms this kind of optical chip and electrical chip integration packaging knot according to one embodiment of present invention
300 process diagrammatic cross-section.
Fig. 5 is shown forms this kind of optical chip and electrical chip integration packaging knot 300 according to one embodiment of present invention
Flow chart 500.
Fig. 6 shows a kind of optical chip and electrical chip integration packaging knot 600 formed according to still another embodiment of the invention
Diagrammatic cross-section.
Fig. 7 A to Fig. 7 H is shown forms this kind of optical chip and electrical chip integration packaging knot according to one embodiment of present invention
600 process diagrammatic cross-section.
Fig. 8 is shown forms this kind of optical chip and electrical chip integration packaging knot 600 according to one embodiment of present invention
Flow chart 800.
Specific embodiment
In the following description, with reference to each embodiment, present invention is described.However, those skilled in the art will
Recognize can in the case where none or multiple specific details or with other replacements and/or addition method, material or group
Part implements each embodiment together.In other situations, be not shown or be not described in detail well known structure, material or operation in order to avoid
Keep the aspects of various embodiments of the present invention obscure.Similarly, for purposes of explanation, specific quantity, material are elaborated and is matched
It sets, in order to provide the comprehensive understanding to the embodiment of the present invention.However, the present invention can be real in the case where no specific detail
It applies.Further, it should be understood that each embodiment shown in the accompanying drawings is illustrative expression and is not drawn necessarily to scale.
In the present specification, the reference of " one embodiment " or " embodiment " is meaned that the embodiment is combined to describe
A particular feature, structure, or characteristic be included at least one embodiment of the invention.Occur in everywhere in this specification
The phrase " in one embodiment " is not necessarily all referring to the same embodiment.
It should be noted that the embodiment of the present invention is described processing step with particular order, however this is only
Facilitate and distinguish each step, and is not the sequencing for limiting each step, it in different embodiments of the invention, can basis
Technique is adjusted to adjust the sequencing of each step.
The present invention provides a kind of optical chip and electrical chip integrated encapsulation structure and manufacturing method, by more electrical chips and light
Chip completes wafer reconstruct by EMC plastic packaging, and placement-and-routing's layer is made again on the wafer of reconstruct and realizes optical chip and battery core
The short distance of piece, high speed interconnect, and then realize external interconnection using soldered ball；Followed by the grating coupler in optical chip
The vertical coupled of optical fiber and grating coupler is realized in region punching, or by etching scribing by the end coupling of optical chip
The end coupling for realizing optical fiber and optical chip is exposed in device；Radiator can also be arranged at the back side of electrical chip simultaneously to mention
The heat-sinking capability of the system of liter, thus the reliability of lifting system.Based on this kind of optical chip and electrical chip integration packaging of the invention
Compared with existing COB scheme, optical chip and electrical chip interconnection path are short with better electrical property, damage for structure and manufacturing method
It consumes low conducive to high-speed transfer；Compared with existing TSV Integrated Solution, do not need to process TSV, technique on silicon support plate or optical chip
Simply, at low cost；For the program compared with existing TSV Integrated Solution, packaging body is welded to PCB, and electrical chip and PCB interconnect distance
Short thermal resistance is small, and furthermore the cooling fin on electrical chip surface can effectively improve electrical chip heat dissipation, to reduce due to electrical chip fever pair
The influence of optical chip.
A kind of optical chip according to an embodiment of the invention is discussed in detail below with reference to Fig. 3 and electrical chip is integrated
Encapsulation knot.Fig. 3 shows a kind of optical chip and electrical chip integration packaging knot 300 formed according to one embodiment of present invention
Diagrammatic cross-section.As shown in figure 3, the optical chip and electrical chip integration packaging knot 300 further comprise plastic packaging layer 310, optical chip
320, electrical chip 330, again placement-and-routing's layer 340, dielectric layer 350, external soldered ball 360 and radiator structure 370.
First face of the optical chip Yu electrical chip integration packaging knot 300 is arranged in plastic packaging layer 310.At of the invention one
In embodiment, the material of plastic packaging layer 310 can be the materials such as epoxy resin, solidification glue, EMC.
For optical chip 320 by plastic packaging layer 310 around cladding, the first face of optical chip 320 is located at the optical chip and electrical chip collection
At the first face of encapsulation knot 300；Optical chip 320 can be electrooptic modulator (modulator), photodetector
(photodetector), the devices such as optical waveguide or chip.In one embodiment of the invention, optical chip 320 is further
Including be located at the first face fiber entrance 321 and internally positioned grating coupler (not shown)
For electrical chip 330 also by plastic packaging layer 310 around cladding, the back side of electrical chip 330 leaks out plastic packaging layer 310.Electrical chip
330 can be the chip of the functions such as driving, amplification, matching, the control of optical chip 320.
Again the bottom surface of plastic packaging layer 310 is arranged in placement-and-routing's layer 340, again placement-and-routing's layer 340 and optical chip 320
And electrical chip 330 is electrically connected.In one embodiment of the invention, placement-and-routing's layer 340 has one or more layers again,
Wherein outermost wiring layer has external pad.
Dielectric layer 350 is for the interlayer metal of the layer of placement-and-routing again 340 and with the insulation protection between layer conductor.Medium
Layer 350 can be the materials such as resin, PI, solidification glue or semi-curing glue.
External soldered ball 360 is arranged in again on the external pad of placement-and-routing's layer 340.External soldered ball 190 can pass through plant
The techniques such as ball, plating are formed；External soldered ball 360 can be lead-free solder ball or conduction copper column etc..
The back side of electrical chip 330 is arranged in radiator structure 370, for the heat spreading function to electrical chip 330.
It is described in detail to form this kind of optical chip and electrical chip integration packaging knot below with reference to Fig. 4 A to Fig. 4 G and Fig. 5
300 process.Fig. 4 A to Fig. 4 G is shown forms this kind of optical chip and electrical chip integration packaging according to one embodiment of present invention
The process diagrammatic cross-section of knot 300；Fig. 5 is shown forms this kind of optical chip and battery core according to one embodiment of present invention
The flow chart 500 of piece integration packaging knot 300.
Firstly, as shown in Figure 4 A, optical chip 420 and 430 pin of electrical chip are temporarily bonded to load upward in step 510
On plate 410.Specific bonding method can be consolidated optical chip 420 and electrical chip 430 by removable bonding glue of glue or laser etc.
Surely the corresponding position of support plate 410 is arrived.In one particular embodiment of the present invention, support plate 410 is first set, then in support plate 410
Optical chip 420 and electrical chip 430 are finally fixed to corresponding position by the upper removable bonding glue 411 of setting laser.
Next, as shown in Figure 4 B, carrying out whole plastic packaging to optical chip 420 and electrical chip 430 in step 520, formed
The plastic packaging layer 440 of optical chip 420 and electrical chip 430 is covered, to realize that wafer reconstructs.In one embodiment of the invention,
Plastic packaging is carried out using EMC material.
Then, in step 530, as shown in Figure 4 C, plastic packaging layer 440 is thinned, leaks out drawing for optical chip 420 and electrical chip 430
Foot.In one embodiment of the invention, being thinned for plastic packaging layer 440 is carried out by mechanical lapping.
Next, as shown in Figure 4 D, placement-and-routing's layer is made again on thinned plastic packaging layer 440 in step 540
450, dielectric layer 460 and BGA 470.Specific manufacture craft can by being graphically electroplated, spin coating, plant the techniques such as ball and realize.
In one particular embodiment of the present invention, placement-and-routing's layer 450, spin coating PI material shape to be formed again by being graphically electroplated
At dielectric layer 460, carry out planting ball formation BGA after forming bonding pad opening.In another embodiment of the present invention, it is laid out cloth again
Line layer 450 has multilayer.
Then, in step 550, as shown in Figure 4 E, bonding removal support plate 410 is torn open.In a specific embodiment of the invention
In, bonding is torn open by the removable completion of bonding material 411 support plate 410 of laser irradiation laser, and cleaning the remaining laser of removal can
Tear bonding material 411 open.
Next, as illustrated in figure 4f, forming optical fiber connection in the grating coupler region of optical chip 420 in step 560
Hole 480.Optical fiber connecting hole can be formed by etching or laser via.
Finally, it is optional, in step 570, as shown in Figure 4 G, radiator structure 490 is formed at the back side of electrical chip 430.
A kind of optical chip and electrical chip collection according to still another embodiment of the invention is discussed in detail in conjunction with Fig. 6 below
It is tied at encapsulation.Fig. 6 shows a kind of optical chip and electrical chip integration packaging knot 600 formed according to still another embodiment of the invention
Diagrammatic cross-section.As shown in fig. 6, the optical chip and electrical chip integration packaging knot 600 further comprise plastic packaging layer 610, light core
Piece 620, electrical chip 630, again placement-and-routing's layer 640, dielectric layer 650, external soldered ball 660 and radiator structure 670.
First face of the optical chip Yu electrical chip integration packaging knot 600 is arranged in plastic packaging layer 610.At of the invention one
In embodiment, the material of plastic packaging layer 610 can be the materials such as epoxy resin, solidification glue, EMC.
For optical chip 620 by plastic packaging layer 610 around cladding, optical chip 620 is provided with end coupling device, and end coupling
Device can be coupled with external fiber 680；Optical chip 320 can be electrooptic modulator (modulator), photodetector
(photodetector), the devices such as optical waveguide or chip.
For electrical chip 630 also by plastic packaging layer 610 around cladding, the back side of electrical chip 630 leaks out plastic packaging layer 610.Electrical chip
630 can be the chip of the functions such as driving, amplification, matching, the control of optical chip 620.
Again the bottom surface of plastic packaging layer 610 is arranged in placement-and-routing's layer 640, again placement-and-routing's layer 640 and optical chip 620
And electrical chip 630 is electrically connected.In one embodiment of the invention, placement-and-routing's layer 640 has one or more layers again,
Wherein outermost wiring layer has external pad.
Dielectric layer 650 is for the interlayer metal of the layer of placement-and-routing again 640 and with the insulation protection between layer conductor.Medium
Layer 650 can be the materials such as resin, PI, solidification glue or semi-curing glue.
External soldered ball 660 is arranged in again on the external pad of placement-and-routing's layer 640.External soldered ball 660 can pass through plant
The techniques such as ball, plating are formed；External soldered ball 360 can be lead-free solder ball or conduction copper column etc..
The back side of electrical chip 630 is arranged in radiator structure 670, for the heat spreading function to electrical chip 630.
The difference of the optical chip and electrical chip integration packaging knot 600 and aforementioned optical chip and electrical chip integration packaging knot 300
It is only different in the coupler locations of optical chip 620.The coupling of the optical chip 620 of the optical chip and electrical chip integration packaging knot 600
Device is located at the side end of optical chip 620, and therefore, encapsulating structure needs to expose the end of optical chip 620, to make exterior light
Fibre 680 is gone on smoothly with optical chip 620 to be coupled；The coupling of the optical chip 320 of aforementioned optical chip and electrical chip integration packaging knot 300
Clutch is located at the bottom of optical chip 320, and therefore, encapsulating structure needs to form fiber openings, to make external fiber 680 and light
Chip 620 is realized vertical coupled.
It is described in detail to form this kind of optical chip and electrical chip integration packaging in conjunction with Fig. 7 A to Fig. 7 H and Fig. 8 below
The process of knot 600.Fig. 7 A to Fig. 7 H is shown forms this kind of optical chip and the integrated envelope of electrical chip according to one embodiment of present invention
Fill the process diagrammatic cross-section of knot 600；Fig. 8 is shown forms this kind of optical chip and electricity according to one embodiment of present invention
The flow chart 800 of integrated chip encapsulation knot 600.
Firstly, as shown in Figure 7 A, optical chip 720 and 730 pin of electrical chip are temporarily bonded to load upward in step 810
On plate 710.Specific bonding method can by removable bonding glue of glue or laser etc. by multiple groups optical chip 720 (720-1,
Corresponding position of support plate 710 720-2) is fixed to multiple groups electrical chip 730 (730-1,730-2).It is specific at of the invention one
In embodiment, support plate 710 is first set, then the removable bonding glue 711 of laser is set on support plate 710, finally by optical chip 420
Corresponding position is fixed to electrical chip 430.
Next, as shown in Figure 7 B, carrying out whole plastic packaging to optical chip 720 and electrical chip 730 in step 820, formed
The plastic packaging layer 740 of optical chip 720 and electrical chip 730 is covered, to realize that wafer reconstructs.In one embodiment of the invention,
Plastic packaging is carried out using EMC material.
Then, in step 830, as seen in figure 7 c, plastic packaging layer 740 is thinned, leaks out drawing for optical chip 720 and electrical chip 730
Foot.In one embodiment of the invention, being thinned for plastic packaging layer 740 is carried out by chemical mechanical grinding (CMP).
Next, as illustrated in fig. 7d, placement-and-routing's layer is made again on thinned plastic packaging layer 740 in step 840
750, dielectric layer 760 and BGA 770.Specific manufacture craft can by being graphically electroplated, spin coating, plant the techniques such as ball and realize.
In one particular embodiment of the present invention, placement-and-routing's layer 750, spin coating PI material shape to be formed again by being graphically electroplated
At dielectric layer 760, carry out planting ball formation BGA after forming bonding pad opening.In another embodiment of the present invention, it is laid out cloth again
Line layer 750 has multilayer.
Then, in step 850, as seen in figure 7e, bonding removal support plate 710 is torn open.In a specific embodiment of the invention
In, bonding is torn open by the removable completion of bonding material 711 support plate 710 of laser irradiation laser, and cleaning the remaining laser of removal can
Tear bonding material 411 open.
Next, in step 860, as shown in Figure 7 F, on the grating coupler side of optical chip 720 and plastic packaging layer 740
Form cutting groove 780.
Then, in step 870, as shown in Figure 7 G, slice separation forms single package structure 600.
Finally, it is optional, in step 880, as shown in fig. 7h, radiator structure 790 is formed at the back side of electrical chip 730.
Based on this kind of optical chip of the invention and electrical chip integrated encapsulation structure and manufacturing method and existing COB scheme phase
Than optical chip and electrical chip interconnection path are short with better electrical property, are lost low conducive to high-speed transfer；It is integrated with existing TSV
Scheme is compared, and does not need to process TSV on silicon support plate or optical chip, simple process, at low cost；The program and existing TSV are integrated
Scheme is compared, and packaging body is welded to PCB, and electrical chip and PCB interconnection are small apart from short thermal resistance, furthermore the cooling fin on electrical chip surface
Electrical chip heat dissipation can be effectively improved, to reduce the influence generated heat due to electrical chip to optical chip.
Although described above is various embodiments of the present invention, however, it is to be understood that they are intended only as example to present
, and without limitation.For those skilled in the relevant art it is readily apparent that various combinations, modification can be made to it
Without departing from the spirit and scope of the invention with change.Therefore, the width of the invention disclosed herein and range should not be upper
It states disclosed exemplary embodiment to be limited, and should be defined according only to the appended claims and its equivalent replacement.
Claims (10)
1. a kind of optical chip and electrical chip integrated encapsulation structure, comprising:
Plastic packaging layer；
Optical chip, by the plastic packaging layer around cladding, the top surface of the optical chip has fiber entrance for the optical chip side；
Electrical chip, the electrical chip side is by the plastic packaging layer around cladding；
Again placement-and-routing's layer, the layer of placement-and-routing again are electrically connected the optical chip and the electrical chip；And
Dielectric layer.
2. optical chip as described in claim 1 and electrical chip integrated encapsulation structure, which is characterized in that further include with it is described outermost
The layer external soldered ball that placement-and-routing's layer is electrically connected again.
3. optical chip as described in claim 1 and electrical chip integrated encapsulation structure, which is characterized in that further include being arranged described
The radiator structure at the electrical chip back side.
4. optical chip as described in claim 1 and electrical chip integrated encapsulation structure, which is characterized in that the placement-and-routing again
Layer has M layers, wherein M >=2.
5. optical chip as described in claim 1 and electrical chip integrated encapsulation structure, which is characterized in that the optical chip is photoelectricity
Modulator, photodetector or optical waveguide；The electrical chip is driving chip, signal amplification chip or control chip.
6. a kind of optical chip and electrical chip integrated encapsulation structure, comprising:
Plastic packaging layer；
Optical chip, for three sides of the optical chip by the plastic packaging layer around cladding, the 4th side of the optical chip has light
Fine entrance；
Electrical chip, the electrical chip side is by the plastic packaging layer around cladding；
Again placement-and-routing's layer, the layer of placement-and-routing again are electrically connected the optical chip and the electrical chip；And
Dielectric layer.
7. optical chip as claimed in claim 6 and electrical chip integrated encapsulation structure, which is characterized in that further include with it is described outermost
The layer external soldered ball that placement-and-routing's layer is electrically connected again.
8. optical chip as claimed in claim 6 and electrical chip integrated encapsulation structure, which is characterized in that further include being arranged described
The radiator structure at the electrical chip back side.
9. the manufacturing method of a kind of optical chip and electrical chip integrated encapsulation structure, comprising:
Optical chip and electrical chip pin are temporarily bonded on support plate upward；
Whole plastic packaging is carried out to optical chip and electrical chip, forms plastic packaging layer, to realize that wafer reconstructs；
Plastic packaging layer is thinned, leaks out the pin of optical chip and electrical chip；
Placement-and-routing's layer, dielectric layer and external soldered ball are made again on thinned plastic packaging layer；
Tear bonding removal support plate open；
Optical fiber connecting hole is formed in the grating coupler region of optical chip；And
Radiator structure is formed at the back side of electrical chip.
10. the manufacturing method of a kind of optical chip and electrical chip integrated encapsulation structure, comprising:
Multiple groups optical chip and electrical chip pin are temporarily bonded on support plate upward；
Whole plastic packaging is carried out to multiple groups optical chip and electrical chip, forms plastic packaging layer, to realize that wafer reconstructs；
Plastic packaging layer is thinned, leaks out the pin of multiple groups optical chip and electrical chip；
Placement-and-routing's layer, dielectric layer and external soldered ball are made again on thinned plastic packaging layer；
Tear bonding removal support plate open；
Cutting groove is formed on the grating coupler side of optical chip and plastic packaging layer；
Slice separation forms single package structure；And
Radiator structure is formed at the back side of electrical chip.
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