CN204206152U - A kind of difference I2C bus communication interface circuit - Google Patents
A kind of difference I2C bus communication interface circuit Download PDFInfo
- Publication number
- CN204206152U CN204206152U CN201420483496.8U CN201420483496U CN204206152U CN 204206152 U CN204206152 U CN 204206152U CN 201420483496 U CN201420483496 U CN 201420483496U CN 204206152 U CN204206152 U CN 204206152U
- Authority
- CN
- China
- Prior art keywords
- resistance
- connects
- transceiver
- difference
- received
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Dc Digital Transmission (AREA)
Abstract
The utility model discloses a kind of difference I2C bus communication interface circuit, comprise data-signal to receive/send out modular converter, differential data signals transport module, modular converter and differential clock signal transport module are received/sent out to clock signal, and described data-signal is received/sent out modular converter and comprises triode Q1, diode D1, metal-oxide-semiconductor Q2, resistance R21 and R24, described differential data signals transport module comprises a RS485 transceiver U21, resistance R22, R32, R33 and electric capacity C21.The Transistor-Transistor Logic level of serial clock SCL and serial data SDA is converted to differential signal transmission by utilizing two RS485 interface chips by difference I2C bus communication interface circuit of the present utility model, the problem that poor anti jamming capability when solving existing I2C bus communication, communication distance are short, improve the antijamming capability of circuit, achieve remote two-way communication.
Description
Technical field
The utility model relates to communication interface circuit technical field, particularly a kind of difference I2C bus communication interface circuit.
Background technology
I2C bus communication is a kind of two-wire system bidirectional linked list synchronous communication mode with how main arbitration mechanism that philips company releases, because I2C bus mainly adopts Transistor-Transistor Logic level signal to transmit, and this telecommunication circuit not only poor anti jamming capability utilizing Transistor-Transistor Logic level signal to carry out transmitting, and the communication of short-range can only be realized, usually the communication within the scope of same circuit board is only applicable to, or the communication between plates within the scope of same equipment, but and the communication be not suitable between electronic equipment.
Utility model content
The purpose of this utility model is to provide a kind of difference I2C bus communication interface circuit, is intended to solve adopt Transistor-Transistor Logic level signal to carry out the telecommunication circuit transmitted, its poor anti jamming capability, the problem that communication distance is short for existing I2C bus.
The utility model is achieved in that a kind of difference I2C bus communication interface circuit, comprise data-signal to receive/send out modular converter, differential data signals transport module, modular converter and differential clock signal transport module are received/sent out to clock signal;
Described data-signal is received/is sent out modular converter and comprises triode Q1, diode D1, metal-oxide-semiconductor Q2, resistance R21 and R24, wherein, the collector electrode of described triode Q1 connects local SDA and holds and described resistance R24 one end, the other end of described resistance R24 connects the grid of described metal-oxide-semiconductor Q2, the source ground of described metal-oxide-semiconductor Q2, the drain electrode of described metal-oxide-semiconductor Q2 connects the anode of described diode D1, the negative electrode of described diode D1 connects the emitter of described triode Q1, the base stage of described triode Q1 connects one end of described resistance R21, the other end of described resistance R21 connects+5V power supply, described differential data signals transport module comprises a RS485 transceiver U21, resistance R22, R32, R33 and electric capacity C21, the reception output R of a described RS485 transceiver U21 connects the emitter of described triode Q1 and the negative electrode of described diode D1, receive Enable Pin RE and be connected one end of described resistance R22 and the drain electrode of described metal-oxide-semiconductor Q2 with driving Enable Pin DE, input D is driven to connect the collector electrode of described triode Q1, one end that anode A connects described resistance R33 is received/sent out to difference, the other end of described resistance R33 is connected to the SDA_485A of a described RS485 transceiver U21 differential bus, one end that negative terminal B connects described resistance R32 is received/sent out to difference, the other end of described resistance R32 is connected to the SDA_485B of a described RS485 transceiver U21 differential bus, the power positive end VCC of a described RS485 transceiver U21 connects+5V power supply, negative terminal GND ground connection, the other end of described resistance R22 connects+5V power supply, described electric capacity C21 is connected between+5V VDD-to-VSS.
Further, described differential data signals transport module comprises resistance R23, R31 and/or R37, wherein, the difference that described resistance R23 is connected to a described RS485 transceiver U21 is received/sends out between anode A and+5V power supply, described resistance R31 is connected between two differential bus of a described RS485 transceiver U21, and the difference that described resistance R37 is connected to a described RS485 transceiver U21 is received/sent out between negative terminal B and ground.
Described clock signal is received/is sent out modular converter and comprises triode Q3, diode D2, metal-oxide-semiconductor Q4, resistance R25 and R28, wherein, the collector electrode of described triode Q3 connects local SCL and holds and described resistance R28 one end, the other end of described resistance R28 connects the grid of described metal-oxide-semiconductor Q4, the source ground of described metal-oxide-semiconductor Q4, the drain electrode of described metal-oxide-semiconductor Q4 connects the anode of described diode D2, the negative electrode of described diode D2 connects the emitter of described triode Q3, the base stage of described triode Q3 connects one end of described resistance R25, the other end of described resistance R25 connects+5V power supply, described differential clock signal transport module comprises the 2nd RS485 transceiver U22, resistance R26, R35, R36 and electric capacity C22, the reception output R of described 2nd RS485 transceiver U22 connects the emitter of described triode Q3 and the negative electrode of described diode D2, receive Enable Pin RE and be connected one end of described resistance R26 and the drain electrode of described metal-oxide-semiconductor Q4 with driving Enable Pin DE, input D is driven to connect the collector electrode of described triode Q3, one end that anode A connects described resistance R36 is received/sent out to difference, the other end of described resistance R36 is connected to the SCL_485A of described 2nd RS485 transceiver U22 differential bus, one end that negative terminal B connects described resistance R35 is received/sent out to difference, the other end of described resistance R35 is connected to the SCL_485B of described 2nd RS485 transceiver U22 differential bus, the power positive end VCC of described 2nd RS485 transceiver U22 connects+5V power supply, negative terminal GND ground connection, the other end of described resistance R26 connects+5V power supply, described electric capacity C22 is connected between+5V VDD-to-VSS.
Further, described differential clock signal transport module comprises resistance R27, R34 and/or R38, wherein, the difference that described resistance R27 is connected to described 2nd RS485 transceiver U22 is received/sends out between anode A and+5V power supply, described resistance R34 is connected between described 2nd RS485 transceiver U22 two differential bus, and the difference that described resistance R38 is connected to described 2nd RS485 transceiver U22 is received/sent out between negative terminal B and ground.
The beneficial effects of the utility model are: compared with prior art, the Transistor-Transistor Logic level of serial clock SCL and serial data SDA is converted to differential signal transmission by utilizing two RS485 interface chips by difference I2C bus communication interface circuit of the present utility model, the problem that poor anti jamming capability when solving existing I2C bus communication, communication distance are short, improve the antijamming capability of circuit, achieve remote two-way communication.
Accompanying drawing explanation
The module frame chart of a kind of difference I2C bus communication interface circuit that Fig. 1 provides for the utility model;
The circuit theory diagrams of the embodiment of the difference I2C bus communication interface circuit that Fig. 2 provides for the utility model.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the utility model, and be not used in restriction the utility model.
Be illustrated in figure 1 the module frame chart of a kind of difference I2C bus communication interface circuit that the utility model provides, the difference I2C bus communication interface circuit that the utility model provides comprises data-signal and receives/send out modular converter 1, differential data signals transport module 2, modular converter 3 and differential clock signal transport module 4 are received/sent out to clock signal;
Data-signal is received/is sent out modular converter 1 and holds for the SDA receiving local I2C the Transistor-Transistor Logic level signal that sends and transmit, or receive from differential data signals transport module 2 send Transistor-Transistor Logic level signal and be transferred to local I2C SDA end, meanwhile, for controlling a receipts/enabled state of differential data signals transport module 2;
Differential data signals transport module 2 is for the Transistor-Transistor Logic level signal that receives data-signal and receive/send out modular converter 1 and send and send to distal end I 2C after converting differential data signals to, or receives differential data signals that distally I2C sends and be sent to data-signal after converting Transistor-Transistor Logic level signal to and receive/send out modular converter 1;
Clock signal is received/is sent out modular converter 3 and holds for the SCL receiving local I2C the Transistor-Transistor Logic level signal that sends and transmit, or receive from differential clock signal transport module 4 send Transistor-Transistor Logic level signal and be transferred to local I2C SCL end, meanwhile, for controlling a receipts/enabled state of differential clock signal transport module 4;
Differential clock signal transport module 4 is received/is sent out for receive clock signal Transistor-Transistor Logic level signal that modular converter 3 sends and sends to distal end I 2C after converting differential clock signal to, or receives differential data signals that distally I2C sends and be sent to clock signal after converting Transistor-Transistor Logic level signal to and receive/send out modular converter 3.
Figure 2 shows that the circuit theory diagrams of the embodiment of the difference I2C bus communication interface circuit that the utility model provides, the data-signal of this circuit is received/is sent out modular converter 1 and comprises triode Q1, diode D1, metal-oxide-semiconductor Q2, resistance R21 and R24, wherein, the collector electrode of triode Q1 connects local SDA and holds and resistance R24 one end, the other end of resistance R24 connects the grid of metal-oxide-semiconductor Q2, the source ground of metal-oxide-semiconductor Q2, the drain electrode of metal-oxide-semiconductor Q2 connects the anode of diode D1, the emitter of the negative electrode connecting triode Q1 of diode D1, one end of the base stage contact resistance R21 of triode Q1, the other end of resistance R21 connects+5V power supply, differential data signals transport module 2 comprises a RS485 transceiver U21, resistance R22, R32, R33 and electric capacity C21, the emitter of reception output R connecting triode Q1 of the one RS485 transceiver U21 and the negative electrode of diode D1, receive Enable Pin RE and drive one end of Enable Pin DE contact resistance R22 and the drain electrode of metal-oxide-semiconductor Q2, drive the collector electrode of input D connecting triode Q1, one end of anode A contact resistance R33 is received/sent out to difference, the other end of resistance R33 is connected to the SDA_485A of a RS485 transceiver U21 differential bus, one end of negative terminal B contact resistance R32 is received/sent out to difference, the other end of resistance R32 is connected to the SDA_485B of a RS485 transceiver U21 differential bus, the power positive end VCC of the one RS485 transceiver U21 connects+5V power supply, negative terminal GND ground connection, the other end of resistance R22 connects+5V power supply, electric capacity C21 is connected between+5V VDD-to-VSS.
Differential data signals transport module 2 comprises resistance R23, R31 and/or R37 further, wherein, the difference that resistance R23 is connected to a RS485 transceiver U21 is received/sends out between anode A and+5V power supply, resistance R31 is connected between two differential bus of a RS485 transceiver U21, and the difference that resistance R37 is connected to a RS485 transceiver U21 is received/sent out between negative terminal B and ground.
Clock signal is received/is sent out modular converter 3 and comprises triode Q3, diode D2, metal-oxide-semiconductor Q4, resistance R25 and R28, wherein, the collector electrode of triode Q3 connects local SCL and holds and resistance R28 one end, and the other end of resistance R28 connects the grid of metal-oxide-semiconductor Q4, the source ground of metal-oxide-semiconductor Q4, the drain electrode of metal-oxide-semiconductor Q4 connects the anode of diode D2, the emitter of the negative electrode connecting triode Q3 of diode D2, one end of the base stage contact resistance R25 of triode Q3, the other end of resistance R25 connects+5V power supply, differential clock signal transport module 4 comprises the 2nd RS485 transceiver U22, resistance R26, R35, R36 and electric capacity C22, the emitter of reception output R connecting triode Q3 of the 2nd RS485 transceiver U22 and the negative electrode of diode D2, receive Enable Pin RE and drive one end of Enable Pin DE contact resistance R26 and the drain electrode of metal-oxide-semiconductor Q4, drive the collector electrode of input D connecting triode Q3, one end of anode A contact resistance R36 is received/sent out to difference, the other end of resistance R36 is connected to the SCL_485A of the 2nd RS485 transceiver U22 differential bus, one end of negative terminal B contact resistance R35 is received/sent out to difference, the other end of resistance R35 is connected to the SCL_485B of the 2nd RS485 transceiver U22 differential bus, the power positive end VCC of the 2nd RS485 transceiver U22 connects+5V power supply, negative terminal GND ground connection, the other end of resistance R26 connects+5V power supply, electric capacity C22 is connected between+5V VDD-to-VSS.
Differential clock signal transport module 4 comprises resistance R27, R34 and/or R38 further, wherein, the difference that resistance R27 is connected to the 2nd RS485 transceiver U22 is received/sends out between anode A and+5V power supply, resistance R34 is connected between the 2nd RS485 transceiver U22 two differential bus, and the difference that resistance R38 is connected to the 2nd RS485 transceiver U22 is received/sent out between negative terminal B and ground.
In the utility model embodiment, when the data wire SDA of local I2C does not have low level to send, SDA is high level, and it is low level that the drain electrode of metal-oxide-semiconductor Q2 exports SDA_DE, and therefore, RS485 chip U21 is in reception data mode.When the data wire SDA of distal end I 2C sends low level signal, SDA_485A is lower than SDA_485B, SDA_RXD is then low level, diode D1 keeps SDA_DE to be low level, RS485 chip U21 keeps accepting state, it is low level that the collector electrode of triode Q1 exports SDA, then the low level that the data wire SDA that the data wire SDA of local I2C receives distal end I 2C sends.When the data wire SDA of distal end I 2C sends high level, SDA_485A is higher than SDA_485B, SDA_RXD is then high level, it is high-impedance state that the collector electrode of triode Q1 exports SDA, because the pull-up resistor R30 in SDA bus ensures high level, the output SDA_DE of metal-oxide-semiconductor Q2 still keeps low level, and RS485 chip U21 still keeps accepting state, then the high level that the data wire SDA that local I2C data wire SDA receives distal end I 2C sends.
When the data wire SDA of local I2C has low level to send, SDA is low level, it is high level that the drain electrode of metal-oxide-semiconductor Q2 exports SDA_DE, therefore, RS485 chip U21 is in transmission state, then RS485 chip U21 sends low level and makes SDA_485A ground connection, and SDA_485B meets+5V, and the data wire SDA of distal end I 2C just receives the low level of the data wire SDA transmission of local I2C.
When the data wire SDA of local I2C and the data wire SDA of distal end I 2C is low level simultaneously, receipts/hair-like the state of RS485 chip U21 depends on the receipts/transmission state of eve, its follow-up receipts/hair-like state then depend on the data wire SDA of local I2C and distal end I 2C data wire SDA which side first cancel low level and transfer high level to, if the data wire SDA of local I2C first transfers high level to, so, it is low level that the drain electrode of metal-oxide-semiconductor Q2 exports SDA_DE, therefore, RS485 chip U21 place and accepting state, the data wire SDA of local I2C receives the low level of the SDA of distal end I 2C data wire.Otherwise if the data wire SDA of distal end I 2C first transfers high level to, the data wire SDA of the I2C of far-end transfers accepting state to, if U21 is accepting state this moment, so SDA_RXD is high level, and the drain electrode of metal-oxide-semiconductor Q2 exports as high level, therefore, RS485 chip U21 is still in transmission state; If be transmission state this moment, so, keep transmission state, what the data wire SDA of distal end I 2C then received is low level.
In the utility model embodiment, when the clock line SCL of local I2C does not have low level to send, SCL is high level, and it is low level that the drain electrode of metal-oxide-semiconductor Q4 exports SCL_DE, and therefore, RS485 chip U22 is in reception data mode.When the clock line SCL of distal end I 2C sends low level signal, SCL_485A is lower than SCL_485B, SCL_RXD is then low level, diode D2 keeps SCL_DE to keep low level, therefore, RS485 chip U22 keeps accepting state, and it is low level that the collector electrode of triode Q3 exports SCL, then the low level that the clock line SCL that the clock line SCL of local I2C receives distal end I 2C sends.When the clock line SCL of distal end I 2C sends high level, SCL_485A is higher than SCL_485B, SCL_RXD is then high level, it is high-impedance state that the collector electrode of triode Q3 exports SCL, because the pull-up resistor R29 in SCL bus ensures high level, the drain electrode of metal-oxide-semiconductor Q4 exports SCL_DE and still keeps low level, therefore, RS485 chip U22 still keeps accepting state, then the high level that the clock line SCL that local I2C clock line SCL receives distal end I 2C sends.
When the clock line SCL of local I2C has low level to send, SCL is low level, it is high level that the drain electrode of metal-oxide-semiconductor Q4 exports SCL_DE, therefore, RS485 chip U22 is in transmission state, then RS485 chip U22 sends low level and makes SCL_485A ground connection, and SCL_485B meets+5V, and the clock line SCL of distal end I 2C just receives the low level of the clock line SCL transmission of local I2C.
When the clock line SCL of local I2C and the clock line SCL of distal end I 2C is low level simultaneously, receipts/hair-like the state of RS485 chip U22 depends on the state of eve, its follow-up receipts/hair-like state depend on the clock line SCL of local I2C and distal end I 2C clock line SCL which side first cancel low level and transfer high level to, if the clock line SCL of local I2C first transfers high level to, so, it is low level that the drain electrode of metal-oxide-semiconductor Q4 exports SCL_DE, therefore, RS485 chip U22 is in accepting state, the low level that the clock line SCL that the clock line SCL of local I2C receives distal end I 2C sends.Otherwise, if the clock line SCL of distal end I 2C first transfers high level to, if RS485 is accepting state this moment, so, SLC_RXD keeps high level, and it is high level that the drain electrode of metal-oxide-semiconductor Q4 exports SCL_DE, therefore, RS485 chip U22 keeps transmission state, and the RS485 of distal end I 2C then transfers accepting state to, and the clock line SCL of distal end I 2C then receives the low level of the clock line SCL transmission of local I2C.
The utility model ensure that clock signal retention wire and the relation of the data-signal of local I2C and the data-signal retention wire of distal end I 2C and relation, the clock signal also guaranteeing local I2C and distal end I 2C, so also just remain how main arbitration relation, thus ensure that difference I2C bus communication also can be applicable to multi-host communication.
The Transistor-Transistor Logic level of serial clock SCL and serial data SDA is converted to differential signal transmission by utilizing two RS485 interface chips by difference I2C bus communication interface circuit of the present utility model, the problem that poor anti jamming capability when solving existing I2C bus communication, communication distance are short, improve the antijamming capability of circuit, achieve remote two-way communication.
The above, it is only preferred embodiment of the present utility model, not any pro forma restriction is done to the utility model, although the utility model discloses as above with preferred embodiment, but and be not used to limit the utility model, any those skilled in the art, do not departing within the scope of technical solutions of the utility model, make a little change when the technology contents of above-mentioned announcement can be utilized or be modified to the Equivalent embodiments of equivalent variations, in every case be do not depart from technical solutions of the utility model content, according to technical spirit of the present utility model, within spirit of the present utility model and principle, to any simple amendment that above embodiment is done, equivalent replacement and improvement etc., within the protection range all still belonging to technical solutions of the utility model.
Claims (4)
1. a difference I2C bus communication interface circuit, comprise data-signal to receive/send out modular converter, differential data signals transport module, modular converter and differential clock signal transport module are received/sent out to clock signal, it is characterized in that: described data-signal is received/sent out modular converter and comprises triode Q1, diode D1, metal-oxide-semiconductor Q2, resistance R21 and R24, wherein, the collector electrode of described triode Q1 connects local SDA and holds and described resistance R24 one end, the other end of described resistance R24 connects the grid of described metal-oxide-semiconductor Q2, the source ground of described metal-oxide-semiconductor Q2, the drain electrode of described metal-oxide-semiconductor Q2 connects the anode of described diode D1, the negative electrode of described diode D1 connects the emitter of described triode Q1, the base stage of described triode Q1 connects one end of described resistance R21, the other end of described resistance R21 connects+5V power supply, described differential data signals transport module comprises a RS485 transceiver U21, resistance R22, R32, R33 and electric capacity C21, the reception output R of a described RS485 transceiver U21 connects the emitter of described triode Q1 and the negative electrode of described diode D1, receive Enable Pin RE and be connected one end of described resistance R22 and the drain electrode of described metal-oxide-semiconductor Q2 with driving Enable Pin DE, input D is driven to connect the collector electrode of described triode Q1, one end that anode A connects described resistance R33 is received/sent out to difference, the other end of described resistance R33 is connected to the SDA_485A of a described RS485 transceiver U21 differential bus, one end that negative terminal B connects described resistance R32 is received/sent out to difference, the other end of described resistance R32 is connected to the SDA_485B of a described RS485 transceiver U21 differential bus, the power positive end VCC of a described RS485 transceiver U21 connects+5V power supply, negative terminal GND ground connection, the other end of described resistance R22 connects+5V power supply, described electric capacity C21 is connected between+5V VDD-to-VSS.
2. difference I2C bus communication interface circuit according to claim 1, it is characterized in that: described differential data signals transport module comprises resistance R23, R31 and/or R37 further, wherein, the difference that described resistance R23 is connected to a described RS485 transceiver U21 is received/sends out between anode A and+5V power supply, described resistance R31 is connected between two differential bus of a described RS485 transceiver U21, and the difference that described resistance R37 is connected to a described RS485 transceiver U21 is received/sent out between negative terminal B and ground.
3. difference I2C bus communication interface circuit according to claim 1, it is characterized in that: described clock signal is received/sent out modular converter and comprises triode Q3, diode D2, metal-oxide-semiconductor Q4, resistance R25 and R28, wherein, the collector electrode of described triode Q3 connects local SCL and holds and described resistance R28 one end, the other end of described resistance R28 connects the grid of described metal-oxide-semiconductor Q4, the source ground of described metal-oxide-semiconductor Q4, the drain electrode of described metal-oxide-semiconductor Q4 connects the anode of described diode D2, the negative electrode of described diode D2 connects the emitter of described triode Q3, the base stage of described triode Q3 connects one end of described resistance R25, the other end of described resistance R25 connects+5V power supply, described differential clock signal transport module comprises the 2nd RS485 transceiver U22, resistance R26, R35, R36 and electric capacity C22, the reception output R of described 2nd RS485 transceiver U22 connects the emitter of described triode Q3 and the negative electrode of described diode D2, receive Enable Pin RE and be connected one end of described resistance R26 and the drain electrode of described metal-oxide-semiconductor Q4 with driving Enable Pin DE, input D is driven to connect the collector electrode of described triode Q3, one end that anode A connects described resistance R36 is received/sent out to difference, the other end of described resistance R36 is connected to the SCL_485A of described 2nd RS485 transceiver U22 differential bus, one end that negative terminal B connects described resistance R35 is received/sent out to difference, the other end of described resistance R35 is connected to the SCL_485B of described 2nd RS485 transceiver U22 differential bus, the power positive end VCC of described 2nd RS485 transceiver U22 connects+5V power supply, negative terminal GND ground connection, the other end of described resistance R26 connects+5V power supply, described electric capacity C22 is connected between+5V VDD-to-VSS.
4. difference I2C bus communication interface circuit according to claim 3, it is characterized in that: described differential clock signal transport module comprises resistance R27, R34 and/or R38 further, wherein, the difference that described resistance R27 is connected to described 2nd RS485 transceiver U22 is received/sends out between anode A and+5V power supply, described resistance R34 is connected between described 2nd RS485 transceiver U22 two differential bus, and the difference that described resistance R38 is connected to described 2nd RS485 transceiver U22 is received/sent out between negative terminal B and ground.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420483496.8U CN204206152U (en) | 2014-08-26 | 2014-08-26 | A kind of difference I2C bus communication interface circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420483496.8U CN204206152U (en) | 2014-08-26 | 2014-08-26 | A kind of difference I2C bus communication interface circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204206152U true CN204206152U (en) | 2015-03-11 |
Family
ID=52664063
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420483496.8U Expired - Fee Related CN204206152U (en) | 2014-08-26 | 2014-08-26 | A kind of difference I2C bus communication interface circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204206152U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105243045A (en) * | 2015-10-19 | 2016-01-13 | 扬州峰威新能源科技有限公司 | Long-distance transmission I2C bus communication interface circuit |
| CN110224952A (en) * | 2019-06-21 | 2019-09-10 | 珠海格力智能装备有限公司 | Signal transmission processing method and device and processing circuit thereof |
| CN111404504A (en) * | 2020-06-03 | 2020-07-10 | 广州天嵌计算机科技有限公司 | RS485 bus differential signal amplifier |
-
2014
- 2014-08-26 CN CN201420483496.8U patent/CN204206152U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105243045A (en) * | 2015-10-19 | 2016-01-13 | 扬州峰威新能源科技有限公司 | Long-distance transmission I2C bus communication interface circuit |
| CN110224952A (en) * | 2019-06-21 | 2019-09-10 | 珠海格力智能装备有限公司 | Signal transmission processing method and device and processing circuit thereof |
| CN111404504A (en) * | 2020-06-03 | 2020-07-10 | 广州天嵌计算机科技有限公司 | RS485 bus differential signal amplifier |
| CN111404504B (en) * | 2020-06-03 | 2020-10-09 | 广州天嵌计算机科技有限公司 | RS485 bus differential signal amplifier |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105471420A (en) | Differential I2C bus communication interface circuit | |
| CN203933593U (en) | Half-duplex RS-485 isolation communicating circuit | |
| US10873193B2 (en) | Intelligent switch system | |
| CN201434881Y (en) | RS485 interface circuit and electric energy meter employing same | |
| CN204206152U (en) | A kind of difference I2C bus communication interface circuit | |
| CN202798652U (en) | Signal conversion circuit and interface switching equipment | |
| CN104101965B (en) | For mixed electrical optical transceiver and the optical cable thereof of USB3.0/3.1 interface | |
| CN204389963U (en) | A kind of control circuit and controller | |
| CN101576868B (en) | I2C bus communication drive circuit | |
| CN203366045U (en) | A digital quantity input-output device based on a CAN bus | |
| CN204442400U (en) | A kind of mining RS-485 isolates repeater | |
| CN201378316Y (en) | Universal input/output interface extension circuit and mobile terminal with same | |
| CN204695304U (en) | A kind of 1553B Bus PC 104 interface board | |
| CN210804414U (en) | Circuit with reusable communication interface | |
| CN203759699U (en) | Novel USB (universal serial bus) to serial communication interface cable | |
| CN201213037Y (en) | Infrared transmission apparatus | |
| CN202126687U (en) | RS485 bus interface circuit | |
| CN205427840U (en) | Long distance transmission's I2C bus communication interface circuit | |
| CN104360969A (en) | Field wireless networking system supporting big data transmission | |
| CN205051133U (en) | 100G cable module based on CFP4 interface | |
| CN104683116A (en) | Mining RS-485 isolation repeater | |
| CN203616628U (en) | Differential signal-based unibus transmission device | |
| CN103645689A (en) | Differential signal based single bus transmission device | |
| CN203734667U (en) | Bluetooth bridge for realizing long-distance data communication | |
| CN213582142U (en) | LED integrated system card and display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150311 Termination date: 20180826 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |