CN202126687U - RS485 bus interface circuit - Google Patents
RS485 bus interface circuit Download PDFInfo
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- CN202126687U CN202126687U CN2011201589570U CN201120158957U CN202126687U CN 202126687 U CN202126687 U CN 202126687U CN 2011201589570 U CN2011201589570 U CN 2011201589570U CN 201120158957 U CN201120158957 U CN 201120158957U CN 202126687 U CN202126687 U CN 202126687U
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Abstract
The utility model relates to the technical field of RS485 bus communication, in particular to a RS485 bus interface circuit. The utility model has the technical scheme that a differential signal transmitting circuit part of a RS485 interface is composed of a triode inverter, two groups of push-pull type inverting amplifiers and four triple gates, wherein an output end of the triode inverter is connected at two push-pull signal input ends of a first group of push-pull type inverting amplifiers respectively through a first triple gate and a second triple gate; output ends of the first group of push-pull type inverting amplifiers are connected with a first differential signal wire RS485A; and direct signals of a second group of push-pull type inverting amplifiers are communicated with an input end of the triode inverter and a second differential signal wire RS485 B. The RS485 bus interface circuit realizes the output of RS485 differential signals through the two groups of push-pull type inverting amplifiers and effectively increases the power of output signals, so that the communication distance of the technical scheme can reach 200 meters, the number of attached transceivers is six, and the communication rate can reach 9600 bps.
Description
Technical field
The utility model relates to RS485 bus communication technical field, relates in particular to a kind of RS485 bus interface circuit.
Background technology
RS485 is a kind of widely used communication protocol; Its principal feature is that the electric signal with difference form carries out data transmission; That is, on paired order wire, carry out information transmission through adopting a pair of equal and opposite in direction, opposite polarity symmetric signal; This kind data transmission scheme can effectively be resisted outside common mode interference, has stronger antijamming capability.Mostly existing RS485 communication interface scheme is to adopt conventional RS485 interface chip to realize; Adopt conventional RS485 interface chip; Because of the signal of communication output power of chip is a standardized designs; At the communication situation remote, that electromagnetic environment is abominable, its traffic rate, interference free performance and the number that hangs over transceiver all can not satisfy the communications demand of these special occasions.
Summary of the invention
To the deficiency of prior art scheme, the utility model proposes a kind of RS485 bus interface circuit that is applicable to the communication situation remote, that electromagnetic environment is abominable.
The technical scheme that the utility model adopts is following:
A kind of RS485 bus interface circuit comprises:
One differential signal transtation mission circuit; This differential signal transtation mission circuit comprises: a triode phase inverter, two groups of push-pull type inverting amplifiers and four triple gates; Wherein, The input termination data sending terminal of described triode phase inverter; Its output terminal is connected to two push-pull signal input ends of said first group of push-pull type inverting amplifier respectively through described first triple gate and second triple gate, first differential signal line of output termination RS485A of this first group of push-pull type inverting amplifier, and the input end of said the 3rd triple gate and the 4th triple gate is connected in the input end of said triode phase inverter; Two push-pull signal input ends of its said second group of push-pull type inverting amplifier of output termination separately, second differential signal line of output termination RS485B of this second group of push-pull type see-saw circuit.
One differential signal receiving circuit; This difference letter back receiving circuit comprises: a differential amplifier and a triple gate; Wherein, The in-phase input end of said differential amplifier is connected to first differential signal line RS485A, and its inverting input is connected to second differential signal line RS485B, and its output terminal is connected to data receiver through the triple gate of this differential signal receiving circuit.
One data transmit-receive control circuit; This data transmit-receive control circuit comprises a triode phase inverter; The input termination data transmit-receive control end of this triode phase inverter, its input end and output terminal connect the control Enable Pin of triple gate in said differential signal transtation mission circuit and the differential signal receiving circuit respectively.
Further; The triple gate of said differential signal transtation mission circuit and differential signal receiving circuit all is triple gates that low level control enables; The input end of the triode phase inverter of said data transmit-receive control circuit is connected to the low level of said differential signal receiving circuit and controls the control end that enables that enables triple gate; The output terminal of this triode phase inverter is connected to four low levels of said differential signal transtation mission circuit and controls the control end that enables that enables triple gate; Perhaps; The triple gate of said differential signal transtation mission circuit and differential signal receiving circuit all is triple gates that high level control enables; The output terminal of the triode phase inverter of said data transmit-receive control circuit is connected to the high level of said differential signal receiving circuit and controls the control end that enables that enables triple gate, and the input end of this triode phase inverter is connected to four high level of said differential signal transtation mission circuit and controls the control end that enables that enables triple gate.
Further; On said first differential signal line RS485A and second differential signal line RS485B; Also comprise: a circuit protection circuit and an impedance matching circuit; This circuit protection circuit comprises: fuse F1 and F2, common mode inductance L1 and L2, glass discharge vessel V1-V3, two-way TVS pipe D1-D3, signal current-limiting resistance R20-R21; Wherein, The end of incoming cables of the termination differential signal line RS485A of fuse F1; The end of incoming cables of the termination differential signal line RS485B of fuse F2, the end of the said glass discharge vessel V1 of another termination of said fuse F1, and be connected to the end of said two-way TVS pipe D1 and the end of said signal current-limiting resistance R20 through described common mode inductance L1; The other end of the said glass discharge vessel V1 of another termination of said fuse F2; And being connected to the other end of said two-way TVS pipe D1 and the end of said signal current-limiting resistance R21 through described common mode inductance L2, described glass discharge vessel V2 and glass discharge vessel V3 are connected in the two ends that said two-way TVS manages D1, the intermediate connection point ground connection of this glass discharge vessel V2 and glass discharge vessel V3 again after the series connection; Described two-way TVS pipe D2 and two-way TVS pipe D3 are connected in the other end of said signal current-limiting resistance R20 and the other end of signal current-limiting resistance R21 after the series connection again; The intermediate connection point ground connection of this two-way TVS pipe D2 and two-way TVS pipe D3, the other end of said signal current-limiting resistance R20 is the leading-out terminal of this circuit protection circuit differential signal line RS485A, the other end of said signal current-limiting resistance R21 is the leading-out terminal of this circuit protection circuit differential signal line RS485B; Said impedance matching circuit comprises: the biasing resistor R1 that electrically connects said first differential signal line RS485A leading-out terminal and 5V power supply; Two ends are connected in the impedance matching resistance R 2 of said first differential signal line RS485A leading-out terminal and the said second differential signal line RS485B leading-out terminal, electrically connect the biasing resistor R3 of said second differential signal line RS485B leading-out terminal and ground wire.
The utility model is through adopting technique scheme; The beneficial effect that has is: realize signal output through two groups of push-pull type inverting amplifiers of said differential signal transtation mission circuit; Promoted the power of output signal effectively; Make the communication distance of this scheme can reach 2000 meters, the transceiver that can articulate can reach 64, and speed letter speed can reach 9600bps.
Description of drawings
Fig. 1 is the circuit theory diagrams of a preferred embodiment of the utility model.
Embodiment
Combine accompanying drawing and embodiment that the utility model is described further at present.
Shown in accompanying drawing 1, the RS485 bus interface circuit of the utility model is by constituting with the lower part:
One differential signal transtation mission circuit 1; This differential signal transtation mission circuit 1 comprises: a triode phase inverter 101, two groups of push-pull type inverting amplifier 102A and 102B, triple gate U1, U2, U3 and U4; Wherein, The input end of described triode phase inverter 101 is connected to data sending terminal; Its output terminal is connected to two push-pull signal input ends of said push-pull type inverting amplifier 102A respectively through described triple gate U1 and triple gate U2, first differential signal line of output termination RS485A of said push-pull type inverting amplifier 102A, and the input end of said triple gate U3 and triple gate U4 is connected in the input end of said triode phase inverter 101; Two push-pull signal input ends of its said push-pull type inverting amplifier of output termination 102B separately, second differential signal line of output termination RS485B of this push-pull type see-saw circuit 102B; When need send data; Transmitting-receiving control end output high level, this high level signal is controlled triple gate U1, U2, U3 and U4 conducting after the triode phase inverter anti-phase of data transmit-receive control circuit 3, when the signal that sends is high level; Said triode Q4 conducting of recommending among the inverting amplifier 102B; Be described second differential signal line RS485B ground connection, said triode Q1 conducting of recommending among the inverting amplifier 102A, promptly described second differential signal line RS485A be connected to+power supply of 5V; The differential signal of generation+5V between differential signal line RS485A and the differential signal line RS485B then; In like manner, when the signal that sends is low level, the differential signal of generation-5V between differential signal line RS485A and the differential signal line RS485B.
One differential signal receiving circuit 2; This difference letter back receiving circuit 2 comprises: a differential amplifier 201 and a triple gate U5; Wherein, The in-phase input end of said differential amplifier 201 meets first differential signal line RS485A, and its inverting input is connected to second differential signal line RS485B, and its output terminal connects data receiver through the triple gate U5 of this differential signal receiving circuit; Wherein, Described differential amplifier 201 is open-collector high-speed comparator LM311, and when the signal level on first differential signal line RS485A was higher than second signal level on the differential signal line RS485B, high-speed comparator LM311 exported high level; Otherwise; High-speed comparator LM311 output low level, when the transmitting-receiving control end is low level, triple gate U5 conducting; At this moment, the differential signal of differential signal line RS485A and differential signal line RS485B converts serial data into by high-speed comparator LM311 and delivers to data receiver.
One data transmit-receive control circuit 3; This data transmit-receive control circuit 3 comprises a triode phase inverter; The input termination data transmit-receive control end of this triode phase inverter, its input end and output terminal connect the control Enable Pin of triple gate in said differential signal transtation mission circuit 1 and the differential signal receiving circuit 2 respectively.
The data transmit-receive control circuit 3 of the utility model has following embodiment:
Embodiment 1: the triple gate U1-triple gate U5 of said differential signal transtation mission circuit 1 and differential signal receiving circuit 2 all is triple gates that high level control enables; The output terminal of the triode phase inverter of this data transmit-receive control circuit 3 is connected to the high level of said differential signal receiving circuit 2 and controls the control end that enables that enables triple gate U5, and the input end of this triode phase inverter is connected to four high level of said differential signal transtation mission circuit 1 and controls the control end that enables that enables triple gate U1-U4; Though this embodiment can be realized the transmitting-receiving control of data; Yet, the high driving ability that the output terminal of triode phase inverter has, the high level control that connects differential signal receiving circuit 2 enables the control end that enables of triple gate U5; The control end that enables that four high level controls of differential signal transtation mission circuit 1 enable triple gate U1-U4 but is directly to be driven by the data transmit-receive control end; Data transmit-receive control end ground driving force was limited originally, and therefore, this embodiment is also unreasonable.
Embodiment 2: in this embodiment; The triple gate U1-U4 of described differential signal transtation mission circuit 1 all is triple gates that high level control enables; The triple gate U5 of said differential signal receiving circuit 2 is triple gates that low level control enables; At this moment, this data transmit-receive control circuit is the control Enable Pin that the data transmit-receive control end directly meets the triple gate U5 that low level control enables in triple gate U1-U4 that the control of high level in the described differential signal transtation mission circuit 1 enables and the said differential signal receiving circuit 2; Though this embodiment can be realized the data transmit-receive control function, its data transmit-receive end connects the control Enable Pin of 5 triple gate U1-U5 simultaneously, and factor is not enough according to ground, sending and receiving end driving force, is prone to produce the misoperation of transmitting-receiving control.
Embodiment 3: this embodiment is the preferred implementation of the utility model; Wherein, The triple gate U1-triple gate U5 of said differential signal transtation mission circuit 1 and differential signal receiving circuit 2 all is triple gates that high level control enables; The output terminal of the triode phase inverter of this data transmit-receive control circuit 3 is connected to the high level of said differential signal receiving circuit 2 and controls the control end that enables that enables triple gate U5, and the input end of this triode phase inverter is connected to four high level of said differential signal transtation mission circuit 1 and controls the control end that enables that enables triple gate U1-U4; Like this; When the transmitting-receiving control end receives with the high level control data; This high level signal is through the anti-phase of triode phase inverter, and output low level control triple gate U1, U2, U3, U4 conducting have also improved and receive and dispatch the driving force that control end drives a plurality of triple gate U1, U2, U3, U4 simultaneously.
As the utility model one preferred embodiment; On said first differential signal line RS485A and second differential signal line RS485B; Also comprise: a circuit protection circuit 4 and an impedance matching circuit 5; This circuit protection circuit 4 comprises: fuse F1 and F2, common mode inductance L1 and L2, glass discharge vessel V1-V3, two-way TVS pipe D1-D3, signal current-limiting resistance R20-R21; Wherein, The end of incoming cables of the termination differential signal line RS485A of fuse F1; The end of incoming cables of the termination differential signal line RS485B of fuse F2, the end of the said glass discharge vessel V1 of another termination of said fuse F1, and be connected to the end of said two-way TVS pipe D1 and the end of said signal current-limiting resistance R20 through described common mode inductance L1; The other end of the said glass discharge vessel V1 of another termination of said fuse F2; And being connected to the other end of said two-way TVS pipe D1 and the end of said signal current-limiting resistance R21 through described common mode inductance L2, described glass discharge vessel V2 and glass discharge vessel V3 are connected in the two ends that said two-way TVS manages D1, the intermediate connection point ground connection of this glass discharge vessel V2 and glass discharge vessel V3 again after the series connection; Described two-way TVS pipe D2 and two-way TVS pipe D3 are connected in the other end of said signal current-limiting resistance R20 and the other end of signal current-limiting resistance R21 after the series connection again; The intermediate connection point ground connection of this two-way TVS pipe D2 and two-way TVS pipe D3, the other end of said signal current-limiting resistance R20 is the leading-out terminal of this circuit protection circuit differential signal line RS485A, the other end of said signal current-limiting resistance R21 is the leading-out terminal of this circuit protection circuit differential signal line RS485B; Said impedance matching circuit comprises: the biasing resistor R1 that electrically connects said first differential signal line RS485A leading-out terminal and 5V power supply; Two ends are connected in the impedance matching resistance R 2 of said first differential signal line RS485A leading-out terminal and the said second differential signal line RS485B leading-out terminal, electrically connect the biasing resistor R3 of said second differential signal line RS485B leading-out terminal and ground wire; The utility model is through adopting above-mentioned circuit protection circuit; Glass discharge vessel V1, V2 and V3 can carry out clamped to high-voltage signal effectively; Common mode inductance L1 and L2 both can suppress outside EMI signal and import into; The EMI signal that produces during the circuit self of can decaying again work can reduce the EMI interference strength effectively.
Although specifically show and introduced the utility model in conjunction with preferred embodiment; But the those skilled in the art should be understood that; In the spirit and scope of the utility model that does not break away from appended claims and limited; Can make various variations to the utility model in form with on the details, be the protection domain of the utility model.
Claims (4)
1. RS485 bus interface circuit comprises:
One differential signal transtation mission circuit; This differential signal transtation mission circuit comprises: a triode phase inverter, two groups of push-pull type inverting amplifiers and four triple gates; Wherein, The input termination data sending terminal of described triode phase inverter; Its output terminal is connected to two push-pull signal input ends of said first group of push-pull type inverting amplifier respectively through described first triple gate and second triple gate, first differential signal line of output termination RS485A of this first group of push-pull type inverting amplifier, and the input end of said the 3rd triple gate and the 4th triple gate is connected in the input end of said triode phase inverter; Two push-pull signal input ends of its said second group of push-pull type inverting amplifier of output termination separately, second differential signal line of output termination RS485B of this second group of push-pull type see-saw circuit;
One differential signal receiving circuit; This difference letter back receiving circuit comprises: a differential amplifier and a triple gate; Wherein, The in-phase input end of said differential amplifier is connected to first differential signal line RS485A, and its inverting input is connected to second differential signal line RS485B, and its output terminal is connected to data receiver through the triple gate of this differential signal receiving circuit;
One data transmit-receive control circuit; This data transmit-receive control circuit comprises a triode phase inverter; The input termination data transmit-receive control end of this triode phase inverter, its input end and output terminal connect the control Enable Pin of triple gate in said differential signal transtation mission circuit and the differential signal receiving circuit respectively.
2. RS485 bus interface circuit as claimed in claim 1; It is characterized in that: the triple gate of said differential signal transtation mission circuit and differential signal receiving circuit all is triple gates that low level control enables; The input end of the triode phase inverter of said data transmit-receive control circuit is connected to the low level of said differential signal receiving circuit and controls the control end that enables that enables triple gate, and the output terminal of this triode phase inverter is connected to four low levels of said differential signal transtation mission circuit and controls the control end that enables that enables triple gate.
3. RS485 bus interface circuit as claimed in claim 1; It is characterized in that: the triple gate of said differential signal transtation mission circuit and differential signal receiving circuit all is triple gates that high level control enables; The output terminal of the triode phase inverter of said data transmit-receive control circuit is connected to the high level of said differential signal receiving circuit and controls the control end that enables that enables triple gate, and the input end of this triode phase inverter is connected to four high level of said differential signal transtation mission circuit and controls the control end that enables that enables triple gate.
4. like claim 1 or 2 or 3 described RS485 bus interface circuits; It is characterized in that: on said first differential signal line RS485A and second differential signal line RS485B; Also comprise: a circuit protection circuit and an impedance matching circuit; This circuit protection circuit comprises: fuse F1 and F2, common mode inductance L1 and L2, glass discharge vessel V1-V3, two-way TVS pipe D1-D3, signal current-limiting resistance R20-R21; Wherein, The end of incoming cables of the termination differential signal line RS485A of fuse F1; The end of incoming cables of the termination differential signal line RS485B of fuse F2, the end of the said glass discharge vessel V1 of another termination of said fuse F1, and be connected to the end of said two-way TVS pipe D1 and the end of said signal current-limiting resistance R20 through described common mode inductance L1; The other end of the said glass discharge vessel V1 of another termination of said fuse F2; And being connected to the other end of said two-way TVS pipe D1 and the end of said signal current-limiting resistance R21 through described common mode inductance L2, described glass discharge vessel V2 and glass discharge vessel V3 are connected in the two ends that said two-way TVS manages D1, the intermediate connection point ground connection of this glass discharge vessel V2 and glass discharge vessel V3 again after the series connection; Described two-way TVS pipe D2 and two-way TVS pipe D3 are connected in the other end of said signal current-limiting resistance R20 and the other end of signal current-limiting resistance R21 after the series connection again; The intermediate connection point ground connection of this two-way TVS pipe D2 and two-way TVS pipe D3, the other end of said signal current-limiting resistance R20 is the leading-out terminal of this circuit protection circuit differential signal line RS485A, the other end of said signal current-limiting resistance R21 is the leading-out terminal of this circuit protection circuit differential signal line RS485B; Said impedance matching circuit comprises: the biasing resistor R1 that electrically connects said first differential signal line RS485A leading-out terminal and 5V power supply; Two ends are connected in the impedance matching resistance R 2 of said first differential signal line RS485A leading-out terminal and the said second differential signal line RS485B leading-out terminal, electrically connect the biasing resistor R3 of said second differential signal line RS485B leading-out terminal and ground wire.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011201589570U CN202126687U (en) | 2011-05-17 | 2011-05-17 | RS485 bus interface circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011201589570U CN202126687U (en) | 2011-05-17 | 2011-05-17 | RS485 bus interface circuit |
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| Publication Number | Publication Date |
|---|---|
| CN202126687U true CN202126687U (en) | 2012-01-25 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011201589570U Expired - Lifetime CN202126687U (en) | 2011-05-17 | 2011-05-17 | RS485 bus interface circuit |
Country Status (1)
| Country | Link |
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| CN (1) | CN202126687U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102169472A (en) * | 2011-05-17 | 2011-08-31 | 福建省万华电子科技有限公司 | RS485 bus interface circuit |
| CN107026052A (en) * | 2017-06-08 | 2017-08-08 | 中国电子科技集团公司第四十研究所 | Radio-frequency relay differential voltage controls circuit |
-
2011
- 2011-05-17 CN CN2011201589570U patent/CN202126687U/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102169472A (en) * | 2011-05-17 | 2011-08-31 | 福建省万华电子科技有限公司 | RS485 bus interface circuit |
| CN107026052A (en) * | 2017-06-08 | 2017-08-08 | 中国电子科技集团公司第四十研究所 | Radio-frequency relay differential voltage controls circuit |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20120125 Effective date of abandoning: 20131009 |
|
| RGAV | Abandon patent right to avoid regrant |