CN205081316U - USB3. 0 extension line - Google Patents
USB3. 0 extension line Download PDFInfo
- Publication number
- CN205081316U CN205081316U CN201520885752.0U CN201520885752U CN205081316U CN 205081316 U CN205081316 U CN 205081316U CN 201520885752 U CN201520885752 U CN 201520885752U CN 205081316 U CN205081316 U CN 205081316U
- Authority
- CN
- China
- Prior art keywords
- signal
- circuit
- relaying
- port
- control circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Small-Scale Networks (AREA)
- Near-Field Transmission Systems (AREA)
Abstract
The utility model provides a USB3.0 extension line, it includes: US port transceiver for receive USB3.0 signal input, relaying amplifier circuit and relaying enlarge control circuit for with the received 3.0 signal amplification and with the signal amplification multiplexed output, route logic control circuit for output route signal, relaying amplifier circuit output's the signal amplification and the route signal of routing control circuit output are received respectively to a plurality of DS port transceivers, each DS port transceiver, power supply circuit for provide the electric current for each DS port. The utility model discloses an output of multichannel USB3.0 or USB2.0 is converted to through inside circuit switching and routing control by single USB3.0 interface, the rice to 10 -15 can be enlargied through trunk circuit and its transmission distance of enlarging function messenger simultaneously.
Description
Technical field
The utility model relates to computer transmission technique field, particularly relates to a kind of USB3.0 extended line.
Background technology
Along with the development of computer, ancillary equipment more and more receives the concern of people, and head ought be wherein the requirement to speed and performance, and the appearance of USB3.0 makes the speed of computer promote further, bring up to the 5Gbp/s of USB3.0 from the 480Mbp/s of original USB2.0, speed improves 10 times; USB2.0 is based on half-duplex two-wire bus, can only unidirectional data transmission stream, and USB3.0 adopts antithesis simplex four-wire system differential signal line, supports bi-directional data flow transmission, provides larger convenience to people in transfer of data; The backward compatible USB2.0 of USB3.0 simultaneously, the system supported at present has WindowsVista, Windows7, Window8, Linux etc., and along with the continuous decline of USB3.0 equipment price, USB3.0 instead of USB2.0 substantially; But the long transmission distance of USB3.0 cable is far away from USB2.0, it is main because USB3.0 transmission rate is higher, long-distance transmissions loss is larger, article one, the common the longest distance can only transmitted within 3 meters of USB3.0 cable, and in our practical application, often needing to transmit farther distance, some even reaches more than 10 meters.
Utility model content
Technical problem to be solved in the utility model is, for the above-mentioned deficiency of prior art, proposes the USB3.0 extended line that a kind of transmission range can reach 10-15 rice.
The technical scheme that the utility model solves the employing of its technical problem is that propose a kind of USB3.0 extended line, it comprises:
US port transceiver, for receiving the input of USB3.0 signal;
Relaying amplifying circuit and relaying amplification control circuit, for will receive 3.0 signals amplify and by amplifying signal multiple-channel output;
Logical routing control circuit, for controlling and exporting route signal;
Multiple DS port transceiver, each DS port transceiver receives the amplifying signal and the route signal that exports of route test circuit that relaying amplifying circuit exports respectively;
Power circuit, for providing electric current for each DS port.
Further, described US port transceiver and DS port transceiver include Received signal strength, output signal and bidirectional data transfers signal; Received signal strength, output signal and bidirectional data transfers signal all adopt difference channel; Differential pair live width 0.12mm, identical signal differential to line-spacing 0.18mm, unlike signal differential pair line-spacing 0.5mm.
Further, also comprise:
USB2.0 change-over circuit, the USB3.0 signal for US port transceiver being inputted is converted to USB2.0 signal and exports logical routing control circuit to;
USB2.0 relaying amplifying circuit, exports logic control circuit to after the USB2.0 signal relaying for being exported by USB2.0 change-over circuit amplifies.
Further, clock signal circuit and data interface circuit is also comprised.
The utility model exports by converting multichannel USB3.0 or USB2.0 by single USB3.0 interface to by internal circuit conversion and route test, makes its transmission range be amplified to 10-15 rice by repeat circuit and enlarging function simultaneously.
Accompanying drawing explanation
Fig. 1 is the utility model schematic block circuit diagram.
Embodiment
Be below specific embodiment of the utility model and by reference to the accompanying drawings, the technical solution of the utility model is further described, but the utility model be not limited to these embodiments.
Please refer to Fig. 1, the utility model USB3.0 extended line, it comprises:
US port transceiver, for receiving the input of USB3.0 signal;
Relaying amplifying circuit and relaying amplification control circuit, for will receive 3.0 signals amplify and by amplifying signal multiple-channel output;
Logical routing control circuit, for exporting route signal;
Multiple DS port transceiver, each DS port transceiver receives the amplifying signal and the route signal that exports of route test circuit that relaying amplifying circuit exports respectively;
Power circuit, for providing electric current for each DS port.
US port transceiver and DS port transceiver include Received signal strength, output signal and bidirectional data transfers signal; Received signal strength, output signal and bidirectional data transfers signal all adopt difference channel; Differential pair live width 0.12mm, identical signal differential to line-spacing 0.18mm, unlike signal differential pair line-spacing 0.5mm.
After the line-spacing adopting differential circuit design and above-mentioned differential line and live width value, antijamming capability is strong on the one hand to make the utility model circuit, because the coupling between two difference cablings is fine, when there is noise jamming in the external world, almost be coupled on two lines simultaneously, and the difference of just two signals that receiving terminal is concerned about, so the common-mode noise in the external world can be cancelled completely; On the other hand effectively can suppress EMI, same reason, because the polarity of two signals is contrary, they can cancel out each other to extraradial electromagnetic field, coupling tightr, and the electromagnetic energy in the external world that releases is fewer.
The utility model is backward compatible USB2.0 also, also namely also comprises USB2.0 change-over circuit, and the USB3.0 signal for US port transceiver being inputted is converted to USB2.0 signal and exports logical routing control circuit to;
USB2.0 relaying amplifying circuit, exports logic control circuit to after the USB2.0 signal relaying for being exported by USB2.0 change-over circuit amplifies.
When US port transceiver receive be USB2.0 signal time, by being exported by DS port transceiver after USB2.0 change-over circuit, USB2.0 relaying amplifying circuit and logical routing control circuit.
Further, the utility model also provides electric power management circuit, for providing electric current and the complete machine working power of 5V/900MA for each DS port transceiver.
Pll clock circuit provides the clock signal of complete machine 25MHZ.
SPI interface circuit can connect various data circuit.
Specific embodiment described herein is only to the explanation for example of the utility model spirit.The utility model person of ordinary skill in the field can make various amendment or supplements or adopt similar mode to substitute to described specific embodiment, but can't depart from spirit of the present utility model or surmount the scope that appended claims defines.
Claims (4)
1. a USB3.0 extended line, is characterized in that: comprising:
US port transceiver, for receiving the input of USB3.0 signal;
Relaying amplifying circuit and relaying amplification control circuit, for will receive 3.0 signals amplify and by amplifying signal multiple-channel output;
Logical routing control circuit, for controlling and exporting route signal;
Multiple DS port transceiver, each DS port transceiver receives the amplifying signal and the route signal that exports of route test circuit that relaying amplifying circuit exports respectively;
Power circuit, for providing electric current for each DS port.
2. USB3.0 extended line according to claim 1, is characterized in that: described US port transceiver and DS port transceiver include Received signal strength, output signal and bidirectional data transfers signal; Received signal strength, output signal and bidirectional data transfers signal all adopt difference channel; Differential pair live width 0.12mm, identical signal differential to line-spacing 0.18mm, unlike signal differential pair line-spacing 0.5mm.
3. USB3.0 extended line according to claim 1, is characterized in that: also comprise:
USB2.0 change-over circuit, the USB3.0 signal for US port transceiver being inputted is converted to USB2.0 signal and exports logical routing control circuit to;
USB2.0 relaying amplifying circuit, exports logic control circuit to after the USB2.0 signal relaying for being exported by USB2.0 change-over circuit amplifies.
4. USB3.0 extended line according to claim 1, is characterized in that: also comprise clock signal circuit and data interface circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520885752.0U CN205081316U (en) | 2015-11-09 | 2015-11-09 | USB3. 0 extension line |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520885752.0U CN205081316U (en) | 2015-11-09 | 2015-11-09 | USB3. 0 extension line |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205081316U true CN205081316U (en) | 2016-03-09 |
Family
ID=55433694
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520885752.0U Active CN205081316U (en) | 2015-11-09 | 2015-11-09 | USB3. 0 extension line |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205081316U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105305173A (en) * | 2015-11-09 | 2016-02-03 | 浙江一舟电子科技股份有限公司 | USB3.0 extension cord |
-
2015
- 2015-11-09 CN CN201520885752.0U patent/CN205081316U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105305173A (en) * | 2015-11-09 | 2016-02-03 | 浙江一舟电子科技股份有限公司 | USB3.0 extension cord |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102202058B (en) | Controller for protocol conversion between multipath UART bus and CAN bus | |
| CN104020534B (en) | A kind of novel USB3.0 active optical cable structure | |
| WO2008063743B1 (en) | Use of differential pair as single-ended data paths to transport low speed data | |
| CN101562571B (en) | Kvm extender system and local, remote modules thereof | |
| CN104253695A (en) | Direct-connected medium converter | |
| CN205081316U (en) | USB3. 0 extension line | |
| CN112069111B (en) | Circuit design of timer adapter card compatible with bidirectional transmission | |
| CN101499821A (en) | Design method for long distance 40G QSFP communication active copper cable component | |
| CN101179340B (en) | Method and device for low-swing difference signal bus transfer digital intermediate frequency | |
| CN105305173A (en) | USB3.0 extension cord | |
| CN104101965A (en) | Hybrid optoelectronic transceiver used for USB 3.0 interface and optical cable of hybrid optoelectronic transceiver | |
| CN205336276U (en) | Based on many windings coupling inductance power line carrier communication system | |
| CN103270720B (en) | A kind of microwave transport equipment electric power system and method, signal processing apparatus | |
| CN1964245B (en) | RS485 character-oriented anti-interference device against idle synchronous serial communication bus | |
| CN203133832U (en) | Anti-jamming communication interface circuit | |
| CN219875776U (en) | SPI remote control transmission device | |
| CN202145641U (en) | Photoelectric isolator | |
| CN108650100B (en) | Method for designing converter of SRIO and network interface | |
| CN204331717U (en) | A kind of distant signal Serial Port Transmission device | |
| CN202261301U (en) | 2-FE physical isolation optical fiber transceiver | |
| CN109787610A (en) | A kind of interface circuit that realizing full duplex communication and method | |
| CN220935184U (en) | RS485 signal extension device | |
| CN216751755U (en) | 485 repeater based on MCU control | |
| CN201830275U (en) | Repeater based on serial communication | |
| CN201393220Y (en) | Novel long-distance 40G QSFP communication active copper-cable component |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP02 | Change in the address of a patent holder |
Address after: 315191, No. 6, high voltage Road, Jiangshan Town, Ningbo, Zhejiang, Yinzhou District Patentee after: ZHEJIANG SHIP ELECTRONIC TECHNOLOGY Co.,Ltd. Address before: 315191, No. 31, North Road, Jiangshan Town, Yinzhou District, Zhejiang, Ningbo Patentee before: ZHEJIANG SHIP ELECTRONIC TECHNOLOGY Co.,Ltd. |
|
| CP02 | Change in the address of a patent holder |