CN204389963U - A kind of control circuit and controller - Google Patents
A kind of control circuit and controller Download PDFInfo
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- CN204389963U CN204389963U CN201420856723.7U CN201420856723U CN204389963U CN 204389963 U CN204389963 U CN 204389963U CN 201420856723 U CN201420856723 U CN 201420856723U CN 204389963 U CN204389963 U CN 204389963U
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Abstract
The utility model provides a kind of control circuit and controller, this control circuit comprises at least one control module, each control module comprises: processor, CAN controller and logical circuit, wherein, CAN controller is electrically connected with described processor, the receiving end of CAN controller is connected with bus, to send data to be verified.The output terminal of CAN controller, by described logical circuit and described Bus lines, carries out the bus contention between each processor, and the priority realizing processor communication divides.Visible the transmission of control circuit without the need to adopting transceiver can realize data, circuit structure is simple, and cost is low.And this control circuit adopts the CAN protocol of standard, realize multiple verification, fault-tolerant processing and receive response, ensure that the stability that data are transmitted, and then improving the security of automobile manipulation, applied widely.
Description
Technical field
The utility model relates to field of automobile electronic control, relates to a kind of control circuit and controller in particular.
Background technology
Along with expanding economy, automobile has become a part for daily life, and the manipulation of automobile be unable to do without Auto Electronic Controlled System.At present, in Auto Electronic Controlled System, in order to improve security and the reliability of controller, multiprocessor or bi-processor architecture can be adopted.
As shown in Figure 1, for dual processor adopts the implementation of serial communication data-interface, wherein, the transmitting terminal (TX) of processor 1 is connected with the receiving end (RX) of processor 2, processor 1 sends data to processor 2 by TX, and processor 2 is received by RX; The receiving end (RX) of processor 1 is connected with the transmitting terminal (TX) of processor 2, and processor 2 sends data to processor 1 by TX, and processor 1 is received by RX.Like this, the data-signal achieved between processor 1 and processor 2 transmits, and then carries out security algorithm process to data-signal, realizes the control to automobile.
Except this, also have dual processor mode as shown in Figure 2, concrete, two processors have a data-interface (DATA) and a clock interface (CLK), one of them processor is as master controller, clocking, concurrent order and the data of losing one's life, synchronous by clock enabling signal two processors, after another processor receives order, process, return data, realize dual processor interconnected.
But above-mentioned implementation all exists after one of them processor breaks down, and causes data-transmission interruptions, and then affect the problem of automobile manipulation, the danger of driving a vehicle even can occur.
Utility model content
In view of this, the utility model provides a kind of control circuit and controller, without the need to the transmission adopting transceiver can realize data, and then improves the security of automobile manipulation.
For achieving the above object, the utility model provides following technical scheme:
A kind of control circuit, described control circuit comprises at least one control module, and described control module comprises: processor, CAN controller and logical circuit;
The input end of described CAN controller is electrically connected with the output terminal of described processor;
The receiving end of described CAN controller is connected with bus, to send data to be verified;
The output terminal of described CAN controller is connected with described bus by described logical circuit, carries out the bus contention of described processor.
Preferably, described CAN controller is arranged on the inside of described processor.
Preferably, described CAN controller is arranged on the outside of described processor.
Preferably, described logical circuit comprises diode, and accordingly, the output terminal of described CAN controller is connected with the anode of described diode, and the negative electrode of described diode is connected with described bus.
Preferably, described control circuit also comprises: be serially connected in the current-limiting resistance between the output terminal of described CAN controller and described bus.
Preferably, described logical circuit is OR circuit.
A kind of controller, comprises the control circuit that any one is above-mentioned.
Known via above-mentioned technical scheme, compared with prior art, the utility model provides a kind of control circuit, comprise at least one control module, described control module comprises: processor, CAN controller and logical circuit, and wherein, CAN controller is electrically connected with described processor.The receiving end of CAN controller is connected with bus, to send data to be verified.The output terminal of CAN controller, by logical circuit and Bus lines, carries out the bus contention between each processor, and the priority realizing processor communication divides.Visible the transmission of control circuit without the need to adopting transceiver can realize data, circuit structure is simple, and cost is low.And this control circuit adopts the CAN protocol of standard, realize multiple verification, fault-tolerant processing and receive response, ensure that the stability that data are transmitted, and then improving the security of automobile manipulation, applied widely.
Except this, the utility model additionally provides a kind of controller, comprises above-mentioned control circuit, the transmission equally without the need to adopting transceiver can realize data, and circuit structure is simple, and cost is low.
Accompanying drawing explanation
In order to be illustrated more clearly in the utility model embodiment or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only embodiment of the present utility model, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to the accompanying drawing provided.
Fig. 1 is the theory diagram of the implementation of the bi-processor architecture adopted in prior art;
Fig. 2 is the theory diagram of the implementation of another kind of bi-processor architecture in prior art;
The theory diagram of a kind of control circuit that Fig. 3 provides for the utility model;
The theory diagram of the another kind of control circuit that Fig. 4 provides for the utility model;
The theory diagram of the third control circuit that Fig. 5 provides for the utility model;
The theory diagram of the 4th kind of control circuit that Fig. 6 provides for the utility model;
The theory diagram of the 5th kind of control circuit that Fig. 7 provides for the utility model.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, be clearly and completely described the technical scheme in the utility model embodiment, obviously, described embodiment is only the utility model part embodiment, instead of whole embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the utility model protection.
Embodiment
Refer to Fig. 3, for the utility model embodiment provides a kind of structural representation of control circuit, this control circuit comprises at least one control module, and described control module comprises: processor, CAN controller and logical circuit.By reference to the accompanying drawings 3, the present embodiment adopts the data between three processors to transmit and is illustrated, and certainly, the control circuit that the utility model provides is not limited to the communication between three processors, and can be the communication between multiple processor, its principle of work be identical.
Concrete, the output terminal of first processor 301 is electrically connected with the input end of the first CAN controller 3011, and the receiving end RX of the first CAN controller 3011 is connected with bus, to send data to be verified.The output terminal TX of the first CAN controller 3011 is by the first logical circuit 3012 and Bus lines.
Second processor 302 is electrically connected with the second CAN controller 3021, and the receiving end RX of the second CAN controller 3021 is connected with bus, to send data to be verified.The output terminal TX of the second CAN controller 3021 is by the second logical circuit 3022 and Bus lines.
3rd processor 303 is electrically connected with the 3rd CAN controller 3031, and the receiving end RX of the 3rd CAN controller 3031 is connected with bus, to send data to be verified.The output terminal TX of the 3rd CAN controller 3031, by the 3rd logical circuit 3032 and Bus lines, carries out the bus contention of described processor, and the priority realizing processor communication divides.
Visible, the transmission of this control circuit without the need to adopting transceiver can realize data, circuit structure is simple, and cost is low.And this control circuit adopts the CAN protocol of standard, realize multiple verification, fault-tolerant processing and receive response, ensure that the stability that data are transmitted, and then improving the security of automobile manipulation, applied widely.
Preferably, CAN controller can be arranged on the inside of processor, as shown in Figure 4.CAN controller can also be arranged on the outside of processor, as shown in Figure 3.Described logical circuit can be diode, also can be OR circuit.As shown in Figure 5, when described logical circuit is diode, namely the first logical circuit 3012 in Fig. 4 is the first diode D1 in Fig. 5, and the second logical circuit 3022 in Fig. 4 is the second diode D2 in Fig. 5, and the 3rd logical circuit 3032 in Fig. 4 is the 3rd diode D3 in Fig. 5.
Accordingly, the output terminal TX of the first CAN controller 3011 is connected with the anode of the first diode D1, and the negative electrode of the first diode D1 is connected with bus; The output terminal TX of the second CAN controller 3021 is connected with the anode of the second diode D2, and the negative electrode of the second diode D2 is connected with bus; The output terminal TX of the 3rd CAN controller 3031 is connected with the anode of the 3rd diode D3, and the negative electrode of the 3rd diode D3 is connected with bus.
Its principle of work is:
Communication data between first processor 301, second processor 302 and the 3rd processor 303 transmits in the inside of controller, so do not need to use CAN driver chip, and the receiving end RX of the receiving end RX of the first CAN controller 3011, the second CAN controller 3021 and receiving end RX of the 3rd CAN controller 3031 is all connected to bus, for sending data to carry out collection verification, and data-signal realizes the bus contention relation of logical OR by diode.
Preferably, inventor considers: when in bus during no signal, bus is high impedance, so connect a resistance to ground in bus, makes its level equalization raising antijamming capability, as the pull down resistor Rd in Fig. 6.Except this; resistance R1, R2 and R3 is serially connected with between the output terminal TX and bus of each CAN controller; concrete; R1, R2 and R3 play short-circuit protection effect; namely when bus short circuit is to ground; when the output terminal TX of CAN controller holds and exports high level, resistance R1, R2 and R3 play metering function, prevent TX port from being burnt.
Herein, it should be noted that, current-limiting resistance can be serially connected in any one position between the TX end of CAN control with bus, such as, in Fig. 6, between the negative electrode that current-limiting resistance R1 is serially connected in diode D1 and bus, again as shown in Figure 7, current-limiting resistance R1 is serially connected between the TX end of CAN control with the anode of diode D1.
It should be noted that, the control circuit that the utility model provides, can be identical with standard CAN on software simulating, realize multiple verification and fault-tolerant processing, also can realize receiving response, and communication data is not lost, and ensure that the stability that data are transmitted, and then improve the security of automobile manipulation, applied widely.
In sum,
The utility model provides a kind of control circuit, comprises at least one control module, and described control module comprises: processor, CAN controller and logical circuit, and wherein, the input end of CAN controller is electrically connected with the output terminal of described processor.The receiving end of CAN controller is connected with bus, to send data to be verified.The output terminal of CAN controller, by logical circuit and Bus lines, carries out the bus contention between each processor, and the priority realizing processor communication divides.Visible the transmission of control circuit without the need to adopting transceiver can realize data, circuit structure is simple, and cost is low.And this control circuit adopts the CAN protocol of standard, realize multiple verification, fault-tolerant processing and receive response, ensure that the stability that data are transmitted, and then improving the security of automobile manipulation, applied widely.
Except this, the utility model additionally provides a kind of controller and processor, comprises above-mentioned control circuit, the transmission equally without the need to adopting transceiver can realize data, and circuit structure is simple, and cost is low.
In this instructions, each embodiment adopts the mode of going forward one by one to describe, and what each embodiment stressed is the difference with other embodiments, between each embodiment identical similar portion mutually see.For the device that embodiment provides, the method provided due to itself and embodiment is corresponding, so description is fairly simple, relevant part illustrates see method part.
To the above-mentioned explanation of provided embodiment, professional and technical personnel in the field are realized or uses the utility model.To be apparent for those skilled in the art to the multiple amendment of these embodiments, General Principle as defined herein when not departing from spirit or scope of the present utility model, can realize in other embodiments.Therefore, the utility model can not be restricted to these embodiments shown in this article, but will meet the widest scope consistent with principle provided in this article and features of novelty.
Claims (7)
1. a control circuit, is characterized in that, described control circuit comprises at least one control module, and described control module comprises: processor, CAN controller and logical circuit;
The input end of described CAN controller is electrically connected with the output terminal of described processor;
The receiving end of described CAN controller is connected with bus, to send data to be verified;
The output terminal of described CAN controller is connected with described bus by described logical circuit, carries out the bus contention of described processor.
2. control circuit according to claim 1, is characterized in that, described CAN controller is arranged on the inside of described processor.
3. control circuit according to claim 1, is characterized in that, described CAN controller is arranged on the outside of described processor.
4. control circuit according to claim 1, is characterized in that, described logical circuit comprises diode, and accordingly, the output terminal of described CAN controller is connected with the anode of described diode, and the negative electrode of described diode is connected with described bus.
5. control circuit according to claim 1, is characterized in that, described control circuit also comprises: be serially connected in the current-limiting resistance between the output terminal of described CAN controller and described bus.
6. control circuit according to claim 1, is characterized in that, described logical circuit is OR circuit.
7. a controller, is characterized in that, described controller comprises as the control circuit in claim 1-6 as described in any one.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420856723.7U CN204389963U (en) | 2014-12-30 | 2014-12-30 | A kind of control circuit and controller |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420856723.7U CN204389963U (en) | 2014-12-30 | 2014-12-30 | A kind of control circuit and controller |
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| CN204389963U true CN204389963U (en) | 2015-06-10 |
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| CN201420856723.7U Active CN204389963U (en) | 2014-12-30 | 2014-12-30 | A kind of control circuit and controller |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111427824A (en) * | 2020-03-30 | 2020-07-17 | 深圳市汇川技术股份有限公司 | Serial port communication circuit |
| WO2021174424A1 (en) * | 2020-03-03 | 2021-09-10 | 华为技术有限公司 | Can bus circuit and can bus communication method |
| WO2022041000A1 (en) * | 2020-08-26 | 2022-03-03 | 深圳欣锐科技股份有限公司 | Can communication-based intra-board communication circuit and apparatus |
| WO2022040998A1 (en) * | 2020-08-26 | 2022-03-03 | 深圳欣锐科技股份有限公司 | Circuit and apparatus for controller area network communication |
-
2014
- 2014-12-30 CN CN201420856723.7U patent/CN204389963U/en active Active
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2021174424A1 (en) * | 2020-03-03 | 2021-09-10 | 华为技术有限公司 | Can bus circuit and can bus communication method |
| EP4105784A4 (en) * | 2020-03-03 | 2023-03-22 | Huawei Technologies Co., Ltd. | Can bus circuit and can bus communication method |
| CN111427824A (en) * | 2020-03-30 | 2020-07-17 | 深圳市汇川技术股份有限公司 | Serial port communication circuit |
| WO2022041000A1 (en) * | 2020-08-26 | 2022-03-03 | 深圳欣锐科技股份有限公司 | Can communication-based intra-board communication circuit and apparatus |
| WO2022040998A1 (en) * | 2020-08-26 | 2022-03-03 | 深圳欣锐科技股份有限公司 | Circuit and apparatus for controller area network communication |
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP03 | "change of name, title or address" |
Address after: 4 / F, building 1, No.14 Jiuxianqiao Road, Chaoyang District, Beijing 100020 Patentee after: Beijing Jingwei Hengrun Technology Co., Ltd Address before: 100101 Beijing city Chaoyang District Anxiang Beili 11 B block 8 layer Patentee before: Beijing Jingwei HiRain Technologies Co.,Ltd. |
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| CP03 | "change of name, title or address" |