CN204167349U - Light-emitting diode - Google Patents

Abstract

The utility model discloses a kind of light-emitting diode.This light-emitting diode comprises: substrate; Semiconductor layer, is formed on a surface of substrate; And antireflection element, be formed in substrate another on the surface, wherein, antireflection element comprises nano-pattern.Antireflection element is placed between substrate and air, to reduce the total reflection propagating into the light of air from semiconductor stack overlapping piece through substrate, thus improves light extraction efficiency.In addition, because antireflection element is formed with nano-pattern, so antireflection element can be formed with moth eye pattern, thus reduce the reflection of the interface between substrate and semiconductor layer significantly.

Description

led

technical field

The utility model relates to a light-emitting diode, in particular to a light-emitting diode with improved light extraction efficiency.

Background technique

Generally, gallium nitride light-emitting diodes are fabricated by growing a gallium nitride semiconductor layer on a sapphire substrate. Specifically, a patterned sapphire substrate (PSS) is mainly used as a growth substrate to improve light extraction efficiency. The pattern between the gallium nitride substrate and the sapphire substrate changes the path along which light generated in the active layer travels, thereby reducing light loss due to total internal reflection.

However, due to the difference in refractive index, some light generated in the active layer may be totally reflected at the interface between the substrate and air and thus lost in the semiconductor layer. Specifically, for light having a wavelength of 450 nm, since the refractive index of the sapphire substrate is about 1.7 and that of air is 1.0, there is a relatively large difference in refractive index between them. Therefore, total reflection easily occurs at the interface between the substrate and air.

Utility model content

The utility model is dedicated to providing a light emitting diode, which can reduce light loss in the light emitting diode and improve light extraction efficiency at the same time.

In addition, the present invention aims to provide a light emitting diode including an anti-reflection element placed between the substrate and the air to reduce the total reflection of light propagating from the semiconductor stack through the substrate to the air, thereby improving light extraction efficiency.

According to an aspect of the present invention, a light emitting diode includes: a substrate; a semiconductor layer formed on one surface of the substrate; and an antireflection element formed on the other surface of the substrate, wherein the antireflection element includes nanopatterns.

Using an anti-reflection element can reduce total reflection of light propagating from the semiconductor layer through the substrate to the air, thereby improving light extraction efficiency. In addition, since the anti-reflection element is formed in a nano-pattern, the anti-reflection element can be formed in a moth-eye pattern, thereby significantly reducing reflection at the interface between the substrate and the semiconductor layer.

The anti-reflection element may include a base adjacent to the substrate and nanopatterns formed on the base, the nanopatterns may include pillars and holes formed between the pillars.

The refractive index of the matrix may be greater than or equal to the refractive index of the substrate.

The refractive index of the nanopattern may be between that of the substrate and that of air.

The regions between the pillars or the holes may have a width on the order of nanometers, which is smaller than the wavelength of light generated in the active layer.

The width of the pillars may gradually decrease away from the substrate.

The refractive index of the nanopatterns can gradually decrease away from the matrix.

The nanopattern may be formed of silicon nitride or silicon oxynitride having a refractive index greater than that of the substrate.

The light emitting diodes may be flip chip light emitting diodes.

According to an embodiment of the invention, the anti-reflection element makes it possible to reduce light losses caused by total reflection of light propagating from the substrate into the air. Accordingly, it is possible to improve the light extraction efficiency of a light emitting diode emitting light through a substrate, such as a flip chip type light emitting diode.

Description of drawings

The above and other aspects, features and advantages of the present utility model will become clear through the following detailed description of the embodiments in conjunction with the accompanying drawings, in which:

1 is a schematic cross-sectional view of a light emitting diode according to an embodiment of the present invention;

Figure 2A is a detailed plan view of the light emitting diode shown in Figure 1;

FIG. 2B is a cross-sectional view of a light emitting diode taken along line II' shown in FIG. 2A;

Fig. 3 is an enlarged view of area A shown in Fig. 1 according to an embodiment of the present invention;

FIG. 4 is an enlarged view of the area A shown in FIG. 1 according to another embodiment of the present invention;

5 to 9 are cross-sectional views illustrating a method of manufacturing a light emitting diode according to an embodiment of the present invention;

Figure 10 is a SEM image showing metal nanopatterns;

FIG. 11 is a SEM image showing a nanopattern of an antireflection element formed using a dielectric layer.

Detailed ways

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided by way of example only so as to fully convey the spirit of the present invention to those skilled in the art. Therefore, the invention is not limited to the embodiments disclosed here, but can also be implemented in different forms. In the drawings, the width, length, thickness, etc. of elements may be exaggerated for convenience. Throughout the specification, the same reference numerals designate the same elements having the same or similar functions.

1 is a schematic cross-sectional view of a light emitting diode according to an embodiment of the present invention, FIG. 2A is a detailed plan view of the light emitting diode shown in FIG. 1 , and FIG. 2B is taken along line II' shown in FIG. 2A cutaway view. FIG. 3 is an enlarged view of the area A shown in FIG. 1 according to an embodiment of the present invention.

Referring to FIG. 1, a light emitting diode 100 according to an embodiment of the present invention may include a substrate 111, a semiconductor stack 113, and electrode pads 37a, 37b.

The semiconductor stack 113 is on one surface of the substrate 111 , and the anti-reflection element 120 is on the other surface of the substrate 111 .

The light-emitting diode 100 is a flip-chip light-emitting diode, wherein the electrode pads 37a, 37b are located on the underside of the chip.

The substrate 111 may be a growth substrate for growing a semiconductor layer, for example, a sapphire substrate or a gallium nitride substrate. For example, the substrate 111 is a heterogeneous substrate suitable for growing gallium nitride semiconductor layers and has a first refractive index. The substrate 111 may be, for example, a sapphire substrate having a refractive index of about 1.78 at a wavelength of 450 nm or a SiC substrate having a refractive index of about 2.72 at a wavelength of 450 nm.

The semiconductor stack 113 is on one surface of the substrate 111 . The semiconductor stack 113 includes a first conductive type semiconductor layer 23 on a substrate 111 and a plurality of mesas M each including an active layer 25 and a second conductive type semiconductor layer 27 . The active layer 25 is interposed between the first conductive type semiconductor layer 23 and the second conductive type semiconductor layer 27 . The reflective electrodes 30 are located on the plurality of mesas M, respectively.

As shown in the drawings, the plurality of mesas M may have an elongated shape and extend parallel to each other in one direction. Such a shape simplifies the formation of multiple mesas M having the same shape in multiple slice regions on the growth substrate 111 .

Although the reflective electrode 30 may be formed on each mesa M after the formation of the mesa M, it should be understood that the present invention is not limited thereto. Alternatively, after the second conductive type semiconductor layer 27 is formed, the reflective electrode 30 may be formed on the second conductive type semiconductor layer 27 before the mesas M are formed. The reflective electrode 30 covers most of the upper surface of the mesa M, and has substantially the same shape as that of the mesa M in plan view.

The reflective electrode 30 includes a reflective layer 28 and may further include a blocking layer 29 . The barrier layer 29 may cover the upper and side surfaces of the reflective layer 28 . For example, the reflective layer 28 is patterned and then the barrier layer 29 is formed thereon, whereby the barrier layer 29 may be formed to cover the upper and side surfaces of the reflective layer 28 . By way of example, the reflective layer 28 may be formed by depositing Ag, Ag alloy, Ni/Ag, NiZn/Ag, or TiO/Ag followed by patterning. The barrier layer 29 may be formed of Ni, Cr, Ti, Pt, Rd, Ru, W, Mo, TiW, or a combination thereof, and prevents diffusion or contamination of the metal material in the reflective layer.

After forming the plurality of mesas M, edges of the first conductivity type semiconductor layer 23 may also be etched. As a result, the upper surface of the substrate 111 may be exposed. The side surfaces of the first conductivity type semiconductor layer 23 may also be formed obliquely.

According to the present invention, the LED chip further includes a lower insulating layer 31 covering the plurality of mesas M and the first conductivity type semiconductor layer 23 . The lower insulating layer 31 has openings at specific regions thereof to allow electrical connection to the first conductive type semiconductor layer 23 and the second conductive type semiconductor layer 27 . For example, the lower insulating layer 31 may have an opening exposing the first conductive type semiconductor layer 23 and an opening exposing the reflective electrode 30 .

The opening may be located between the mesas M and near the edge of the substrate 111, and may have an elongated shape extending along the mesas M. Referring to FIG. On the other hand, some openings are limitedly located on the mesa M so as to be offset towards the same end of the mesa.

According to the present invention, the LED 100 further includes a current spreading layer 33 formed on the lower insulating layer 31 . The current spreading layer 33 covers the plurality of mesas M and the first conductive type semiconductor layer 23 . The current spreading layer 33 has openings on the respective mesas M so that the reflective electrodes are exposed through the openings. The current spreading layer 33 may form an ohmic contact with the first conductive type semiconductor layer 23 through the opening of the lower insulating layer 31 . The current spreading layer 33 is insulated from the plurality of mesas M and the reflective electrode 30 by the lower insulating layer 31 .

The opening of the current spreading layer 33 has a larger area than the opening of the lower insulating layer 31 to prevent the current spreading layer 33 from contacting the reflective electrode 30 .

The current spreading layer 33 is formed over substantially the entire upper region of the substrate 111 except for the opening. Therefore, current can be easily dispersed through the current spreading layer 33 . The current spreading layer 33 may include a highly reflective metal layer (eg, an Al layer), and the highly reflective metal layer may be formed on a bonding layer (eg, Ti, Cr, or Ni, etc.). In addition, a protective layer having a single layer or composite layer structure of Ni, Cr, or Au may be formed on the highly reflective metal layer. The current spreading layer 33 may have a multilayer structure of, for example, Ti/Al/Ti/Ni/Au.

The light emitting diode 100 according to the present invention further includes an upper insulating layer 35 formed on the current spreading layer 33 . The upper insulating layer 35 has an opening exposing the reflective electrode 30 and an opening exposing the current spreading layer 33 .

The upper insulating layer 35 may be formed of an oxide insulating layer, a nitride insulating layer, a mixed or alternate layer of these insulating layers, or a polymer such as polyimide, polytetrafluoroethylene, and parylene.

The first pad 37 a and the second pad 37 b are formed on the upper insulating layer 35 . The first pad 37 a is connected to the current spreading layer 33 through the opening of the upper insulating layer 35 , and the second pad 37 b is connected to the reflective electrode 30 through the opening of the upper insulating layer 35 . The first pad 37a and the second pad 37b may be used as pads for SMT or bump connection to mount the light emitting diode on a circuit board or the like.

The first pad 37a and the second pad 37b may be simultaneously formed through the same process (eg, a photolithography and etching process or a lift-off process). The first pad 37a and the second pad 37b may include a bonding layer formed of, for example, Ti, Cr, and Ni, and a highly conductive metal layer formed of Al, Cu, Ag, Au, or the like. The first pad 37a and the second pad 37b may be formed such that ends of the electrode pads are located on the same plane, whereby the light emitting diode chip may be flip-chip bonded to conductive patterns formed to the same thickness on the circuit board. .

Then, the growth substrate 111 is divided into individual light emitting diode chip units, thereby providing completed light emitting diode chips. The substrate 111 may be removed from the light emitting diode chips before or after separation into individual light emitting diode chip units.

The anti-reflection element 120 is located on the other surface of the substrate 111 . That is, the anti-reflection element 120 may be directly adjacent to the substrate 111 . The anti-reflection element 120 is placed between the substrate 111 and air. The anti-reflection element 120 is located at the interface between the substrate 111 and air, and includes a matrix 121 having a first refractive index and nanopatterns having a second refractive index, the first refractive index being greater than that of the substrate 111, and the second refractive index being between the refractive index of the substrate 111 and that of air. The anti-reflection element 120 prevents total reflection of light incident from the substrate 111 and improves a difference in refractive index between the substrate 111 and air by means of the second refractive index, thereby enhancing light extraction efficiency.

The anti-reflection element 120 includes a base 121 and nanopatterns. The nanopattern includes pillars 123 and holes 125 . The pillars 123 and the holes 125 may be formed in nanometer size. A region between the pillars 123 or the holes 125 has a nanoscale width smaller than the wavelength of light generated in the active layer. In addition, the height of the pillar 123 or the hole 125 is greater than λ/4 of the light generated in the active layer.

The anti-reflection element 120 has a first refractive index greater than that of the substrate 111 and a second refractive index between the refractive index of the substrate 111 and that of air. For example, when the substrate 111 is a sapphire substrate, the matrix 121 may be formed of silicon nitride or silicon oxynitride having a refractive index greater than or equal to that of the sapphire substrate. Accordingly, the anti-reflection member 120 may reduce total reflection at the first interface a1 between the substrate 111 and the base body 121, thereby improving light extraction efficiency.

The nanopattern may be formed of silicon nitride or silicon oxynitride having a refractive index greater than or equal to that of the sapphire substrate.

Therefore, the refractive index of the nanopattern-formed region a3 is between that of the substrate 111 and that of air to reduce total internal reflection, thereby improving light extraction efficiency.

According to an embodiment, the substrate 111 is provided on one surface thereof with the semiconductor stack 113 and on the other surface thereof is provided with an anti-reflection element 120 having a first refractive index greater than that of the substrate 111 The matrix 121 of the index improves the total reflection at the first interface a1 between the substrate 111 and the anti-reflection element 120, and the nanopattern having the second refractive index between the refractive index of the substrate 111 and the refractive index of air reduces the Total reflection at the second interface a2 between the anti-reflection member 120 and air, thereby improving light extraction efficiency.

In addition, the light emitting diode according to the present invention is directly bonded to the circuit board through flip chip bonding, and has the advantages of high efficiency and small size compared with common packaged light emitting devices.

Although the anti-reflection element 120 has been illustrated as being formed using a dielectric layer such as silicon nitride or silicon oxynitride in the present embodiment, the present invention is not limited thereto. Optionally, the anti-reflection element 120 can also be directly formed on the substrate 111 by etching the surface of the substrate 111 .

FIG. 4 is an enlarged view of the area A shown in FIG. 1 according to another embodiment of the present invention.

Referring to FIG. 4 , in the light emitting diode according to this embodiment of the present invention, the antireflection element 220 on the substrate 111 may be directly adjacent to the substrate 111 . The anti-reflection element 220 is disposed between the substrate 111 and air. The anti-reflection element 220 is located at the interface between the substrate 111 and the air, and includes a matrix 221 having a first refractive index and nanopatterns having a second refractive index, the first refractive index being greater than that of the substrate 111, and the second refractive index being between the refractive index of the substrate 111 and that of air. The anti-reflection element 220 prevents total reflection of light incident from the substrate 111 by means of the first refractive index, and improves a difference in refractive index between the substrate 111 and air by means of the second refractive index, thereby enhancing light extraction efficiency.

The anti-reflection element 220 includes a base 221 and nanopatterns. The nanopattern includes pillars 223 and holes 225 . The pillars 223 and the holes 225 may be formed in nanometer size. A region between the pillars 223 or a region between the holes 225 has a nanoscale width smaller than the wavelength of light generated in the active layer. In addition, the height of the pillar 223 or the hole 225 is greater than the wavelength of light generated in the active layer.

The anti-reflection element 220 has a first refractive index greater than that of the substrate 111 and a second refractive index between the refractive index of the substrate 111 and that of air. For example, when the substrate 111 is a sapphire substrate, the matrix 221 may be formed of silicon nitride or silicon oxynitride having a refractive index greater than or equal to that of the sapphire substrate. Accordingly, the anti-reflection member 220 may reduce total reflection at the interface a1 between the substrate 111 and the base body 221, thereby improving light extraction efficiency.

The nanopattern may be formed of silicon nitride or silicon oxynitride having a refractive index greater than or equal to that of the sapphire substrate. Spaces in the nanopattern, that is, regions between the pillars 223 or at least some of the holes 225 may be filled with a gallium nitride semiconductor layer or formed with air gaps therein.

In particular, when the space in the nanopattern is filled with the gallium nitride semiconductor layer, the column 223 of the nanopattern may be formed to have a gradually decreasing width from the bottom thereof to the top thereof. In addition, the nanopattern may be formed of silicon oxynitride having the same or similar refractive index as that of the sapphire substrate. In this case, the refractive index of the nanopattern gradually increases from the air to the substrate 111 . That is, in the region a3 where the nanopattern is formed, the nanopattern has a refractive index close to the first refractive index near the substrate 111 and has a refractive index close to the second refractive index near air. As a result, total internal reflection can be reduced at both interfaces of the antireflection element 220 .

According to this embodiment, the substrate 111 is provided on one surface thereof with a semiconductor stack (not shown), and on its other surface is provided with an anti-reflection element 220 having a larger refractive index than the substrate 111 The matrix 221 of the first refractive index of the index improves the total reflection at the first interface a1 between the substrate 111 and the anti-reflection element 220, and has a second refractive index between the refractive index of the substrate 111 and the refractive index of air The nanopatterns of ∆ reduce total reflection at the second interface a2 between the anti-reflection member 220 and air, thereby improving light extraction efficiency.

In addition, the light emitting diode according to the present invention is directly bonded to the circuit board through flip chip bonding, and has the advantages of high efficiency and small size compared with common packaged light emitting devices.

Although the anti-reflection element 220 has been shown to be formed using a dielectric layer such as silicon nitride or silicon oxynitride in the present embodiment, the present invention is not limited thereto. Optionally, the anti-reflection element 220 can also be directly formed on the substrate 111 by etching the surface of the substrate 111 .

5 to 9 are cross-sectional views illustrating a method of manufacturing a light emitting diode according to an embodiment of the present invention.

Referring to FIG. 5 , in the method of manufacturing a light emitting diode according to an embodiment of the present invention, first, a dielectric layer 150 is formed on a substrate 111 . The substrate 111 may be a sapphire substrate or a SiC substrate. The dielectric layer 150 may be formed of silicon nitride or silicon oxynitride using plasma enhanced chemical vapor deposition (PECVD). The dielectric layer 150 may be formed to a thickness greater than a wavelength of light generated in the active layer, for example, a thickness of 500 nm or more.

Then, referring to FIG. 6 , a metal layer is formed on the dielectric layer 150 , and a metal nanopattern 151 is formed by heat-treating the metal layer. The metal layer may be formed of, for example, Au, Pt, or Ni to a thickness of 1 nm to 100 nm. In addition, the metal layer can be heat-treated at a temperature of 200° C. to 900° C. so that the metal material can be aggregated to form the metal nano pattern 151 .

Then, referring to FIG. 7, the antireflection member 120 including the dielectric nanopattern is formed by etching the dielectric layer 150 (shown in FIG. 6) using the metal nanopattern 151 as a mask. Dielectric layer 150 may be etched by inductively coupled plasma reactive ion etching (ICPRIE). Accordingly, in the anti-reflection member 120, a dielectric nanopattern including the pillars 123 and the holes 125 may be formed.

Then, referring to FIG. 8, the metal nanopattern 151 (shown in FIG. 7) positioned on the dielectric nanopattern is removed. Metallic material can be removed by wet etching.

The upper surfaces of the pillars 123 are exposed by etching the metal nanopattern 151 (shown in FIG. 7 ).

Referring to FIG. 9, an antireflection element 120 is formed on one surface of a substrate 111, and a semiconductor layer comprising a first conductivity type semiconductor layer 23, an active layer 25, and a second conductivity type semiconductor layer 27 is grown on the other surface of the substrate 111. Stack 113 . The semiconductor stack 113 may be grown by metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).

In the semiconductor stack 113, the first conductive type semiconductor layer 23 can be exposed by etching some regions of the second conductive type semiconductor layer 27 and the active layer 25, and can be formed by forming the reflective layer 28, the barrier layer 29, and the first solder layer. The pad 37a and the second pad 37b are used to fabricate a flip chip type light emitting diode.

Since the configuration of the semiconductor stack 113 is the same as that shown in FIG. 2 , its detailed description will be omitted.

Although the dielectric layer 150 has been shown to be etched using metal nanopatterns 151 in the embodiment shown in FIGS. for patterning.

FIG. 10 is a SEM image showing nanopatterns formed of Ni. It can be seen that the size of the Ni clusters is about 100 nm or less, and the size of the gaps between the clusters is 100 nm or less.

FIG. 11 is a SEM image showing the nanopatterns of the antireflection element after removal of the metal nanopatterns.

As described above, according to the present invention, the anti-reflection element 120 or 220 is located on the substrate 111 to reduce total reflection caused by a difference in refractive index at an interface between air and the substrate 111, thereby improving light extraction efficiency.

In addition, the light emitting diode according to the present invention is directly bonded to the circuit board through flip chip bonding, and has the advantages of high efficiency and small size compared with common packaged light emitting devices.

Although various embodiments and features of the present invention have been described above, the present invention is not limited thereto, and many modifications and changes can be made without departing from the spirit and scope of the present invention.

Claims (9)

1. a light-emitting diode, described light-emitting diode comprises:

Substrate;

Semiconductor layer, is formed on a surface of substrate; And

Antireflection element, be formed in substrate another on the surface,

Wherein, antireflection element comprises nano-pattern.

2. light-emitting diode as claimed in claim 1, wherein, antireflection element comprises:

Matrix is adjacent with substrate; And

Be formed in the nano-pattern on matrix,

Wherein, nano-pattern comprises post and is formed in the hole between post.

3. light-emitting diode as claimed in claim 2, wherein, the refractive index of matrix is more than or equal to the refractive index of substrate.

4. light-emitting diode as claimed in claim 1, wherein, the refractive index of nano-pattern is between the refractive index and the refractive index of air of substrate.

5. light-emitting diode as claimed in claim 2, wherein, the region between post or between hole has nano level width, and described width is less than the wavelength of the light produced in active layer.

6. light-emitting diode as claimed in claim 2, wherein, the width of post reduces gradually away from matrix.

7. light-emitting diode as claimed in claim 6, wherein, the refractive index of nano-pattern reduces gradually away from matrix.

8. light-emitting diode as claimed in claim 1, wherein, nano-pattern is greater than the silicon nitride of the refractive index of substrate by refractive index or silicon oxynitride is formed.

9. light-emitting diode as claimed in claim 1, wherein, light-emitting diode is chip upside-down mounting type light-emitting diode.