CN204167349U - Light-emitting diode - Google Patents
Light-emitting diode Download PDFInfo
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- CN204167349U CN204167349U CN201420517945.6U CN201420517945U CN204167349U CN 204167349 U CN204167349 U CN 204167349U CN 201420517945 U CN201420517945 U CN 201420517945U CN 204167349 U CN204167349 U CN 204167349U
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- 239000000758 substrate Substances 0.000 claims abstract description 106
- 239000004065 semiconductor Substances 0.000 claims abstract description 42
- 239000011159 matrix material Substances 0.000 claims description 20
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 10
- 229910052710 silicon Inorganic materials 0.000 claims description 10
- 239000010703 silicon Substances 0.000 claims description 10
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 9
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 9
- 238000000605 extraction Methods 0.000 abstract description 15
- 230000001902 propagating effect Effects 0.000 abstract description 3
- 239000010410 layer Substances 0.000 description 81
- 230000004888 barrier function Effects 0.000 description 20
- 229910052751 metal Inorganic materials 0.000 description 17
- 239000002184 metal Substances 0.000 description 17
- 229910052594 sapphire Inorganic materials 0.000 description 14
- 239000010980 sapphire Substances 0.000 description 14
- 238000003892 spreading Methods 0.000 description 14
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 7
- 229910002601 GaN Inorganic materials 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 5
- 238000005530 etching Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 229910052759 nickel Inorganic materials 0.000 description 5
- 229910052804 chromium Inorganic materials 0.000 description 4
- 238000001878 scanning electron micrograph Methods 0.000 description 4
- 230000007423 decrease Effects 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 239000007769 metal material Substances 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- 239000011230 binding agent Substances 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000008187 granular material Substances 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- -1 such as Substances 0.000 description 2
- 229910001316 Ag alloy Inorganic materials 0.000 description 1
- 229910003962 NiZn Inorganic materials 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910008599 TiW Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000009616 inductively coupled plasma Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 229920000052 poly(p-xylylene) Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 229920001343 polytetrafluoroethylene Polymers 0.000 description 1
- 239000004810 polytetrafluoroethylene Substances 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0083—Periodic patterns for optical field-shaping in or on the semiconductor body or semiconductor body package, e.g. photonic bandgap structures
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
- Led Device Packages (AREA)
Abstract
The utility model discloses a kind of light-emitting diode.This light-emitting diode comprises: substrate; Semiconductor layer, is formed on a surface of substrate; And antireflection element, be formed in substrate another on the surface, wherein, antireflection element comprises nano-pattern.Antireflection element is placed between substrate and air, to reduce the total reflection propagating into the light of air from semiconductor stack overlapping piece through substrate, thus improves light extraction efficiency.In addition, because antireflection element is formed with nano-pattern, so antireflection element can be formed with moth eye pattern, thus reduce the reflection of the interface between substrate and semiconductor layer significantly.
Description
Technical field
The utility model relates to a kind of light-emitting diode, more particularly, relates to a kind of light-emitting diode with the light extraction efficiency improved.
Background technology
Usually, gallium nitride light-emitting diode is manufactured by growing gallium nitride semiconductor layer in sapphire substrates.Particularly, main patterned sapphire substrate (PSS) that uses, as growth substrate, improves light extraction efficiency.Pattern between gallium nitride substrates and sapphire substrates changes the path that the light produced in active layer propagates institute edge, thus decreases the light loss caused due to total internal reflection.
But due to the difference of refractive index, some light produced in active layer may interface total reflection between substrate and air, therefore loses in the semiconductor layer.Particularly, for the light of wavelength 450nm, the refractive index due to sapphire substrates is about 1.7, and the refractive index of air is 1.0, so have relatively large refractive index difference between which.Therefore, easily there is total reflection in the interface between substrate and air.
Utility model content
The utility model is devoted to provide a kind of light-emitting diode, and described light-emitting diode can reduce light loss in the light emitting diode, improves light extraction efficiency simultaneously.
In addition, the utility model is devoted to provide a kind of light-emitting diode, described light-emitting diode comprises the antireflection element be placed between substrate and air, to reduce the total reflection being transmitted to the light of air from semiconductor stack overlapping piece through substrate, thus improves light extraction efficiency.
According to one side of the present utility model, a kind of light-emitting diode comprises: substrate; Semiconductor layer, is formed on a surface of substrate; And antireflection element, be formed in substrate another on the surface, wherein, antireflection element comprises nano-pattern.
Use antireflection element can reduce the total reflection propagating into the light of air from semiconductor layer through substrate, thus improve light extraction efficiency.In addition, because antireflection element is formed with nano-pattern, so antireflection element can be formed with moth eye pattern, thus reduce the reflection of the interface between substrate and semiconductor layer significantly.
The nano-pattern that antireflection element can comprise the matrix adjacent with substrate and be formed on matrix, the hole that nano-pattern can comprise post and be formed between post.
The refractive index of matrix can be more than or equal to the refractive index of substrate.
The refractive index of nano-pattern can between the refractive index of substrate and the refractive index of air.
Region between post or between hole can have nano level width, and described width is less than the wavelength of the light produced in active layer.
The width of post can reduce gradually away from matrix.
The refractive index of nano-pattern can reduce gradually away from matrix.
Nano-pattern can be greater than the silicon nitride of the refractive index of substrate by refractive index or silicon oxynitride is formed.
Light-emitting diode can be chip upside-down mounting type light-emitting diode.
According to embodiment of the present utility model, antireflection element makes it possible to reduce the light loss caused by the total reflection of the light propagating into air from substrate.Therefore, it is possible to improve the light extraction efficiency being emitted through the light-emitting diode (such as chip upside-down mounting type light-emitting diode) of the light of substrate.
Accompanying drawing explanation
By the detailed description to embodiment of carrying out below in conjunction with accompanying drawing, above-mentioned and other side, feature and advantage of the present utility model will become clear, in the accompanying drawings:
Fig. 1 is the schematic cross sectional views of the light-emitting diode according to the utility model embodiment;
Fig. 2 A is the detailed plan view of the light-emitting diode shown in Fig. 1;
Fig. 2 B is the cutaway view of the light-emitting diode along the line I-I' intercepting shown in Fig. 2 A;
Fig. 3 is the enlarged drawing of the region A shown in Figure 1 according to an embodiment of the present utility model;
Fig. 4 is the enlarged drawing of the region A shown in Figure 1 according to another embodiment of the present utility model;
Fig. 5 to Fig. 9 illustrates the cutaway view manufactured according to the method for the light-emitting diode of an embodiment of the present utility model;
Figure 10 is the SEM image that metal nano pattern is shown;
Figure 11 is the SEM image of the nano-pattern that the antireflection element utilizing dielectric layer to be formed is shown.
Embodiment
Hereinafter, embodiment of the present utility model is described with reference to the accompanying drawings in detail.Mode by means of only example provides the following examples, so that spirit of the present utility model is conveyed to those skilled in the art fully.Therefore, the utility model is not limited to embodiment disclosed herein, but also can implement in different forms.In the accompanying drawings, for convenience's sake, the width of element, length and thickness etc. can be exaggerated.In whole specification, same label instruction has the same element of same or analogous function.
Fig. 1 is the schematic cross sectional views of the light-emitting diode according to an embodiment of the present utility model, and Fig. 2 A is the detailed plan view of the light-emitting diode shown in Fig. 1, and Fig. 2 B is the cutaway view intercepted along the line I-I' shown in Fig. 2 A.Fig. 3 is the enlarged drawing of the region A shown in Figure 1 according to an embodiment of the present utility model.
With reference to Fig. 1, substrate 111, semiconductor stack overlapping piece 113 and electrode pad 37a, 37b can be comprised according to the light-emitting diode 100 of an embodiment of the present utility model.
Semiconductor stack overlapping piece 113 is positioned on a surface of substrate 111, antireflection element 120 be positioned at substrate 111 another on the surface.
Light-emitting diode 100 is flip chip type light-emitting diodes, and wherein, electrode pad 37a, 37b are positioned on the downside of sheet.
Substrate 111 can be the growth substrate for grown semiconductor layer, such as, and sapphire substrates or gallium nitride substrates.Such as, substrate 111 be suitable for growing gallium nitride semiconductor layer inhomogeneous substrate and there is first refractive rate.Substrate 111 can be the refractive index such as under the wavelength of 450nm to be the sapphire substrates of about 1.78 or the refractive index under the wavelength of 450nm be about 2.72 SiC substrate.
Semiconductor stack overlapping piece 113 is positioned on a surface of substrate 111.Semiconductor stack overlapping piece 113 comprises and is positioned at the first conductive type semiconductor layer 23 in substrate 111 and multiple table top M, and each in multiple table top M includes active layer 25 and second conductive type semiconductor layer 27.Active layer 25 is placed between the first conductive type semiconductor layer 23 and second conductive type semiconductor layer 27.Reflecting electrode 30 lays respectively on multiple table top M.
As shown in the drawing, multiple table top M can have the shape of elongation, and extend parallel to each other along a direction.The formation with multiple table top M of same shape in multiple panel region of such shape simplification in growth substrate 111.
Although can form reflecting electrode 30 on each table top M after formation table top M, should be understood that, the utility model is not limited thereto.Alternatively, after formation second conductive type semiconductor layer 27, reflecting electrode 30 can be formed on second conductive type semiconductor layer 27 before formation table top M.Reflecting electrode 30 covers most of upper surface of table top M, and has the shape substantially identical with the shape of table top M in plan view.
Reflecting electrode 30 comprises reflector 28, and can comprise barrier layer 29.Barrier layer 29 can cover upper surface and the side surface in reflector 28.Such as, form the pattern in reflector 28, then form barrier layer 29 thereon, make barrier layer 29 can be formed to cover upper surface and the side surface in reflector 28 thus.By way of example, then reflector 28 can be formed by patterning by deposition Ag, Ag alloy, Ni/Ag, NiZn/Ag or TiO/Ag.Barrier layer 29 can be formed by Ni, Cr, Ti, Pt, Rd, Ru, W, Mo, TiW or their combination, and prevents diffusion or the pollution of the metal material in reflector.
After the multiple table top M of formation, the edge of the first conductive type semiconductor layer 23 can also be etched.As a result, the upper surface of substrate 111 can be exposed.The side surface of the first conductive type semiconductor layer 23 can also be formed obliquely.
According to the utility model, light-emitting diode chip for backlight unit also comprises the lower insulating barrier 31 covering multiple table top M and the first conductive type semiconductor layer 23.Lower insulating barrier 31 has opening in its specific region, to allow to be electrically connected to the first conductive type semiconductor layer 23 and second conductive type semiconductor layer 27.Such as, lower insulating barrier 31 can have the opening of exposure first conductive type semiconductor layer 23 and expose the opening of reflecting electrode 30.
Opening between table top M and at the adjacent edges of substrate 111, and can have the shape of the elongation extended along table top M.On the other hand, some openings are limitedly positioned on table top M, are biased with the identical end towards table top.
According to the utility model, light-emitting diode 100 also comprises the current spreading layer 33 be formed on lower insulating barrier 31.Current spreading layer 33 covers multiple table top M and the first conductive type semiconductor layer 23.Current spreading layer 33 has the opening be positioned on each table top M, thus exposes reflecting electrode by opening.Current spreading layer 33 can form ohmic contact by the opening of lower insulating barrier 31 and the first conductive type semiconductor layer 23.Current spreading layer 33 is insulated with multiple table top M and reflecting electrode 30 by lower insulating barrier 31.
The opening of current spreading layer 33 has the area larger than the opening of lower insulating barrier 31, contacts with reflecting electrode 30 to prevent current spreading layer 33.
Current spreading layer 33 is formed in above the substantially whole upper area except opening of substrate 111.Therefore, electric current easily can be disperseed by current spreading layer 33.Current spreading layer 33 can comprise high reflecting metal layer (such as Al layer), and high reflecting metal layer can be formed on binder course (such as Ti, Cr or Ni etc.).In addition, the protective layer of the individual layer or lamination layer structure with Ni, Cr or Au can be formed on high reflecting metal layer.Current spreading layer 33 can have the sandwich construction of such as Ti/Al/Ti/Ni/Au.
The upper insulating barrier 35 be formed on current spreading layer 33 is also comprised according to light-emitting diode 100 of the present utility model.Upper insulating barrier 35 has the opening exposing reflecting electrode 30 and the opening exposing current spreading layer 33.
Upper insulating barrier 35 can be formed by the polymer of the mixed layer of oxide insulating layer, insulating nitride layer, these insulating barriers or alternating layer or such as polyimides, polytetrafluoroethylene and Parylene etc.
First pad 37a and the second pad 37b is formed on insulating barrier 35.First pad 37a is connected to current spreading layer 33 by the opening of upper insulating barrier 35, and the second pad 37b is connected to reflecting electrode 30 by the opening of upper insulating barrier 35.First pad 37a and the second pad 37b can be used as the pad that SMT or projection are connected, to be arranged on by light-emitting diode on circuit board etc.
First pad 37a and the second pad 37b can be formed by same technique (such as, chemical etching technique or stripping technology) simultaneously.First pad 37a and the second pad 37b can comprise the binder course formed by such as Ti, Cr and Ni etc. and the high-conductive metal layer formed by Al, Cu, Ag and Au etc.First pad 37a and the second pad 37b can be formed to make the end of electrode pad in the same plane, and light-emitting diode chip for backlight unit can be attached to by flip-chip the conductive pattern being formed same thickness on circuit boards thus.
Then, growth substrate 111 is divided into independent light-emitting diode chip for backlight unit unit, thus the light-emitting diode chip for backlight unit after providing.Before or after being divided into independent light-emitting diode chip for backlight unit unit, substrate 111 can be removed from light-emitting diode chip for backlight unit.
Antireflection element 120 be positioned at substrate 111 another on the surface.That is, antireflection element 120 can with substrate 111 direct neighbor.Antireflection element 120 is placed between substrate 111 and air.The interface of antireflection element 120 between substrate 111 and air, and comprise the matrix 121 with first refractive rate and the nano-pattern with the second refractive index, first refractive rate is greater than the refractive index of substrate 111, and the second refractive index is between the refractive index and the refractive index of air of substrate 111.Antireflection element 120 prevents the total reflection of the light from substrate 111 incidence, and improves the refractive index difference between substrate 111 and air by means of the second refractive index, thus strengthens light extraction efficiency.
Antireflection element 120 comprises matrix 121 and nano-pattern.Nano-pattern comprises post 123 and hole 125.Post 123 and hole 125 can be formed nano-scale.Region between post 123 or hole 125 has the nanoscale width of the wavelength being less than the light produced in active layer.In addition, the height in post 123 or hole 125 is greater than λ/4 of the light produced in active layer.
Antireflection element 120 has the first refractive rate of the refractive index being greater than substrate 111 and the second refractive index between the refractive index and the refractive index of air of substrate 111.Such as, when substrate 111 is sapphire substrates, matrix 121 can be more than or equal to the silicon nitride of the refractive index of sapphire substrates by refractive index or silicon oxynitride is formed.Therefore, antireflection element 120 can reduce the total reflection at the first a1 place, interface between substrate 111 and matrix 121, thus improves light extraction efficiency.
Nano-pattern can be more than or equal to the silicon nitride of the refractive index of sapphire substrates by refractive index or silicon oxynitride is formed.
Therefore, the refractive index being formed with the region a3 of nano-pattern, between the refractive index and the refractive index of air of substrate 111, to reduce total internal reflection, thus improves light extraction efficiency.
According to embodiment, substrate 111 is provided with semiconductor stack overlapping piece 113 in one surface, and be provided with antireflection element 120 on the surface its another, in antireflection element 120, the matrix 121 with the first refractive rate of the refractive index being greater than substrate 111 improves the total reflection at the first a1 place, interface between substrate 111 and antireflection element 120, and the nano-pattern with the second refractive index between the refractive index and the refractive index of air of substrate 111 decreases the total reflection at the second contact surface a2 place between antireflection element 120 and air, thus improve light extraction efficiency.
In addition, to be combined by flip-chip according to light-emitting diode of the present utility model and be directly attached to circuit board, and there is the advantage that efficiency is high and size is little compared with the luminescent device of common packaged type.
Although being depicted as by antireflection element 120 in the present embodiment utilizes the dielectric layer of such as silicon nitride or silicon oxynitride to be formed, the utility model is not limited thereto.Alternatively, antireflection element 120 also directly can be formed in substrate 111 by the surface etching substrate 111.
Fig. 4 is the enlarged drawing of the region A shown in Figure 1 according to another embodiment of the present utility model.
With reference to Fig. 4, according in the light-emitting diode of this embodiment of the present utility model, be positioned at antireflection element 220 in substrate 111 can with substrate 111 direct neighbor.Antireflection element 220 is arranged between substrate 111 and air.The interface of antireflection element 220 between substrate 111 and air, and comprise the matrix 221 with first refractive rate and the nano-pattern with the second refractive index, first refractive rate is greater than the refractive index of substrate 111, and the second refractive index is between the refractive index and the refractive index of air of substrate 111.Antireflection element 220 prevents the total reflection of the light from substrate 111 incidence by means of first refractive rate, and improves the refractive index difference between substrate 111 and air by means of the second refractive index, thus strengthens light extraction efficiency.
Antireflection element 220 comprises matrix 221 and nano-pattern.Nano-pattern comprises post 223 and hole 225.Post 223 and hole 225 can be formed nano-scale.Region between post 223 or the region between hole 225 have the nanoscale width less than the wavelength of the light produced in active layer.In addition, the height in post 223 or hole 225 is greater than the wavelength of the light produced in active layer.
Antireflection element 220 has the first refractive rate of the refractive index being greater than substrate 111 and the second refractive index between the refractive index and the refractive index of air of substrate 111.Such as, when substrate 111 is sapphire substrates, matrix 221 can be more than or equal to the silicon nitride of the refractive index of sapphire substrates by refractive index or silicon oxynitride is formed.Therefore, antireflection element 220 can reduce the total reflection at the a1 place, interface between substrate 111 and matrix 221, thus improves light extraction efficiency.
Nano-pattern can be more than or equal to the silicon nitride of the refractive index of sapphire substrates by refractive index or silicon oxynitride is formed.Space in nano-pattern, that is, the region between post 223 or at least one some holes 225 can be filled with gallium nitride semiconductor layers or be formed with air gap wherein.
Specifically, when the space in nano-pattern is filled with gallium nitride semiconductor layers, the post 223 of nano-pattern can be formed to have bottom it to the width that its top reduces gradually.In addition, nano-pattern can be formed by the silicon oxynitride had with the same or analogous refractive index of the refractive index of sapphire substrates.In this case, the refractive index of nano-pattern 111 to increase gradually from air to substrate.That is, in the region a3 forming nano-pattern, nano-pattern has the refractive index close to first refractive rate near substrate 111, and near air, have the refractive index close to the second refractive index.As a result, total internal reflection can be reduced in two of antireflection element 220 interface.
According to this embodiment, substrate 111 is provided with semiconductor stack overlapping piece (not shown) in one surface, and be provided with antireflection element 220 on the surface its another, in antireflection element 220, the matrix 221 with the first refractive rate of the refractive index being greater than substrate 111 improves the total reflection at the first a1 place, interface between substrate 111 and antireflection element 220, and the nano-pattern with the second refractive index between the refractive index and the refractive index of air of substrate 111 decreases the total reflection at the second contact surface a2 place between antireflection element 220 and air, thus improve light extraction efficiency.
In addition, to be combined by flip-chip according to light-emitting diode of the present utility model and be directly attached to circuit board, and there is the advantage that efficiency is high and size is little compared with the luminescent device of common packaged type.
Although being depicted as by antireflection element 220 in the present embodiment utilizes the dielectric layer of such as silicon nitride or silicon oxynitride to be formed, the utility model is not limited thereto.Alternatively, antireflection element 220 also directly can be formed in substrate 111 by the surface etching substrate 111.
Fig. 5 to Fig. 9 illustrates the cutaway view manufactured according to the method for the light-emitting diode of an embodiment of the present utility model.
With reference to Fig. 5, manufacturing in the method according to the light-emitting diode of embodiment of the present utility model, first, substrate 111 forms dielectric layer 150.Substrate 111 can be sapphire substrates or SiC substrate.Dielectric layer 150 can utilize plasma reinforced chemical vapour deposition (PECVD) to be formed by silicon nitride or silicon oxynitride.Dielectric layer 150 can be formed to be larger than the thickness of the wavelength of the light produced in active layer, such as, and the thickness of 500nm or larger.
Then, with reference to Fig. 6, dielectric layer 150 forms metal level, and forms metal nano pattern 151 by heat-treating metal level.Metal level can be formed as the thickness of 1nm to 100nm by such as Au, Pt or Ni.In addition, metal level can heat treatment at the temperature of 200 DEG C to 900 DEG C, thus metal material can be assembled, to form metal nano pattern 151.
Then, with reference to Fig. 7, by using metal nano pattern 151 to carry out etching dielectric layer 150 (shown in Figure 6) as mask, form the antireflection element 120 comprising dielectric nano pattern.Can be etched dielectric layer 150 by inductively coupled plasma reactive ion etching (ICPRIE).Therefore, in antireflection element 120, the dielectric nano pattern comprising post 123 and hole 125 can be formed.
Then, with reference to Fig. 8, remove the metal nano pattern 151 (shown in Figure 7) be positioned on dielectric nano pattern.Metal material can be removed by wet etching.
The upper surface of post 123 is exposed by etching metal nano-pattern 151 (shown in Figure 7).
With reference to Fig. 9, a surface of substrate 111 forms antireflection element 120, and comprises the semiconductor stack overlapping piece 113 of the first conductive type semiconductor layer 23, active layer 25 and second conductive type semiconductor layer 27 at another surface-borne of substrate 111.Metal organic chemical vapor deposition (MOCVD) can be passed through or molecular beam epitaxy (MBE) grows semiconductor stack part 113.
In semiconductor stack overlapping piece 113, the first conductive type semiconductor layer 23 can be exposed by some regions of etching second conductive type semiconductor layer 27 and active layer 25, and chip upside-down mounting type light-emitting diode can be manufactured by forming reflector 28, barrier layer 29 and the first pad 37a and the second pad 37b.
Due to semiconductor stack overlapping piece 113 structure with construct as shown in Figure 2 identical, so will the detailed description of omission to it.
Although being depicted as by dielectric layer 150 in this embodiment shown in Fig. 5 to Fig. 9 utilizes metal nano pattern 151 to etch, scanner or Electron beam engraving equipment also can be utilized to carry out patterning to dielectric layer 150.
Figure 10 is the SEM image that the nano-pattern formed by Ni is shown.Can find out, Ni granule is of a size of about 100nm or less, and the gap between granule is of a size of 100nm or less.
Figure 11 illustrates the SEM image at the nano-pattern removing the antireflection element after metal nano pattern.
As mentioned above, according to the utility model, antireflection element 120 or 220 is positioned in substrate 111, to reduce the total reflection caused by the specific refractivity of the interface between air and substrate 111, thus improves light extraction efficiency.
In addition, to be combined by flip-chip according to light-emitting diode of the present utility model and be directly attached to circuit board, and there is the advantage that efficiency is high and size is little compared with the luminescent device of common packaged type.
Although be described above different embodiment of the present utility model and feature, the utility model has been not limited thereto, and when not departing from spirit and scope of the present utility model, can carry out many amendments and change.
Claims (9)
1. a light-emitting diode, described light-emitting diode comprises:
Substrate;
Semiconductor layer, is formed on a surface of substrate; And
Antireflection element, be formed in substrate another on the surface,
Wherein, antireflection element comprises nano-pattern.
2. light-emitting diode as claimed in claim 1, wherein, antireflection element comprises:
Matrix is adjacent with substrate; And
Be formed in the nano-pattern on matrix,
Wherein, nano-pattern comprises post and is formed in the hole between post.
3. light-emitting diode as claimed in claim 2, wherein, the refractive index of matrix is more than or equal to the refractive index of substrate.
4. light-emitting diode as claimed in claim 1, wherein, the refractive index of nano-pattern is between the refractive index and the refractive index of air of substrate.
5. light-emitting diode as claimed in claim 2, wherein, the region between post or between hole has nano level width, and described width is less than the wavelength of the light produced in active layer.
6. light-emitting diode as claimed in claim 2, wherein, the width of post reduces gradually away from matrix.
7. light-emitting diode as claimed in claim 6, wherein, the refractive index of nano-pattern reduces gradually away from matrix.
8. light-emitting diode as claimed in claim 1, wherein, nano-pattern is greater than the silicon nitride of the refractive index of substrate by refractive index or silicon oxynitride is formed.
9. light-emitting diode as claimed in claim 1, wherein, light-emitting diode is chip upside-down mounting type light-emitting diode.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR20130108326A KR20150029315A (en) | 2013-09-10 | 2013-09-10 | Light emitting diode and method of fabricating the same |
| KR10-2013-0108326 | 2013-09-10 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204167349U true CN204167349U (en) | 2015-02-18 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420517945.6U Expired - Fee Related CN204167349U (en) | 2013-09-10 | 2014-09-10 | Light-emitting diode |
Country Status (2)
| Country | Link |
|---|---|
| KR (1) | KR20150029315A (en) |
| CN (1) | CN204167349U (en) |
-
2013
- 2013-09-10 KR KR20130108326A patent/KR20150029315A/en not_active Application Discontinuation
-
2014
- 2014-09-10 CN CN201420517945.6U patent/CN204167349U/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| KR20150029315A (en) | 2015-03-18 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150218 |