CN204045615U

CN204045615U - A kind of sapphire silicon on insulator substrate

Info

Publication number: CN204045615U
Application number: CN201420374396.1U
Authority: CN
Inventors: 王晓靁; 刘伯彦; 钟其龙
Original assignee: XIAMEN CRYSTAL EMBELLISH PHOTOELECTRIC Co Ltd
Current assignee: XIAMEN CRYSTAL EMBELLISH PHOTOELECTRIC Co Ltd
Priority date: 2014-07-08
Filing date: 2014-07-08
Publication date: 2014-12-24
Anticipated expiration: 2024-07-08

Abstract

The utility model discloses a kind of sapphire silicon on insulator substrate, and be a kind of silicon-on-sapphire-silicon substrate, namely top layer is silicon active layers, and intermediate layer is sapphire thin layer, and bottom is silicon substrate.Preparation method's step is as follows: the first step, adopts substrate cutting technique evenly to be cut by polishing sapphire thin layer; Second step, heat-treats bond by the sapphire thin layer cut and silicon substrate; 3rd step, completes the silicon active layers of top layer.The utility model decreases sapphire consumption, improves utilance, thus reduces overall production cost, but still possesses SOS excellent specific property.Adopt silicon more to have following advantage when being used as substrate body: (1) with existing take silicon substrate as the IC Processes and apparatus high integration of main flow, effectively promote prouctiveness; (2) will affect component design and usefulness as high frequency assembly substrate heat-sinking capability, because the hot transfer efficiency of silicon is significantly better than sapphire, silicon will effectively improve assembly radiating usefulness as substrate body.

Description

A kind of sapphire silicon on insulator substrate

Technical field

The utility model relates to a kind of sapphire silicon on insulator substrate.

Background technology

SOS (Silicon-on-sapphire, sapphire covers silicon) substrate is mainly as the substrate purposes of high frequency assembly RFIC, compared to other backing materials, the assembly finished product that SOS makes has the comprehensive advantages such as the high and size of components of low energy consumption, component efficiency is little, has the competitive advantage that it is very important.

Commercial SOS substrate 100 as shown in Figure 1, polishing Sapphire Substrate 110 makes silicon epitaxy layer 120, be the another kind of SOS substrate 200 both having deposited technique more as shown in Figure 2, the silicon substrate thin layer 220 that bond cuts with special cutting technique in polishing Sapphire Substrate 210 forms SOS structure.

SOS substrate supply of material system is in the market so that the Sapphire Substrate of 6 English inch and 8 English inch to make silicon epitaxy layer, the Sapphire Substrate cost of such size is very high, add silicon epitaxy layer technique and need very fine and smooth control, also make overall SOS cost and productive rate limited.

Utility model content

The purpose of this utility model is to provide a kind of sapphire silicon on insulator substrate, to reduce sapphire consumption, increases operation rate, and reduces overall production cost, but still possesses SOS excellent specific property.

In order to reach above-mentioned purpose, solution of the present utility model is:

A kind of sapphire silicon on insulator substrate, be a kind of New Si-on-sapphire-on-Si (silicon-on-sapphire-silicon) substrate, namely top layer is silicon active layers, and intermediate layer is sapphire thin layer, and bottom is silicon substrate.

The thickness of described silicon active layers is 100nm, and the thickness of sapphire thin layer is 150nm, and the thickness of silicon substrate is 1mm.

The thickness of described silicon active layers is 1500nm, and the thickness of sapphire thin layer is 1500nm, and the thickness of silicon substrate is 1mm.

After adopting such scheme, the utility model decreases sapphire consumption, improves utilance, thus reduces overall production cost, but still possesses SOS excellent specific property.Adopt silicon more to have following advantage when being used as substrate body: (1) with existing take silicon substrate as the IC Processes and apparatus high integration of main flow, effectively promote prouctiveness; (2) will affect component design and usefulness as high frequency assembly substrate heat-sinking capability, because the hot transfer efficiency of silicon is significantly better than sapphire, silicon will effectively improve assembly radiating usefulness as substrate body.

Below in conjunction with drawings and the specific embodiments, the utility model is described in further detail.

Accompanying drawing explanation

Fig. 1 is a kind of structural representation of existing SOS substrate;

Fig. 2 is the structural representation of another kind of existing SOS substrate;

Fig. 3 is structural representation of the present utility model.

Embodiment

As shown in Figure 3, a kind of sapphire silicon on insulator substrate that the utility model discloses, be a kind of novel silicon-on-sapphire-silicon substrate, namely top layer is silicon active layers 1(silicon thin layer), intermediate layer is sapphire thin layer 2(sapphire insulating barrier), bottom is silicon substrate 3(substrate main carriers).

Wherein, the silicon active layers 1(monocrystalline silicon layer of top layer) be active layers as follow-up making semiconductor subassembly, thickness can control on demand, and technically all can support from being less than 100nm to thousands of nm, different thickness is applicable to different semiconductor device fabrication.Middle sapphire thin layer 2 is dielectric layers, is also called insulating barrier, and intelligence cuts/and supported being of uniform thickness of bond techniques is from being less than 100nm to thousands of more than nm, from the thickness of about 1500nm, just can play very excellent SOI performance.Silicon substrate 3 is to provide mechanical strength, and thickness is about 1mm ± hundreds of um.

When the utility model applies to high frequency assembly, the optimum thickness of silicon active layers 1 is 100nm, and the optimum thickness of sapphire thin layer 2 is 150nm, and the optimum thickness of silicon substrate is 1mm.

When the utility model applies to (PCC) power, the optimum thickness of silicon active layers 1 is 1500nm, and the optimum thickness of sapphire thin layer 2 is 1500nm, and the optimum thickness of silicon substrate is 1mm.

The utility model further discloses a kind of preparation method of sapphire silicon on insulator substrate, and concrete steps are as follows.

The first step, adopts substrate cutting technique evenly to be cut by polishing sapphire thin layer 2.Concrete employing smart-cut smart cut technique (both depositing commercial technology for), selects suitable ion (as H hydrogen) to carry out high dose ion implantation, estimates the thickness cut, after heat treatment slice separation with implantation energy hole.

Second step, heat-treats bond by the sapphire thin layer 2 and the silicon substrate 3 that cut.

3rd step, completes the silicon active layers 1 of sapphire thin layer 2 top layer.Specifically can carry out the extension of silicon by existing commercial process, form silicon active layers 1.Or, cut silicon thin layer at polished silicon substrate 3, then by the top layer of this silicon thin layer heat treatment bond at sapphire thin layer 2, form silicon active layers 1, also current heat treatment bond program and second step sequentially can be processed in the same apparatus, to reduce thermal cycle raising efficiency.

The utility model can have the auxiliary process of surface front cleaning, front coating layer, front processing etc. further to strengthen silicon and sapphire bond.Wherein, front cleaning is that (nineteen sixty-five is pioneering in the RCA laboratory of N.J.Princeton by people such as Kern and Puotinen for the RCA standard cleaning method using semiconductor to commonly use; and gain the name therefrom; RCA is a kind of wet chemical cleans method typically, so far still for the most generally using), remove surface particles or residuals.Front coating is that parameter suitably controls down the bond contributing to sapphire and monocrystalline silicon at sapphire surface vapor phase method thermal cracking SiH4 evaporation tens nanometer silicon layer.Front processing is that surface chemical mechanical polishing carries out polishing.

Under the prerequisite not affecting high frequency assembly performance, the sapphire amount that the utility model consumes can be reduced to below one of percentage.

Above-described embodiment and graphic and non-limiting product form of the present utility model and style, any person of an ordinary skill in the technical field, to its suitable change done or modification, all should be considered as not departing from patent category of the present utility model.

Claims

1. a sapphire silicon on insulator substrate, is characterized in that: be a kind of silicon-on-sapphire-silicon substrate, namely top layer is silicon active layers, and intermediate layer is sapphire thin layer, and bottom is silicon substrate.

2. a kind of sapphire silicon on insulator substrate as claimed in claim 1, is characterized in that: the thickness of silicon active layers is 100nm, and the thickness of sapphire thin layer is 150nm, and the thickness of silicon substrate is 1mm.

3. a kind of sapphire silicon on insulator substrate as claimed in claim 1, is characterized in that: the thickness of silicon active layers is 1500nm, and the thickness of sapphire thin layer is 1500nm, and the thickness of silicon substrate is 1mm.