CN203965471U - Testing apparatus and communication device thereof - Google Patents
Testing apparatus and communication device thereof Download PDFInfo
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- CN203965471U CN203965471U CN201420247462.9U CN201420247462U CN203965471U CN 203965471 U CN203965471 U CN 203965471U CN 201420247462 U CN201420247462 U CN 201420247462U CN 203965471 U CN203965471 U CN 203965471U
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Abstract
A kind of testing apparatus and communication device thereof, one end of communication device is connected with tester by host computer, the other end is connected with the probe station or the mechanical arm that couple chip to be detected, realize the mutual communication between described host computer and described probe station or mechanical arm, comprise: interface testing circuit, is connected with described probe station or mechanical arm; Drive intensifier circuit, be connected with described interface testing circuit; Optical coupling isolation circuit, is connected with described driving intensifier circuit; Level shifting circuit, is connected with described optical coupling isolation circuit; Signal processing chip, is connected with described level shifting circuit, has multiple I/O mouths, receives described test interactive signal, is connected with mutual described test interactive signal by a serial ports transmission circuit with described host computer.Can carry out very easily many SIZE connecting test by this device, solve the problem of tester self communication interface deficiency, thereby the service efficiency of tester is improved, improve the quantity of unit interval build-in test, cost-saving.
Description
Technical field
The utility model relates to product test technology, particularly relates to a kind of testing apparatus and communication device thereof.
Background technology
In the actual production use procedure of wafer prober, need to carry out single unit (SIZE) or multiple-unit communication with probe station or mechanical arm and be connected the test that just can complete chip and produce.
It is all directly connect or use transfer computer to transfer that traditional communication connects, this method of attachment comes with some shortcomings: 1. less but while needing test cell number more in chip testing project, tester carries interface deficiency, need to increase testing apparatus and realize, and causes wasting tester resource.2. test communication need to be used transfer computer, increases testing cost.Different model tester and different platform interface differ to, often can not be able to not directly connect.
Utility model content
Based on this, be necessary to provide the one can list or multiple-unit connecting test, the communication device of the testing apparatus that interface compatibility is good.
A communication device for testing apparatus, one end is connected with tester by host computer, and the other end is connected with the probe station or the mechanical arm that couple chip to be detected, realizes the mutual communication between described host computer and described probe station or mechanical arm, comprising:
Interface testing circuit, is connected with described probe station or mechanical arm, receives test interactive signal, detects the unit number of access and determines it is serial or parallel communication;
Drive intensifier circuit, be connected with described interface testing circuit, strengthen the driving force of described test interactive signal;
Optical coupling isolation circuit, is connected with described driving intensifier circuit, and described test interactive signal is carried out to signal isolation;
Level shifting circuit, is connected with described optical coupling isolation circuit, and described test interactive signal is carried out to level conversion;
Signal processing chip, is connected with described level shifting circuit, has multiple I/O mouths, receives described test interactive signal, is connected with mutual described test interactive signal by a serial ports transmission circuit with described host computer.
Further, described signal processing chip is CPLD.
Further, the model of described complex programmable logic chip is EPM1270T144C5.
Further, described serial ports transmission circuit comprises MAX3232 transceiver, the first electric capacity, the second electric capacity, the 3rd electric capacity and the 4th electric capacity, wherein:
The two ends of described the first electric capacity are connected with C1+ end and the C1-end of described MAX3232 transceiver respectively;
The two ends of described the second electric capacity are connected with C2+ end and the C2-end of described MAX3232 transceiver respectively;
The two ends of described the 3rd electric capacity are connected with V+ end and the GND end of described MAX3232 transceiver respectively;
The two ends of described the 4th electric capacity are connected with V-end and the GND end of described MAX3232 transceiver respectively.
Further, described level shifting circuit is chip 74LVS4245.
Further, described optical coupling isolation circuit is chip TLP281-4.
Further, described driving intensifier circuit is Darlington transistor ULN2803.
Further, described interface testing circuit comprises the first resistance, the second resistance, the first termination 5V power supply of described the first resistance, the second end detects the unit number of access and determines it is serial or parallel communication as detection port, the first end of described the second resistance is connected with the second end of described the first resistance, the second end ground connection.
In addition, also provide a kind of testing apparatus, comprised the communication device of above-mentioned testing apparatus.
This device has been realized the transition of communications function of list/many SIZE tester serial ports and probe station or mechanical arm interface testing circuit, can carry out very easily many SIZE connecting test by this device, at actual chips test process, solve the problem of tester self communication interface deficiency, making to survey SIZE number is improved, thereby the service efficiency of tester is further enhanced, improves the quantity of unit interval build-in test, cost-saving.
Brief description of the drawings
Fig. 1 is the module diagram of the communication device of testing apparatus in the utility model preferred embodiment;
Fig. 2 is the I/O part schematic diagram of signal processing chip shown in Fig. 1;
Fig. 3 be signal processing chip shown in Fig. 1 power supply, with configuration section schematic diagram;
Fig. 4 is the circuit theory diagrams that drive intensifier circuit, optical coupling isolation circuit, level shifting circuit shown in Fig. 1;
Fig. 5 is the circuit theory diagrams of serial ports transmission circuit shown in Fig. 1;
Fig. 6 is two circuit theory diagrams of interface testing circuit shown in Fig. 1;
Note: in Fig. 2 to Fig. 6, the pin of same numeral (port) joins.
Embodiment
In order to make the technical problems to be solved in the utility model, technical scheme and beneficial effect clearer, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein is only in order to explain the utility model, and be not used in restriction the utility model.
Refer to Fig. 1, in the utility model preferred embodiment, one end of the communication device 100 of testing apparatus is connected with tester 300 by host computer 200, the other end is connected with the probe station or the mechanical arm 400 that couple chip to be detected, realize the mutual communication between described host computer 200 and described probe station or mechanical arm 400, the communication device 100 of testing apparatus comprises: signal processing chip 101, level shifting circuit 102, optical coupling isolation circuit 103, driving intensifier circuit 104, interface testing circuit 105 and serial ports transmission circuit 106.
Interface testing circuit 105 is connected with probe station or mechanical arm 400, for receiving test interactive signal, and detects the unit number of access and determines it is serial or parallel communication; Drive intensifier circuit 104 to be connected with interface testing circuit 105, for strengthening the driving force of test interactive signal; Optical coupling isolation circuit 103 is connected with driving intensifier circuit 104, for test interactive signal is carried out to signal isolation; Level shifting circuit 102 is connected with optical coupling isolation circuit 103, for test interactive signal is carried out to level conversion; Signal processing chip 101 is connected with level shifting circuit 102, has multiple I/O mouths, after reception test interactive signal, is connected with interactive testing interactive signal with host computer 200 by serial ports transmission circuit 106.
Referring to figs. 2 and 3, signal processing chip 101 is CPLD.Preferably, model is EPM1270T144C5.EPM1270T144C5 is a kind of CPLD that altera corp produces, it has flexible in programming, integrated level is high, the cycle of designing and developing is short, the scope of application is wide, developing instrument is advanced, design and manufacture cost is low, require low, standardized product without features such as test, strong security, price are popular to deviser's hardware experience, can realize fairly large circuit design.
EPM1270T144C5 has and exceedes more than 1,000 logical block, carries FLASH memory program.Available schematic diagram and, the method such as hardware description language designs, and more effectively improves design efficiency, allows the design cycle greatly shorten.Nearly 116, self I/O mouth, meets the I/O demand of current test cell number completely, brings great convenience for later Function Extension simultaneously.
With reference to figure 4, level shifting circuit 102 is realized with chip 74LVS4245, uses 74LVS4245 to realize the conversion of 5V and 3.3 level.Optical coupling isolation circuit 103 is realized with chip TLP281-4.Drive intensifier circuit 104 to realize with Darlington transistor ULN2803.Darlington transistor ULN2803 strengthens its driving force and the signal through optical coupling isolation circuit 103 is carried out oppositely, making final signal consistent.Darlington transistor ULN2803 front end is drop-down with pull down resistor PR8 input, makes its default value consistent with probe station or mechanical arm acquiescence level.
With reference to figure 5, TTL interface (Transistor-Transistor Logic, transistor-transistor logic integrated circuit) interface testing circuit 105 comprise the first resistance R 13, the second resistance R 14, the first termination 5V power supply of the first resistance R 13, the second end detects the unit number of access and determines it is serial or parallel communication as detection port TEST1, the first end of the second resistance R 14 is connected with the second end of the first resistance R 13, the second end ground connection.The interface testing circuit 105 of each TTL interface all carries 5V voltage, and just can detect interface access number by simple bleeder circuit is serial or parallel communications from judgement.
With reference to figure 6, serial ports transmission circuit 106 comprises MAX3232 transceiver, the first capacitor C 16, the second capacitor C 17, the 3rd capacitor C 18 and the 4th capacitor C 19, wherein: the two ends of the first capacitor C 16 are connected with C1+ end and the C1-end of MAX3232 transceiver respectively; The two ends of the second capacitor C 17 are connected with C2+ end and the C2-end of MAX3232 transceiver respectively; The two ends of the 3rd capacitor C 18 are connected with V+ end and the GND end of MAX3232 transceiver respectively; The two ends of the 4th capacitor C 19 are connected with V-end and the GND end of MAX3232 transceiver respectively.MAX3232 transceiver adopts proprietary low voltage difference transmitter output stage, utilizes dual charge pump can realize real RS-232 performance in the time of 3.0V to 5.5V Power supply.MAX3232 transceiver only needs the outside small size electric capacity of four 0.1 μ F.Can guarantee under 120kbps data rate, to maintain RS-232 output level, use it to realize communicating by letter of the serial ports P1 of host computer 200 and the communication device 100 of testing apparatus.
The communication device 100 workflow explanations of testing apparatus:
1, the number of connection that system initialization starts to detect interface testing circuit 105 after completing is determined the sending mode of serial paralled interface.
2, detect START signal, after START signal being detected, if do not receive next START signal in the delay time of setting, finish START input and enter next step.
3, send to upper (PC) machine the start signal and the coordinate that design by serial ports.
4, detect the serial data that PC sends, if the data that receive correctly enter next step otherwise report an error, get back to the 1st step and restart.
5, will receive result in conjunction with the interface quantity START signal number of times that detects sends end by TTL interface and once tests.
The function that the communication device 100 of this testing apparatus has been realized:
1, single SIZE tester 300 is communicated by letter with probe station or mechanical arm 400.
2, parallel two SIZE tester 300 is communicated by letter with probe station or mechanical arm 400.
3, the two SIZE testers 300 of serial are communicated by letter with probe station or mechanical arm 400.
The automatic detection of 4, going here and there and communicating by letter when two SIZE.
This device has been realized the transition of communications function of list/many SIZE tester 300 serial ports and probe station or mechanical arm 400 interface testing circuits 105, can carry out very easily many SIZE connecting test by this device, at actual chips test process, solve the problem of tester 300 self communication interface deficiency, making to survey SIZE number is improved, thereby the service efficiency of tester 300 is further enhanced, improves the quantity of unit interval build-in test, cost-saving.
In addition, also provide a kind of testing apparatus, comprised the communication device 100 of above-mentioned testing apparatus.
The above embodiment has only expressed several embodiment of the present utility model; not in order to limit the utility model; all any amendments of doing within spirit of the present utility model and principle, be equal to and replace and improvement etc., within all should being included in protection domain of the present utility model.
Claims (9)
1. the communication device of a testing apparatus, one end is connected with tester by host computer, and the other end is connected with the probe station or the mechanical arm that couple chip to be detected, realizes the mutual communication between described host computer and described probe station or mechanical arm, it is characterized in that, comprising:
Interface testing circuit, is connected with described probe station or mechanical arm, receives test interactive signal, detects the unit number of access and determines it is serial or parallel communication;
Drive intensifier circuit, be connected with described interface testing circuit, strengthen the driving force of described test interactive signal;
Optical coupling isolation circuit, is connected with described driving intensifier circuit, and described test interactive signal is carried out to signal isolation;
Level shifting circuit, is connected with described optical coupling isolation circuit, and described test interactive signal is carried out to level conversion;
Signal processing chip, is connected with described level shifting circuit, has multiple I/O mouths, receives described test interactive signal, is connected with mutual described test interactive signal by a serial ports transmission circuit with described host computer.
2. the communication device of testing apparatus according to claim 1, is characterized in that, described signal processing chip is CPLD.
3. the communication device of testing apparatus according to claim 2, is characterized in that, the model of described complex programmable logic chip is EPM1270T144C5.
4. according to the communication device of the testing apparatus described in claim 1,2 or 3, it is characterized in that, described serial ports transmission circuit comprises MAX3232 transceiver, the first electric capacity, the second electric capacity, the 3rd electric capacity and the 4th electric capacity, wherein:
The two ends of described the first electric capacity are connected with C1+ end and the C1-end of described MAX3232 transceiver respectively;
The two ends of described the second electric capacity are connected with C2+ end and the C2-end of described MAX3232 transceiver respectively;
The two ends of described the 3rd electric capacity are connected with V+ end and the GND end of described MAX3232 transceiver respectively;
The two ends of described the 4th electric capacity are connected with V-end and the GND end of described MAX3232 transceiver respectively.
5. according to the communication device of the testing apparatus described in claim 1,2 or 3, it is characterized in that, described level shifting circuit is chip 74LVS4245.
6. the communication device of testing apparatus according to claim 5, is characterized in that, described optical coupling isolation circuit is chip TLP281-4.
7. the communication device of testing apparatus according to claim 6, is characterized in that, described driving intensifier circuit is Darlington transistor ULN2803.
8. the communication device of testing apparatus according to claim 7, it is characterized in that, described interface testing circuit comprises the first resistance, the second resistance, the first termination 5V power supply of described the first resistance, the second end detects the unit number of access and determines it is serial or parallel communication as detection port, the first end of described the second resistance is connected with the second end of described the first resistance, the second end ground connection.
9. a testing apparatus, is characterized in that, comprises the communication device of the testing apparatus described in claim 1 to 8 any one.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420247462.9U CN203965471U (en) | 2014-05-14 | 2014-05-14 | Testing apparatus and communication device thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420247462.9U CN203965471U (en) | 2014-05-14 | 2014-05-14 | Testing apparatus and communication device thereof |
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| CN203965471U true CN203965471U (en) | 2014-11-26 |
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| CN201420247462.9U Expired - Fee Related CN203965471U (en) | 2014-05-14 | 2014-05-14 | Testing apparatus and communication device thereof |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105467256A (en) * | 2015-05-14 | 2016-04-06 | 华润赛美科微电子(深圳)有限公司 | Chip testing and sorting method |
| CN113419160A (en) * | 2021-06-18 | 2021-09-21 | 珠海美佳音科技有限公司 | Chip detection interface circuit |
-
2014
- 2014-05-14 CN CN201420247462.9U patent/CN203965471U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105467256A (en) * | 2015-05-14 | 2016-04-06 | 华润赛美科微电子(深圳)有限公司 | Chip testing and sorting method |
| CN113419160A (en) * | 2021-06-18 | 2021-09-21 | 珠海美佳音科技有限公司 | Chip detection interface circuit |
| CN113419160B (en) * | 2021-06-18 | 2023-09-29 | 珠海美佳音科技有限公司 | Chip detection interface circuit |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20190315 Address after: 518000 1st, 5th and 6th floors of No. 1 workshop, No. 28 Qingfeng Avenue, Baolong Street, Longgang District, Shenzhen City, Guangdong Province Patentee after: Shenzhen Mifeitake Technology Co.,Ltd. Address before: 518000 Sanlian and Shengsheng Industrial Zone, Buji Town, Longgang District, Shenzhen City, Guangdong Province Patentee before: SHENZHEN ABLE ELECTRONICS Co.,Ltd. |
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| CP01 | Change in the name or title of a patent holder | ||
| CP01 | Change in the name or title of a patent holder |
Address after: 518000 1st, 5th and 6th floors of No. 1 workshop, No. 28 Qingfeng Avenue, Baolong Street, Longgang District, Shenzhen City, Guangdong Province Patentee after: Shenzhen mifitech Technology Co.,Ltd. Address before: 518000 1st, 5th and 6th floors of No. 1 workshop, No. 28 Qingfeng Avenue, Baolong Street, Longgang District, Shenzhen City, Guangdong Province Patentee before: Shenzhen Mifeitake Technology Co.,Ltd. |
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| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20141126 |