CN201780572U - Debugging circuit board - Google Patents
Debugging circuit board Download PDFInfo
- Publication number
- CN201780572U CN201780572U CN2010202808072U CN201020280807U CN201780572U CN 201780572 U CN201780572 U CN 201780572U CN 2010202808072 U CN2010202808072 U CN 2010202808072U CN 201020280807 U CN201020280807 U CN 201020280807U CN 201780572 U CN201780572 U CN 201780572U
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- connector
- jtag
- uart
- usb
- circuit plate
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Abstract
A debugging circuit board comprises a first connector for being connected with a debugged device, two UART ports connected with the first connector, a level conversion chip for converting signal level of the UART ports, a USB-UART conversion chip for connecting the level conversion chip with a USB connector, the USB connector for being connected with a PC, and a JTAG connector connected with the first connector. Compared with the prior art, the debugging circuit board has the advantage that the debugging circuit board provided by an embodiment comprises the UART ports and the JTAG ports, can carry out UART debugging and JTAG debugging, and is more convenient in use.
Description
Technical field
The utility model relates to a kind of circuit board, relates in particular to a kind of circuit board with debug function.
Background technology
In the mobile phone development process, need to carry out debugging work by various interface, only the circuit board by fly line or single debug function can not satisfy the debugging work load that increases day by day, so need exploitation to possess the circuit board of multiple debug function.UART (Universal Asynchronous Receiver/Transmitter, UART Universal Asynchronous Receiver Transmitter) is used for communicating with PC (Personal Computer, personal computer), the duty of monitoring debugger and other device; Basic UART communication only needs two signal line (RXD and TXD), and reception is the full duplex form with transmission, and wherein TXD is the transmitting terminal of UART, and RXD is the receiving end of UART; This serial communication has that transmission line is few, cost is low, the reliability advantages of higher.
JTAG (Joint Test Action Group, combined testing action group) is a kind of international standard test protocol, is mainly used in the debugging of chip internal.Most now high-grade device are all supported the JTAG agreement, as DSP, FPGA device etc.The jtag interface of standard is 4 lines: TMS, TCK, TDI, TDO, is respectively model selection, clock, data input and DOL Data Output Line.JTAG is used for chip is tested at first, and ultimate principle is to test carrying out internal node by the jtag test instrument of special use at a device inside TAP of definition (Test Access Port, test access mouth).Jtag test allows a plurality of devices to be cascaded by jtag interface, forms a JTAG chain, can realize each device is tested respectively.Now, jtag interface also is usually used in realizing ISP (In-System programmable, online programming), and devices such as FLASH are programmed.
Present existing debugging plate only has UART or only has a kind of debug function of jtag interface, can not satisfy the debug function that increases day by day at present.
The utility model content
The technical matters that the utility model solves is the problem that the debug circuit plate of prior art only has a kind of debug function.
For solving the problems of the technologies described above, the utility model provides following technical scheme:
A kind of debug circuit plate that the utility model relates to comprises: be used for first connector that is connected with debugged device; Two UART ports that connect first connector, and the level transferring chip of conversion UART port signal level; The USB-UART conversion chip that connects level transferring chip and USB connector; Be used for the USB connector that is connected with PC; The JTAG connector that is connected with first connector.
Further, also comprise with USB interface being connected, and the power supply chip of corresponding power supply to USB-UART conversion chip and level transferring chip is provided.
Preferably, first connector is the connector with 16 ports.
Preferably, the JTAG connector is the connector with 20 ports.
Further, also comprise the JTAG debugger, described JTAG debugger connects PC and JTAG connector.
Preferably, the JTAG debugger is the Trace32 debugger.
Compared with prior art the utlity model has following beneficial effect: a kind of debug circuit plate that the utility model embodiment provides, include two kinds of interfaces of UART and JTAG, both can carry out the UART debugging, also can carry out the JTAG debugging, use convenient.
Description of drawings
Fig. 1 is the schematic diagram of the utility model debug circuit plate first embodiment;
Fig. 2 is the schematic diagram of the utility model debug circuit plate second embodiment.
Embodiment
Clearer for technical matters, technical scheme and beneficial effect that the utility model is solved, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein only in order to explanation the utility model, and be not used in qualification the utility model.
Fig. 1 is the schematic diagram of the utility model debug circuit plate first embodiment;
A kind of debug circuit plate comprises: first connector 11 that is used for being connected with debugged device; Two UART ports that connect first connector, and the level transferring chip 12 of conversion UART port signal level; The USB-UART conversion chip 13 that connects level transferring chip and USB connector; Be used for the USB connector 14 that is connected with PC; The JTAG connector 15 that is connected with first connector.
USB-UART conversion chip 13 can make signal change between USB standard and UART standard.Because the signal level of first connector generally is 2.6V, and the level of USB-UART conversion chip 13 signals is 3.3V, need then need level transferring chip 12 to finish this function the level conversion of 2.6V level when using as 3.3V.Like this first connector 11 is connected with debugged device, signal level 2.6V is converted to the level 3.3V that needs by level transferring chip 12, process USB-UART conversion chip 13 becomes the USB standard with the UART standard handovers of signal again, be connected with PC through USB connector again, and then finish the UART debugging.
A kind of debug circuit plate that the utility model embodiment provides includes two kinds of interfaces of UART and JTAG, both can carry out the UART debugging, also can carry out the JTAG debugging, uses convenient.
Fig. 2 is the schematic diagram of the utility model debug circuit plate second embodiment; On the basis of Fig. 1, also comprise being connected, and the power supply chip 10 of corresponding power supply to USB-UART conversion chip 13 and level transferring chip 12 is provided with USB interface.This power supply chip utilizes the power supply of USB interface, generally is 5V, and this 5V power source conversion is supplied with USB-UART conversion chip 13 and level transferring chip 12 for the 3.3V power supply; Make USB-UART conversion chip 13 and level transferring chip 12 be in normal operating conditions;
Further, the signal in first connector 11 comprises WDT WDG; When communicating the terminal debugging, should make watchdog circuit be in an idle state.Can require to be provided with the duty of watchdog circuit according to the debugging of each platform; WDT WDG connects power supply or ground, just can make watchdog circuit be in off position.
Preferably, first connector 11 is the connectors with 16 ports; JTAG connector 15 is the connectors with 20 ports.
Further, also comprise the JTAG debugger, the JTAG debugger connects PC and JTAG connector, and the JTAG debugger is the Trace32 debugger.First connector 11 is connected with communication terminal by FPC, and the debug circuit plate links to each other with the Trace32 emulator by JTAG connector 15, and the Trace32 emulator links to each other with PC by USB again; The data-signal of debugged device is converted to differential signal by the Trace32 emulator and communicates by USB and computer, thereby finishes the JTAG debugging.
The above only is preferred embodiment of the present utility model; not in order to restriction the utility model; all any modifications of within spirit of the present utility model and principle, being done, be equal to and replace and improvement etc., all should be included within the protection domain of the present utility model.
Claims (6)
1. a debug circuit plate is characterized in that, comprising:
Be used for first connector that is connected with debugged device;
Two UART ports that connect first connector, and the level transferring chip of conversion UART port signal level;
The USB-UART conversion chip that connects level transferring chip and USB connector;
Be used for the USB connector that is connected with PC;
The JTAG connector that is connected with first connector.
2. a kind of debug circuit plate according to claim 1 is characterized in that, also comprises with USB interface being connected, and the power supply chip of corresponding power supply to USB-UART conversion chip and level transferring chip is provided.
3. a kind of debug circuit plate according to claim 1 is characterized in that described first connector is the connector with 16 ports.
4. a kind of debug circuit plate according to claim 1 is characterized in that, described JTAG connector is to have 20 port connectors.
5. a kind of debug circuit plate according to claim 1 is characterized in that, also comprises the JTAG debugger, and described JTAG debugger connects PC and JTAG connector.
6. a kind of debug circuit plate according to claim 5 is characterized in that described JTAG debugger is the Trace32 debugger.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010202808072U CN201780572U (en) | 2010-07-29 | 2010-07-29 | Debugging circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010202808072U CN201780572U (en) | 2010-07-29 | 2010-07-29 | Debugging circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201780572U true CN201780572U (en) | 2011-03-30 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010202808072U Expired - Fee Related CN201780572U (en) | 2010-07-29 | 2010-07-29 | Debugging circuit board |
Country Status (1)
| Country | Link |
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| CN (1) | CN201780572U (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102819232A (en) * | 2012-07-12 | 2012-12-12 | 中国人民解放军空军第一航空学院 | Portable monitoring and debugging system of flight control computer |
| CN103136138A (en) * | 2011-11-24 | 2013-06-05 | 炬力集成电路设计有限公司 | Chip, chip debugging method and communication method for chip and external devices |
| CN103365753A (en) * | 2012-04-02 | 2013-10-23 | 仁宝电脑工业股份有限公司 | Debugging device and method for performing debugging process to target system |
| CN105701011A (en) * | 2015-12-31 | 2016-06-22 | 上海盈方微电子有限公司 | Debugging method, electronic product applying debugging method and debugging card |
| CN105893163A (en) * | 2015-01-26 | 2016-08-24 | 国基电子（上海）有限公司 | Debugging circuit, debugging request circuit and debugging system |
| CN109614333A (en) * | 2018-12-07 | 2019-04-12 | 英业达科技有限公司 | Debugging interface device and server with the device |
-
2010
- 2010-07-29 CN CN2010202808072U patent/CN201780572U/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103136138A (en) * | 2011-11-24 | 2013-06-05 | 炬力集成电路设计有限公司 | Chip, chip debugging method and communication method for chip and external devices |
| CN103136138B (en) * | 2011-11-24 | 2015-07-01 | 炬力集成电路设计有限公司 | Chip, chip debugging method and communication method for chip and external devices |
| CN103365753A (en) * | 2012-04-02 | 2013-10-23 | 仁宝电脑工业股份有限公司 | Debugging device and method for performing debugging process to target system |
| CN103365753B (en) * | 2012-04-02 | 2015-08-19 | 仁宝电脑工业股份有限公司 | For performing commissioning device and the method for debug process to goal systems |
| CN102819232A (en) * | 2012-07-12 | 2012-12-12 | 中国人民解放军空军第一航空学院 | Portable monitoring and debugging system of flight control computer |
| CN105893163A (en) * | 2015-01-26 | 2016-08-24 | 国基电子（上海）有限公司 | Debugging circuit, debugging request circuit and debugging system |
| CN105701011A (en) * | 2015-12-31 | 2016-06-22 | 上海盈方微电子有限公司 | Debugging method, electronic product applying debugging method and debugging card |
| CN109614333A (en) * | 2018-12-07 | 2019-04-12 | 英业达科技有限公司 | Debugging interface device and server with the device |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110330 Termination date: 20160729 |