CN203859110U - 双标记板堆叠式管芯封装件与半导体封装件 - Google Patents
双标记板堆叠式管芯封装件与半导体封装件 Download PDFInfo
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- CN203859110U CN203859110U CN201420084872.6U CN201420084872U CN203859110U CN 203859110 U CN203859110 U CN 203859110U CN 201420084872 U CN201420084872 U CN 201420084872U CN 203859110 U CN203859110 U CN 203859110U
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Abstract
本实用新型提供一种双标记板堆叠式管芯封装件。要解决的技术问题之一是提供具有更好性能、更小形状因子、更高级管脚输出布置以及具有改进的制造性和可靠性的集成电路封装。半导体封装件包括第一管芯标记板和第二管芯标记板。第一和第二金属氧化物半导体场效应晶体管MOSFET管芯分别处在所述第一管芯标记板和所述第二管芯标记板上。功率控制集成电路IC堆叠在所述第一MOSFET管芯或所述第二MOSFET管芯中的至少一个的顶部上。模制化合物封装所述功率控制IC、所述第一MOSFET管芯和所述第二MOSFET管芯以及所述第一管芯标记板和所述第二管芯标记板。取得的有益技术效果之一是取得了具有更好性能、更小形状因子、更高级管脚输出布置以及具有改进的制造性和可靠性的集成电路封装。本实用新型还提供半导体封装件。
Description
技术领域
本实用新型中公开的实施方案总体上涉及电子技术,并且更确切地涉及一种半导体部件和其制作方法。
背景技术
对于某些应用,需要将多个半导体集成电路(IC)、部件、芯片或管芯(die)封装在单个封装件中。例如,在电池保护电路应用中,功率控制IC和两个金属氧化物半导体场效应晶体管(MOSFET)被一起封装在引线框架封装件中。电池保护封装件的最佳性能通过使用可能的最大MOSFET尺寸最小化漏-源极导通电阻(Rds-on)来实现。然而,需要封装的IC的更小总尺寸来容纳不断缩小的电子装置。为了实现多个管芯在单个封装件中的更小的覆盖区,在可能的情况下使管芯彼此堆叠。
然而,管芯的彼此堆叠确实对封装件的制造和可靠性提出了挑战。此外,连同缩小电子装置的需求,还一直存在改进任何集成电路封装件的制造的需求。因此,需要开发具有改进的制造性和可靠性的堆叠式管芯封装件。
实用新型内容
本实用新型要解决的技术问题之一是提供具有更好性能、更小形状因子、更高级管脚输出布置以及具有改进的制造性和可靠性的集成电路封装。
本实用新型一方面提供一种半导体封装件,包括:第一管芯标记板和第二管芯标记板,其中所述第一管芯标记板与所述第二管芯标记板由间隙分开;第一和第二金属氧化物半导体场效应晶体管MOSFET管芯,其分别处在所述第一管芯标记板和所述第二管芯标记板上;功率控制集成电路IC,其堆叠在所述第一MOSFET管芯或所述第二MOSFET管芯中的至少一个的顶部上;模制化合物,其封装所述功率控制IC、所述第一MOSFET管芯和所述第二MOSFET管芯以及所述第一管芯标记板和所述第二管芯标记板。
根据一个实施例,所述第一管芯标记板与所述第二管芯标记板之间的所述间隙在100微米与300微米之间。
根据一个实施例,所述第一管芯标记板与所述第二管芯标记板之间的所述间隙小于200微米。
根据一个实施例,所述模制化合物被布置在所述间隙之间,从而改进所述半导体封装件的可靠性。
根据一个实施例,所述模制化合物具有小于所述间隙的一半宽度的平均填料尺寸。
根据一个实施例,所述模制化合物由具有球体形状的填充材料构成。
根据一个实施例,所述功率控制IC电耦合至第一引线和第二引线并且所述第一MOSFET管芯电耦合至第三引线并且所述第二MOSFET管芯电耦合至第四引线。
根据一个实施例,所述第一MOSFET管芯电耦合至第五引线并且所述第二MOSFET管芯电耦合至第六引线。
根据一个实施例,所述第一管芯标记板和所述第二管芯标记板是电耦合的。
根据一个实施例,所述功率IC电耦合至所述第一MOSFET的栅极以及所述第二MOSFET的栅极和源极。
本实用新型一方面提供一种双标记板堆叠式管芯封装件,其特征在于包括:第一和第二物理分开的管芯标记板,其中所述第一管芯标记板与所述第二管芯标记板由间隙分开;第一和第二金属氧化物半导体场效应晶体管MOSFET管芯,所述第一和第二金属氧化物半导体场效应晶体管管芯分别安装在所述第一管芯标记板和所述第二管芯标记板上并且电耦合至其所述第一管芯标记板和所述第二管芯标记板;功率控制集成电路IC,其通过非导电环氧树脂垂直地安装在所述第一MOSFET管芯或所述第二MOSFET管芯中的至少一个的顶部上;以及模制化合物,其封装所述功率控制IC、所述第一MOSFET管芯和所述第二MOSFET管芯、所述第一管芯标记板和所述第二管芯标记板并且被布置在所述间隙中。
根据一个实施例,所述第一管芯标记板与所述第二管芯标记板之间的所述间隙在100微米与300微米之间。
根据一个实施例,所述第一管芯标记板与所述第二管芯标记板之间的所述间隙小于200微米。
根据一个实施例,所述功率控制IC电耦合至第一引线和第二引线并且所述第一MOSFET管芯电耦合至第三引线和第四引线并且所述第二MOSFET管芯电耦合至第五引线和第六引线。
根据一个实施例,所述模制化合物由填充材料构成,所述填充材料具有小于所述间隙的一半宽度的平均尺寸。
根据一个实施例,所述模制化合物由具有球体形状的填充材料构成。
本实用新型一方面提供一种半导体封装件,包括:第一管芯标记板和第二管芯标记板,其中所述第一管芯标记板与所述第二管芯标记 板由间隙分开,其中所述间隙小于200微米;分别在所述第一管芯标记板和所述第二管芯标记板上的第一和第二金属氧化物半导体场效应晶体管MOSFET管芯;在所述第一MOSFET管芯或所述第二MOSFET管芯中的至少一个的顶部上的功率控制集成电路IC;覆盖所述功率控制IC、所述第一MOSFET管芯和所述第二MOSFET管芯以及所述第一管芯标记板和所述第二管芯标记板的封装层,其中所述封装层在所述间隙中并且包括具有小于100微米的平均尺寸的填充材料。
本实用新型可用于电子设备。本实用新型取得的有益技术效果之一是取得了具有更好性能、更小形状因子、更高级管脚输出布置以及具有改进的制造性和可靠性的集成电路封装。
附图说明
图1是根据本实用新型的一个实施方案的双标记板(dual flag)堆叠式管芯封装件的顶视图;
图2是沿图1的双标记板堆叠式管芯封装件的2-2部分的截面视图;并且
图3是根据本实用新型的另一个实施方案的双标记板堆叠式管芯封装件的顶视图。
出于简单清楚说明的目的,附图中的元件不必按比例绘制,并且不同附图中的相同参考编号一般指代相同的元件。此外,出于简单描述的目的,可能省略了熟知步骤和元件的描述和细节。
具体实施方式
本实用新型的实施方案提供了封装的集成电路,其具有更好的性能、更小的波形因数和优异的引脚输出布置并且具有改进的可制造性和可靠性。双标记板堆叠式管芯封装件可以用于电池保护IC应用中 以保护(例如)锂离子或锂聚合物电池单元。在本实用新型的一个实施方案中,功率控制IC堆叠在两个分开的标记板或管芯焊盘上的两个分开的MOSFET管芯的顶部上。两个标记板或管芯焊盘比单个大标记板更易于板装。过去在将两个MOSFET整合到单个管芯上时所使用的单个大标记板或管芯焊盘的板装要困难得多。这归因于以下事实:在将封装件安装到电路板上时,电子部件具有单个大标记板,标记板的大覆盖区使电子部件以不受控的方式移动或浮动。板装时的这种移动使得难以控制封装件引脚连接与电路板焊料的对准。因此,过去的封装件在制造最终产品中引起了更多的困难。此外,过去所使用的单个大管芯标记板产生了模流问题。模流问题会带来封装件的可靠性问题。如下文将阐述,本实用新型通过以下操作来解决过去的这些可制造性和可靠性问题:将两个MOSFET管芯分别提供在它们各自的管芯标记板上,其中每个管芯标记板之间存在间隙。
图1显示了根据本实用新型的第一实施方案的双标记板堆叠式管芯封装件100的顶视图。在一个实施方案中,封装件100是电池保护IC封装件并且包括其中形成了MOSFET的两个分开的管芯306和308,所述管芯306和308分别放置在分开的管芯标记板或焊盘300和301上或附接至其,其中管芯标记板301与300之间存在间隙200。在一个实施方案中,两个MOSFET管芯306和308具有相等的尺寸。如图1中所示,两个MOSFET管芯306和308各自均被制作在物理上分开的半导体芯片上,所述两个MOSFET管芯306和308可以具有尺寸大致相同的源极218和220以及尺寸大致相同的栅极214和212并且被附接到管芯标记板301和管芯标记板300上。管芯标记板301和300是物理上分开的标记板。可以安置MOSFET管芯306和308的源极(218和220)和栅极(214和212)的布局以使得它们沿MOSFET管芯306和308的中心线对称。功率控制IC302堆叠在两个MOSFET管芯306和308的顶部上并且在这个实施方案中,重叠在MOSFET管芯306和308的源极区域218和220的两个部分而非栅极区域212和214上。
在电池保护应用中,形成在功率控制IC302上的输入焊盘224通过焊接线313电耦合至供应电压引脚或引线324。供应电压引脚324可以通过电阻器(未示出)连接至电池的阳极。形成在功率控制IC302上的输入焊盘226通过焊接线312电耦合至电压监测引脚326。接地引脚320可以电耦合至电池的阴极(未示出)并且在这个实施方案中定位在封装件100的右侧,并且所述接地引脚320优选地通过多个焊接线322电耦合至MOSFET308的源极焊盘220。在这个实施方案中,MOSFET308充当内部放电MOSFET。功率控制IC302的接地焊盘120通过焊接线316电耦合至MOSFET308的源极焊盘220。功率控制IC302的输出焊盘112通过焊接线315电耦合至MOSFET308的栅极焊盘212以使电池保护IC能够或不能够放电。功率控制IC302的输出焊盘114通过焊接线314电耦合至MOSFET306的栅极焊盘214以使电池保护IC能够或不能够充电。MOSFET306的源极焊盘218可以优选地通过多个焊接线310电耦合至耦合的引线或引脚318。
在这个实施方案中,焊接线310之间的距离和焊接线322之间的距离是间隔开的,从而提供更低的电阻。上文公开的焊接线可以由适合的金属包括但不限于金(Au)、铜(Cu)或铝(Al)制成。栅极金属焊盘212和214以及源极金属焊盘218和220优选地在两个MOSFET管芯306和308的每一个上具有3至5微米厚的铝并且位于MOSFET管芯306和308的顶表面的一部分上。或者,两个MOSFET管芯306和308的源极焊盘218和220可以通过铝条(未示出)而非焊接线电耦合至耦合的引线318和耦合的引线320。铝条是多个焊接线的已知替代物。
使两个管芯彼此堆叠的一个不良效果是封装件100厚度的增加,这会限制应用的范围或甚至会使所得装置无效。为了减小封装件100的总厚度,可以使用小于标准8密耳的更薄的管芯。优选地,IC302以及MOSFET管芯306和308的管芯厚度都小于6密耳。MOSFET管芯306和308的减小的厚度进一步减小MOSFET管芯306和308的导通电阻。
图2是沿2-2部分的图1的双标记板堆叠式管芯封装件100的简化截面视图。为避免使图2混乱,图1中示出的所有元件都未示出。图2分别示出了两个MOSFET管芯306和308的漏极金属焊盘116和118,所述漏极金属焊盘116和118位于MOSFET管芯306和308的底表面上并且可以由约1微米至3微米的TiNiAg构成。两个MOSFET管芯306和308的漏极焊盘116和118通过导电粘合剂303电耦合至引线框架管芯标记板301和管芯标记板300,所述导电粘合剂303可以是软焊料、导电环氧树脂以及其它导电粘附剂。
绝缘粘附层304如不导电环氧树脂层成型在功率控制IC302与两个MOSFET管芯306和308的顶部之间。绝缘粘附层304不仅提供了功率控制IC302与MOSFET管芯306和308之间的机械粘合,而且还充当了电绝缘屏障,因为功率控制IC302与MOSFET管芯306和308之间存在电位差,如果未恰当绝缘,那么所述电位差将会引起装置失灵。
IC封装中的常规环氧树脂配量和管芯附接可能无法提供MOSFET管芯306和308的源极与功率控制IC302之间的充分绝缘。为了确保恰当的绝缘,可以遵循特定的步骤来形成高质量绝缘层304。在一个实施方案中,以晶片的形式将非导电环氧树脂如来自Rancho Dominguez,Calif.的Abelstik实验室的Ablesbond8006NS或Ablecoat8008NC涂布在功率控制IC302的背面上并且然后在烘箱中使所述非导电环氧树脂半固化。具有半固化的背面涂布的环氧树脂的的功率控制IC302被切成小方块并且在高温下附接到MOSFET306和308上,并且然后全固化。在另一个实施方案中,在功率控制IC管芯302用其上附接的第一层非导电环氧树脂涂布之前,将第二非导电环氧树脂施加到MOSFET管芯306和308的顶表面上。在另一个实施方案中,两个MOSFET管芯306和308进一步包括形成在源极顶上的钝化层(未示出)以用于进一步绝缘。
模制化合物405被成型来封装功率控制IC302、MOSFET管芯 306和308以及管芯标记板301和300的周围。间隙200优选足够宽以允许模制化合物405流入间隙200中以便增强模制化合物405在管芯标记板301和300周围的键合。间隙200中模制化合物405在管芯标记板301和300周围的增强的键合改进了封装件100的可靠性。
在过去制造的封装件中,单个大标记板容易造成封装件的上半部与下半部之间的模流不平衡。这种模流不平衡会导致不完全填充,在封装件的模制化合物中会生成空隙。所述空隙引起了可靠性问题,因为水分可能会被允许渗入到封装件中并且影响电子部件。
本实用新型的封装件100通过包括具有间隙200的两个分开的管芯标记板301和300来解决这个问题。间隙200允许路径的更多部分用于模制化合物405来填充功率控制IC302、MOSFET管芯306和308周围以及管芯标记板301和300周围的体积。这允许更宽的模具工艺参数窗口用于制造中,从而产生以生产设置制造的封装件100的质量的改进的一致性。能够用于本实用新型中的更宽的模具工艺参数包括(例如)模制化合物405的更快的传送速度、封装期间更宽的温度范围以及在包含模制化合物405的材料的选择上的增加的灵活性。
虽然本实用新型因更小的总标记板面积可用于相同尺寸封装件100而要求使用更小管芯尺寸的MOSFET管芯306和308(这导致增加的Rds-on),但是Rds-on的增加足够小以至于根据本实用新型制造的封装件100能够满足客户规格。
在一个实施方案中,模制化合物405通常由多芳香环树脂(MAR)或邻甲酚醛环氧树脂(OCN)构成,并且间隙200的厚度优选在100微米与300微米之间。最优选地,间隙小于200微米以便于最小化封装件100从引线至引线的总长或减小MOSFET管芯306和308的尺寸。为了最小化间隙200的尺寸(以及所产生的对封装件总尺寸或MOSFET管芯尺寸的影响),优选使用具有小于间隙200的宽度的相对较小填料尺寸并具有球体形状的模制化合物405。然而,可以增加 间隙200的宽度以允许更不规则形状的和/或更大填料尺寸的模制化合物405。在一个实施方案中,模制化合物405的填料尺寸小于间隙200的宽度,但更优选地,平均填料尺寸小于间隙200的一半宽度。在另一个实施方案中,如果间隙200具有约200微米的宽度,那么优选的是模制化合物405的填料尺寸是约75微米。
管芯标记板300和301优选在组件中的下一个水平上电耦合在一起,所述组件不是封装件100的一部分,而是安装了封装件100的印刷电路板(未示出)的一部分。在一个实施方案中,管芯标记板300和301通过导电层401电耦合在一起以便电耦合漏极焊盘116和118。在一个替代实施方案中,导电层401可以由两个物理上分开的层(未示出)而非单层构成并且这两个物理上分开的导电层401通过印刷电路板自身来电耦合。一个或多个导电层401通常由铜和防止所述铜氧化的涂层如锡焊料构成。导电层401可以是模印或刮压到电路板(未示出)上的焊膏的形式。
如前文已陈述,本实用新型的一个优点是在于两个标记板或管芯焊盘300和301比过去使用的单个大标记板更易于板装。这归因于以下事实:在板装具有单个大标记板的封装件时,单个标记板的较大覆盖区使电子部件以不受控的方式移动或浮动。将封装件安装到电路板上时的这种移动使得难以控制封装件引脚连接焊料对准。相比之下,本实用新型的标记板300和301由其间的模制化合物405的一部分断开的事实在板装封装件100时增加了表面张力并且最小化了移动或浮动。因此,本实用新型的封装件100更易于制造,这提高了在印刷电路板上制造的最终产品的产量。参照回图1和图2,应该显而易见的是,在本实用新型的另一个实施方案中,对于电池保护IC应用来说,引线或引脚324和320可以处在封装件100的左边并且引线326和318可以处在封装件100的右边,其中MOSFET306和308从左至右移动并且功率控制IC302的相应的输入焊盘和MOSFET管芯306和308的栅极焊盘214和212在对应的管芯上也从左至右移动,从而提供基本上沿垂直于线2-2的线的镜像。如可由集成电路的设计 者认识到,功率控制IC302和两个MOSFET管芯306和308上的焊盘位置可以不同于图1中所示的那些焊盘位置。
图3是替代的双标记板堆叠式管芯封装件100的顶视图,其中具有不等尺寸的两个离散的MOSFET管芯317和319处在管芯标记板801和800上,其中管芯标记板801和800之间存在间隙201。与图1和图2中所示的实施方案的元件相同的元件由相同的编号引用。在所示的实施方案中,第一MOSFET317小于第二MOSFET319。在图3中,引线324和320处在封装件100的右边,并且引线326和318处在封装件100的左边。如图3中所示,在这个实施方案中,功率控制IC302以一种方式仅堆叠在MOSFET319上从而使得功率控制IC302的长边平行于MOSFET319的长边。如显而易见的是,功率控制IC302可以具有不同的尺寸并且放置在MOSFET319上,如果是矩形的,那么所述功率控制IC具有与MOSFET319的长边垂直的长边或短边。还显而易见的是,MOSFET317可以放置在右边并且MOSFET319可以放置在左边(未示出),其中功率IC302和MOSFET管芯317和319两者的焊盘被定位以容纳功率IC302与MOSFET管芯317和319之间的电耦合以及上文参考图1描述的引线324、320、326和318,但对应的引线是图3中所示的引线的镜像。另外,功率控制IC302同样可以放置在两个MOSFET管芯317和319的一部分上。
从上述全部内容,本领域技术人员可以确定根据一个实施方案,半导体封装件结构(例如元件100)包括第一管芯标记板和第二管芯标记板(例如,元件300和301,800和801),其中第一管芯标记板与第二管芯标记板由间隙(例如,元件200,201)分开。第一和第二金属氧化物半导体场效应晶体管(MOSFET)管芯(例如,元件306和308,317和319)分别处在第一管芯标记板和第二管芯标记板上。功率控制集成电路(IC)(例如元件302)堆叠在第一MOSFET管芯或第二MOSFET管芯中的至少一个的顶部上。模制化合物(例如元件405)封装功率控制IC、第一MOSFET管芯和第二MOSFET管芯以及第一管芯标记板 和第二管芯标记板。
本领域技术人员还将认识到根据另一个实施方案,上面段落中描述的结构进一步包括具有在100微米与300微米之间的宽度的间隙。
本领域技术人员还将认识到根据另一个实施方案,上面段落中描述的结构进一步包括由填充材料构成的模制化合物,所述填充材料具有小于间隙的一半宽度的平均尺寸。
本领域技术人员还将认识到根据另一个实施方案,双标记板堆叠式管芯封装件(例如,元件100)包括第一和第二物理上分开的管芯标记板(例如,元件300和301,800和801),其中第一管芯标记板与第二管芯标记板由间隙(例如,元件200,201)分开。第一和第二金属氧化物半导体场效应晶体管(MOSFET)管芯(例如,元件306和308,317和319)分别安装在第一管芯标记板和第二管芯标记板上并且电耦合至其。功率控制集成电路(IC)(例如元件302)通过非导电环氧树脂(例如元件304)垂直地安装在第一MOSFET管芯或第二MOSFET管芯中的至少一个的顶部上。模制化合物(例如元件405)布置在功率控制IC、第一MOSFET管芯和第二MOSFET管芯、第一管芯标记板和第二管芯标记板周围并且布置在间隙中。
本领域技术人员还将认识到根据又另一个实施方案,一种制造半导体封装件(例如,元件100)的方法包括提供第一管芯标记板和第二管芯标记板(例如,元件300和301,800和801),其中第一管芯标记板与第二管芯标记板由间隙(例如,元件200,201)分开。所述方法包括分别将第一和第二金属氧化物半导体场效应晶体管(MOSFET)管芯(例如,元件306和308,317和319)附接到第一管芯标记板和第二管芯标记板上。所述方法包括将功率控制集成电路(IC)(例如,元件302)放置在第一MOSFET管芯或第二MOSFET管芯中的至少一个的顶部上。所述方法包括用模制化合物(例如,元件405)封装功率控制IC、第一MOSFET管芯和第二MOSFET管芯以及第一管芯标记板和第二 管芯标记板。
本领域技术人员还将认识到根据另一个实施方案,上面段落中描述的方法进一步包括用由填充材料构成的模制化合物进行封装,所述填充材料具有小于间隙的一半宽度的平均尺寸。
鉴于上述全文,明显的是公开了一种新型结构和方法。除其它特征之外,还包括第一和第二分开的管芯标记板,其中第一管芯标记板与第二管芯标记板由间隙分开。第一和第二金属氧化物半导体场效应晶体管(MOSFET)管芯分别处在第一管芯标记板和第二管芯标记板上。在一个实施方案中,MOSFET管芯尺寸大致相等。功率控制集成电路(IC)堆叠在第一MOSFET管芯或第二MOSFET管芯中的至少一个的顶部上。在另一个实施方案中,功率控制IC堆叠在两个MOSSFET管芯上。模制化合物封装功率控制IC、第一MOSFET管芯和第二MOSFET管芯以及第一管芯标记板和第二管芯标记板。在另一个实施方案中,封装件是电池保护IC封装件。所述封装件和方法增加了可制造性和可靠性,同时还提供了具有更小覆盖区的封装件结构。
本实用新型一方面提供一种半导体封装件,包括:第一管芯标记板和第二管芯标记板,其中所述第一管芯标记板与所述第二管芯标记板由间隙分开;第一和第二金属氧化物半导体场效应晶体管MOSFET管芯,其分别处在所述第一管芯标记板和所述第二管芯标记板上;功率控制集成电路IC,其堆叠在所述第一MOSFET管芯或所述第二MOSFET管芯中的至少一个的顶部上;模制化合物,其封装所述功率控制IC、所述第一MOSFET管芯和所述第二MOSFET管芯以及所述第一管芯标记板和所述第二管芯标记板。
根据一个实施例,所述第一管芯标记板与所述第二管芯标记板之间的所述间隙在100微米与300微米之间。
根据一个实施例,所述第一管芯标记板与所述第二管芯标记板之 间的所述间隙小于200微米。
根据一个实施例,所述模制化合物被布置在所述间隙之间,从而改进所述半导体封装件的可靠性。
根据一个实施例,所述模制化合物具有小于所述间隙的一半宽度的平均填料尺寸。
根据一个实施例,所述模制化合物由具有球体形状的填充材料构成。
根据一个实施例,所述功率控制IC电耦合至第一引线和第二引线并且所述第一MOSFET管芯电耦合至第三引线并且所述第二MOSFET管芯电耦合至第四引线。
根据一个实施例,所述第一MOSFET管芯电耦合至第五引线并且所述第二MOSFET管芯电耦合至第六引线。
根据一个实施例,所述第一管芯标记板和所述第二管芯标记板是电耦合的。
根据一个实施例,所述功率IC电耦合至所述第一MOSFET的栅极以及所述第二MOSFET的栅极和源极。
本实用新型一方面提供一种双标记板堆叠式管芯封装件,包括:第一和第二物理分开的管芯标记板,其中所述第一管芯标记板与所述第二管芯标记板由间隙分开;第一和第二金属氧化物半导体场效应晶体管MOSFET管芯,所述第一和第二金属氧化物半导体场效应晶体管管芯分别安装在所述第一管芯标记板和所述第二管芯标记板上并且电耦合至其所述第一管芯标记板和所述第二管芯标记板;功率控制集成电路IC,其通过非导电环氧树脂垂直地安装在所述第一MOSFET管芯或所述第二MOSFET管芯中的至少一个的顶部上;以及模制化合物,其封装所述功率控制IC、所述第一MOSFET管芯和 所述第二MOSFET管芯、所述第一管芯标记板和所述第二管芯标记板并且被布置在所述间隙中。
根据一个实施例,所述第一管芯标记板与所述第二管芯标记板之间的所述间隙在100微米与300微米之间。
根据一个实施例,所述第一管芯标记板与所述第二管芯标记板之间的所述间隙小于200微米。
根据一个实施例,所述功率控制IC电耦合至第一引线和第二引线并且所述第一MOSFET管芯电耦合至第三引线和第四引线并且所述第二MOSFET管芯电耦合至第五引线和第六引线。
根据一个实施例,所述模制化合物由填充材料构成,所述填充材料具有小于所述间隙的一半宽度的平均尺寸。
根据一个实施例,所述模制化合物由具有球体形状的填充材料构成。
本实用新型一方面提供一种半导体封装件,包括:第一管芯标记板和第二管芯标记板,其中所述第一管芯标记板与所述第二管芯标记板由间隙分开,其中所述间隙小于200微米;分别在所述第一管芯标记板和所述第二管芯标记板上的第一和第二金属氧化物半导体场效应晶体管MOSFET管芯;在所述第一MOSFET管芯或所述第二MOSFET管芯中的至少一个的顶部上的功率控制集成电路IC;覆盖所述功率控制IC、所述第一MOSFET管芯和所述第二MOSFET管芯以及所述第一管芯标记板和所述第二管芯标记板的封装层,其中所述封装层在所述间隙中并且包括具有小于100微米的平均尺寸的填充材料。
本实用新型一方面提供一种制造半导体封装件的方法,包括:提供第一管芯标记板和第二管芯标记板,其中所述第一管芯标记板与所述第二管芯标记板由间隙分开;将第一和第二金属氧化物半导体场效 应晶体管(MOSFET)管芯分别附接到所述第一管芯标记板和所述第二管芯标记板上;将功率控制集成电路(IC)放置在所述第一MOSFET管芯或所述第二MOSFET管芯中的至少一个的顶部上;用模制化合物封装所述功率控制IC、所述第一MOSFET管芯和所述第二MOSFET管芯以及所述第一管芯标记板和所述第二管芯标记板。
根据一个实施例,所述第一管芯标记板与所述第二管芯标记板之间的所述间隙小于200微米。
根据一个实施例,所述封装步骤进一步包括使所述模制化合物成型在所述间隙之间,从而改进所述半导体封装件的可靠性。
根据一个实施例,所述封装步骤进一步包括使所述模制化合物由填充材料构成,所述填充材料具有小于所述间隙的一半宽度的平均尺寸。
虽然以具体优选的实施方案和示例实施方案描述了本实用新型的主题,但上述附图和其描述仅描绘了所述主题的典型实施方案,并且因此不认为对实用新型范围具有限制性。明显的是,本领域技术人员将清楚许多替代和变化。
如上文权利要求所反映,多个发明方面可能在于比上文公开的单个实施方案的所有特征更少的特征。因此,上文表述的权利要求特此明确并入附图详述中,其中每项权利要求都以其自身为根据作为本实用新型的单独实施例。此外,虽然本文描述的一些实施方案包括一些特征,而非其它实施方案中包括的其它特征,但不同实施方案的特征的组合意图属于本实用新型的范围内,并且形成不同的实施方案,如本领域技术人员所理解。
Claims (17)
1.一种半导体封装件,其特征在于包括:
第一管芯标记板和第二管芯标记板,其中所述第一管芯标记板与所述第二管芯标记板由间隙分开;
第一和第二金属氧化物半导体场效应晶体管MOSFET管芯,其分别处在所述第一管芯标记板和所述第二管芯标记板上;
功率控制集成电路IC,其堆叠在所述第一MOSFET管芯或所述第二MOSFET管芯中的至少一个的顶部上;
模制化合物,其封装所述功率控制IC、所述第一MOSFET管芯和所述第二MOSFET管芯以及所述第一管芯标记板和所述第二管芯标记板。
2.如权利要求1所述的半导体封装件,其特征在于所述第一管芯标记板与所述第二管芯标记板之间的所述间隙在100微米与300微米之间。
3.如权利要求1所述的半导体封装件,其特征在于所述第一管芯标记板与所述第二管芯标记板之间的所述间隙小于200微米。
4.如权利要求1所述的半导体封装件,其特征在于所述模制化合物被布置在所述间隙之间,从而改进所述半导体封装件的可靠性。
5.如权利要求1所述的半导体封装件,其特征在于所述模制化合物具有小于所述间隙的一半宽度的平均填料尺寸。
6.如权利要求1所述的半导体封装件,其特征在于所述模制化合物由具有球体形状的填充材料构成。
7.如权利要求1所述的半导体封装件,其特征在于所述功率控制IC电耦合至第一引线和第二引线并且所述第一MOSFET管芯电耦合至第三引线并且所述第二MOSFET管芯电耦合至第四引线。
8.如权利要求7所述的半导体封装件,其特征在于所述第一MOSFET管芯电耦合至第五引线并且所述第二MOSFET管芯电耦合至第六引线。
9.如权利要求1所述的半导体封装件,其特征在于所述第一管芯标记板和所述第二管芯标记板是电耦合的。
10.如权利要求1所述的半导体封装件,其特征在于所述功率IC电耦合至所述第一MOSFET的栅极以及所述第二MOSFET的栅极和源极。
11.一种双标记板堆叠式管芯封装件,其特征在于包括:
第一和第二物理分开的管芯标记板,其中所述第一管芯标记板与所述第二管芯标记板由间隙分开;
第一和第二金属氧化物半导体场效应晶体管MOSFET管芯,所述第一和第二金属氧化物半导体场效应晶体管管芯分别安装在所述第一管芯标记板和所述第二管芯标记板上并且电耦合至所述第一管芯标记板和所述第二管芯标记板;
功率控制集成电路IC,其通过非导电环氧树脂垂直地安装在所述第一MOSFET管芯或所述第二MOSFET管芯中的至少一个的顶部上;以及
模制化合物,其封装所述功率控制IC、所述第一MOSFET管芯和所述第二MOSFET管芯、所述第一管芯标记板和所述第二管芯标记板并且被布置在所述间隙中。
12.如权利要求11所述的双标记板堆叠式管芯封装件,其特征在于所述第一管芯标记板与所述第二管芯标记板之间的所述间隙在100微米与300微米之间。
13.如权利要求11所述的双标记板堆叠式管芯封装件,其特征在于所述第一管芯标记板与所述第二管芯标记板之间的所述间隙小于200微米。
14.如权利要求11所述的双标记板堆叠式管芯封装件,其特征在于所述功率控制IC电耦合至第一引线和第二引线并且所述第一MOSFET管芯电耦合至第三引线和第四引线并且所述第二MOSFET管芯电耦合至第五引线和第六引线。
15.如权利要求11所述的双标记板堆叠式管芯封装件,其特征在于所述模制化合物由填充材料构成,所述填充材料具有小于所述间隙的一半宽度的平均尺寸。
16.如权利要求11所述的双标记板堆叠式管芯封装件,其特征在于所述模制化合物由具有球体形状的填充材料构成。
17.一种半导体封装件,其特征在于包括:
第一管芯标记板和第二管芯标记板,其中所述第一管芯标记板与所述第二管芯标记板由间隙分开,其中所述间隙小于200微米;
分别在所述第一管芯标记板和所述第二管芯标记板上的第一和第二金属氧化物半导体场效应晶体管MOSFET管芯;
在所述第一MOSFET管芯或所述第二MOSFET管芯中的至少一个的顶部上的功率控制集成电路IC;
覆盖所述功率控制IC、所述第一MOSFET管芯和所述第二MOSFET管芯以及所述第一管芯标记板和所述第二管芯标记板的封装层,其中所述封装层在所述间隙中并且包括具有小于100微米的平均尺寸的填充材料。
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