CN203732641U - Additional substrate test point - Google Patents
Additional substrate test point Download PDFInfo
- Publication number
- CN203732641U CN203732641U CN201320837415.5U CN201320837415U CN203732641U CN 203732641 U CN203732641 U CN 203732641U CN 201320837415 U CN201320837415 U CN 201320837415U CN 203732641 U CN203732641 U CN 203732641U
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- CN
- China
- Prior art keywords
- point
- substrate
- test
- test points
- test point
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- Tests Of Electronic Circuits (AREA)
Abstract
The utility model discloses an additional substrate test point. One surface of the substrate is provided with an electrical circuit, and the other surface of the substrate is provided with a plurality of additional test points. The test points are connected with the electrical circuit. The test points are open short test points, resistance test points, capacitance test points, inductance test points, and voltage drop test points. The additional substrate test point is advantageous in that the coverage rate of the product on-line test can reach 100%, and the failure of one element of the circuit substrate can be discovered accurately, and the quality guarantee capability of the products can be improved; the test points are disposed on the circuit substrate work flow, and the on-line test can be carried out conveniently, and therefore the time spent for repeated tests caused by insufficient test points can be saved, and the production efficiency can be improved; and at the same time, the arranged test points cannot affect the wiring layout of the circuit substrate, and the arrangement is tidy and beautiful.
Description
Technical field
The utility model relates to a kind of tester substrate point, relates in particular to a kind of tester substrate point appending.
Background technology
Quality is the life of enterprise, how to prevent bad generation, how can be as far as possible early discovery bad be our eternal problem.The bad people of being of performance of our electronic product with the naked eye cannot find, therefore must be by means of some special-purpose instrument and meters, yet, traditional test point is often limited by the size of testing needle, cannot test in the every bit layout of the cabling of circuit substrate, how these instrument and meters are connected with our all elements that will test, can not accomplish the coverage rate of product test 100%, and our traditional circuit substrate design proposal cannot be planted pin to all electrical networks.
Utility model content
The purpose of this utility model is to overcome the defect of prior art, a kind of tester substrate point appending is provided, the utility model has been realized On-line Product test coverage and has been reached 100%, can find exactly the inefficacy of a certain element on circuit substrate, improves the quality guarantee ability of product.
The technical scheme that realizes above-mentioned purpose is:
A kind of tester substrate point appending of the utility model, described substrate is simultaneously provided with electric circuit, and wherein, described substrate another side is provided with some test points of appending, described test point is connected with electric circuit by via holes of substrate, and described test point setting is drawn test and planted pin.
The above-mentioned tester substrate appending point, is characterized in that: described test point is open-short circuit point.
The above-mentioned tester substrate appending point, is characterized in that: described test point is resistance test point.
The above-mentioned tester substrate appending point, is characterized in that: described test point is capacity measurement point.
The above-mentioned tester substrate appending point, is characterized in that: described test point is inductance measurement point.
The above-mentioned tester substrate appending point, is characterized in that: described test point is pressure fall-off test point.
The beneficial effects of the utility model are: the coverage rate that the utility model has been realized On-line Product test has reached 100%, can find exactly the inefficacy of a certain element on circuit substrate, improves the quality guarantee ability of product; Test point is laid in circuit substrate production procedure, carry out on-line testing very convenient, has saved that test point is not enough and the time that need to repeatedly test has promoted production efficiency; Same inch, the test point of placement does not affect the cabling layout of circuit substrate, and marshalling is attractive in appearance.
Accompanying drawing explanation
Fig. 1 is the catenation principle schematic diagram of traditional tester substrate point of prior art.
Fig. 2 is the catenation principle schematic diagram of a kind of tester substrate point appending of the present utility model.
Fig. 3 is the enlarged diagram of a kind of tester substrate point appending of the present utility model.
Fig. 4 is that the substrate that passes of the single test point of a kind of tester substrate point appending of the present utility model connects enlarged diagram.
Embodiment
Below in conjunction with accompanying drawing, the utility model is described in further detail.
Refer to Fig. 2, Fig. 3 and Fig. 4, a kind of tester substrate point appending of the utility model, substrate is simultaneously provided with electric circuit, wherein, substrate another side is provided with some test points of appending, and test point is connected with electric circuit by via holes of substrate, and test point setting is drawn test and planted pin.
Test point is for opening the test points such as short circuit, resistance, electric capacity, inductance, pressure drop.
The utility model is on substrate, to increase corresponding test point to facilitate test, and the test point of appending can cover electrical networks all on PCB circuit substrate and plant pin, and testing needle can accurately be pricked corresponding test point.
The utility model relates to the cabling layout test point placement schemes of PCB circuit substrate, can not affect the apparent size of properties of product and PCB.In the cabling layout of PCB circuit substrate, for each electric circuit, increase a test point, this test point is used for contacting with testing needle, and the component testing coverage rate that so just can realize product reaches 100%.
The paster connector of PCB circuit substrate need to carry out ICT on-line testing, and each pinprick (PIN) can be drawn test point.Have as shown in Figure 2 55 test points, in figure, schematically append wherein 11 test point TP1, TP2, TP3, TP4, TP5, TP6, TP51, TP52, TP53, TP54 and TP55.
As shown in Figure 1, traditional test point is often limited by the size of testing needle, cannot test at the every bit of the cabling layout of PCB circuit substrate.Conventionally between signal wire, distance between centers of tracks is 0.508mm, and the restriction diameter of testing needle size is 1.27mm.Therefore, classic method cannot be planted pin to all electrical equipment networks, and has a strong impact on the cabling of PCB circuit substrate.Along with the development in epoch, need to consider power consumption, anti-interference and signal integrity etc., to the cabling of PCB circuit substrate, require more and more stricter.
The tester substrate point that the utility model appends, as shown in Figure 3 and Figure 4, test point is connected with electric circuit to be tested by through hole.Due to the cabling of signal wire at circuit board, the test point conducting of the another side by through hole and circuit board.Neither affect signal wire cabling, utilize again the clearance spaces of circuit board another side, so also do not affect the apparent size of PCB circuit substrate; And can, by the test point marshalling of appending, facilitate the making of test needle-bar.
Below embodiment has been described in detail the utility model by reference to the accompanying drawings, and those skilled in the art can make many variations example to the utility model according to the above description.All within spirit of the present utility model and principle, any modification of doing, be equal to replacement, improvement etc., within all should being included in protection domain of the present utility model.Thereby some details in embodiment should not form restriction of the present utility model, the utility model will be usingd scope that appended claims defines as protection domain of the present utility model.
Claims (6)
1. the tester substrate point appending, described substrate is simultaneously provided with electric circuit, it is characterized in that: described substrate another side is provided with some test points of appending, and described test point is connected with electric circuit by via holes of substrate, described test point setting is drawn test and is planted pin.
2. according to the tester substrate point appending claimed in claim 1, it is characterized in that: described test point is open-short circuit point.
3. the tester substrate point appending according to claim 1, is characterized in that: described test point is resistance test point.
4. the tester substrate point appending according to claim 1, is characterized in that: described test point is capacity measurement point.
5. the tester substrate point appending according to claim 1, is characterized in that: described test point is inductance measurement point.
6. the tester substrate point appending according to claim 1, is characterized in that: described test point is pressure fall-off test point.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320837415.5U CN203732641U (en) | 2013-12-17 | 2013-12-17 | Additional substrate test point |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320837415.5U CN203732641U (en) | 2013-12-17 | 2013-12-17 | Additional substrate test point |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203732641U true CN203732641U (en) | 2014-07-23 |
Family
ID=51202703
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320837415.5U Expired - Fee Related CN203732641U (en) | 2013-12-17 | 2013-12-17 | Additional substrate test point |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203732641U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106980715A (en) * | 2017-03-13 | 2017-07-25 | 郑州云海信息技术有限公司 | A kind of method for not having to add ICT measuring point networks in quick inspection PCB |
-
2013
- 2013-12-17 CN CN201320837415.5U patent/CN203732641U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106980715A (en) * | 2017-03-13 | 2017-07-25 | 郑州云海信息技术有限公司 | A kind of method for not having to add ICT measuring point networks in quick inspection PCB |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140723 Termination date: 20181217 |