CN203562431U - Fast recovery diode chip of low concentration doping emitter region - Google Patents

Fast recovery diode chip of low concentration doping emitter region Download PDF

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Publication number
CN203562431U
CN203562431U CN201320705065.7U CN201320705065U CN203562431U CN 203562431 U CN203562431 U CN 203562431U CN 201320705065 U CN201320705065 U CN 201320705065U CN 203562431 U CN203562431 U CN 203562431U
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type
doping
anode
emitter region
type doping
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CN201320705065.7U
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Chinese (zh)
Inventor
赵哿
刘钺杨
高文玉
金锐
于坤山
刘隽
凌平
包海龙
张宇
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State Grid Corp of China SGCC
State Grid Shanghai Electric Power Co Ltd
Smart Grid Research Institute of SGCC
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State Grid Corp of China SGCC
State Grid Shanghai Electric Power Co Ltd
Smart Grid Research Institute of SGCC
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Abstract

The utility model relates to a power device and especially relates to a fast recovery diode chip of a low concentration doping emitter region. The diode chip comprises a metal cathode, a metal anode, a P-type doping layer, an N-type doping layer, an N-type substrate arranged between the P-type doping layer and the N-type doping layer, a field oxide layer and a passivation protection layer structure. The anode is a low-concentration p-type doping zone. The cathode is a low-concentration N-type buffer doping zone and a low-concentration N-type enhancement doping zone. Through a front side protection technology, a special manufacturing mode of back side injection doping is formed so as to form a device structure. According to the chip of the utility model, through reducing doping concentrations of anode and cathode emission emitter regions, a PN junction built-in potential difference is reduced; the total amount of holes injected into the p-type doping zone is reduced so that performance of the recovery diode is integrally optimized; the fast recovery diode is guaranteed to possess a low forward conduction voltage drop and simultaneously dynamic performance of a device is increased.

Description

The fast recovery diode chip of a kind of low concentration doping emitter region
Technical field
The utility model relates to a kind of power device, is specifically related to the fast recovery diode chip of a kind of low concentration doping emitter region.
Background technology
In high-end market segments such as electric power system, locomotive traction, new forms of energy, the large portion of fast recovery diode is applied to the fly-wheel diode of switching device, for switching device igbt does coupling, uses.The features such as it is low that it has forward conduction voltage drop, and device own loss is little, and resume speed is fast are the developing direction of following high-voltage great-current.
Traditional high-power fast recovery diode, in order to pursue switching characteristic and better recovery softness faster, adopts the manufacture process technology of life-span control conventionally, and the complicated manufacturing cost of technological process of above-mentioned manufacturing technology is higher.
Utility model content
For the deficiencies in the prior art, the purpose of this utility model is to provide the fast recovery diode chip of a kind of low concentration doping emitter region, the utility model does not need the life-span to control manufacture process technology, thereby but reduce PN junction from key electrical potential difference by reducing the doping content of anode and cathode emission polar region, reduce P type doped region injected holes total amount, thus global optimization the performance of recovery diode.
The purpose of this utility model is to adopt following technical proposals to realize:
The utility model provides the fast recovery diode chip of a kind of low concentration doping emitter region, described chip comprises metallic cathode and metal anode, P type doped layer, N-type doped layer, and be arranged on the N-type substrate between P type doped layer and N-type doped layer, field oxide and passivation protection layer structure, its improvements are, the anode P type doping emitter region that described P type doped layer is low concentration, described N-type doped layer comprises the negative electrode N-type buffering doped region of the low concentration connecting successively and the negative electrode N-type enhanced doped regions of low concentration, described metallic cathode is arranged at the bottom surface of N-type substrate, described field oxide is arranged at the top of anode P type doping emitter region, described passivation protection layer structure is arranged on the upper surface of field oxide and metal anode, described metal anode is connected with anode P type doping emitter region.
Further, the ion that mix described anode P type doping emitter region is boron ion, and doping content is 5e16 to 5e17; The concentration of described P type doping emitter region is 5 × 10 of n type single crystal silicon sheet substrate concentration 2-2 × 10 3doubly; The thickness of described anode P type doping emitter region is 5-20um; Described anode P type doping emitter region has window;
Two ends in described anode P type doping emitter region are symmetrically arranged with terminal P type doping field limiting ring, and the ion mixing in described P type doping field limiting ring is boron ion, and doping content is 1e18 to 1e20; In the outside of described terminal P type doping field limiting ring, be provided with N-type doping cut-off ring, the ion mixing in described N-type doping cut-off ring is phosphonium ion or arsenic ion, and doping content is 1e20 to 1e21; Described terminal P type doping field limiting ring and N-type doping cut-off ring all have window;
The puncture voltage of described N-type doping cut-off ring is 600V-6500V.
Further, the ion that mix described negative electrode N-type buffering doped region and negative electrode N-type enhanced doped regions is phosphonium ion or arsenic ion; The concentration of described negative electrode N-type buffering doped region is 1 × 10 of n type single crystal silicon sheet substrate concentration 3-5 × 10 3doubly; The concentration of described negative electrode N-type enhanced doped regions is 5 × 10 of n type single crystal silicon sheet substrate concentration 3-5 × 10 4doubly;
Described negative electrode N-type enhanced doped regions is arranged between negative electrode N-type buffering doped region and metallic cathode; The thickness of described negative electrode N-type buffering doped region is 15-50um; The thickness of described negative electrode N-type enhanced doped regions is 3-10um;
The thickness of described metallic cathode is 1-2um.
Further, described field oxide is symmetricly set on the upper surface of anode P type doping emitter region, at the upper surface of described field oxide, is provided with isolating oxide layer; The thickness of described field oxide is 1-3um; The thickness of isolating oxide layer is 1.0-3.0um;
Described passivation protection layer symmetrical configuration is arranged on the upper surface of field oxide and metal anode; The thickness of described passivation protection layer structure is 2-15um; The thickness of described metal anode is 4-15um.
Compared with the prior art, the beneficial effect that the utility model reaches is:
1, the anode P type doping emitter region, the negative electrode N-type buffering HeNXing enhanced doped regions, doped region that adopt low concentration, can, without life-span control technology, guarantee the good electrical characteristic parameter of fast recovery diode, is embodied in:
(1) at the positive employing oxidation of n type single crystal silicon sheet of Uniform Doped and the mode growth protecting sacrifice layer of deposit, then adulterating in the N-type low concentration buffer area that adopts Implantation mode to carry out silicon chip back side, (the fast recovery diode concentration with respect to other traditional structures is lower, the 1e3 to 5e3 that should be n type single crystal silicon sheet substrate concentration is doubly interior), adopt high temperature Long Time Thermal annealing way to activate and knot the impurity of N-type low concentration buffering area, with the knot place hole concentration that guarantees n type single crystal silicon substrate and N-type low concentration buffering area, improve, obtain good switch softness.
(2) adopt photoetching, open a terminal and protect the injection window of P type field limiting ring, adopt Implantation mode to enter the doping of P type field limiting ring, adopt activation and the knot of high temperature Long Time Thermal annealing way to the doping of P type field limiting ring: adopt the mode of a high-temperature thermal oxidation silica of growing; Adopt photoetching and etching mode; the injection window that the protection N-type field cut-off of opening a terminal encircles; adopt Implantation mode to enter the doping of N-type cut-off ring; adopt activation and the knot of high temperature Long Time Thermal annealing way to the doping of N-type field limiting ring; to guarantee the cut-off of terminal transverse electric field of fast recovery diode, guarantee that its puncture voltage is between (600V to 6500V).
(3) adopt photoetching and etching mode, open the injection window of the active P type low concentration of chip front side emitter region, (the fast recovery diode concentration with respect to other traditional structures is lower to adopt Implantation mode to enter P type emitter region low concentration doping, the 5e2 to 2e3 that should be n type single crystal silicon sheet substrate concentration is doubly interior), adopt activation and the knot of high temperature Long Time Thermal annealing way to P type emitter region low concentration doping, with the knot place hole concentration of protecting P type low concentration emitter region and n type single crystal silicon, reduce, obtain lower reverse recovery peak current; The self-built electrical potential difference in knot place of P type low concentration emitter region and n type single crystal silicon reduces, and obtains lower conduction voltage drop; The knot place hole total injection of P type low concentration emitter region and n type single crystal silicon reduces, and obtains and leads faster switching speed.
(4) at the positive employing oxidation of n type single crystal silicon sheet of Uniform Doped and the mode growth protecting sacrifice layer of deposit; then adulterating in the N-type low concentration enhancement region that adopts Implantation mode to carry out silicon chip back side, (the fast recovery diode concentration with respect to other traditional structures is lower; the 5e3 to 5e4 that should be n type single crystal silicon sheet substrate concentration is doubly interior); adopt high-temperature thermal annealing mode to activate and knot the impurity of N-type low concentration enhancement region; with the knot place hole concentration of protecting n type single crystal silicon substrate and N-type low concentration enhancement region, improve, obtain good switch softness.
(5) adopt the deposit mode isolation from oxygen SiClx of growing; adopt photoetching and etching mode; open contact window; adopt deposit or evaporation mode growth front metal; adopt photoetching and etching mode to remove unwanted metal part, adopt deposit and coating method growth of passivation layer, adopt photoetching and etching mode; open welding window, to guarantee the anode electric connection of chip front side and the protection for chip entirety.
(6) adopt deposit or evaporation mode growth back metal, with the negative electrode that guarantees chip front side, be electrically connected.
2, the manufacturing processing technic adopting is common processes, easily realizes.
Accompanying drawing explanation
Fig. 1 is the high pressure fast recovery diode structural representation of the low concentration doping emitter region that provides of the utility model; Wherein: 01-N type substrate; The negative electrode N-type buffering doped region of 02-low concentration; 03-terminal P type doping field limiting ring; 04-field oxide; 05-N type doping cut-off ring; The anode P type doping emitter region of 06-low concentration; The negative electrode N-type enhanced doped regions of 07-low concentration; 08-isolation oxidation silicon layer; 09-metal anode; 10-passivation protection layer; 11-metallic cathode;
Fig. 2 is the high pressure fast recovery diode manufacturing process flow diagram of the low concentration doping emitter region that provides of the utility model.
Embodiment
Below in conjunction with accompanying drawing, embodiment of the present utility model is described in further detail.
The high pressure fast recovery diode structural representation of the low concentration doping emitter region that the utility model provides as shown in Figure 1, described diode comprises metallic cathode 11 and metal anode 09, P type doped layer, N-type doped layer, and be arranged on the N-type substrate 01 between P type doped layer and N-type doped layer, field oxide 04 and passivation protection layer 10 structure, the anode P type doping emitter region 06 that described P type doped layer is low concentration, described N-type doped layer comprises the negative electrode N-type buffering doped region 02 of the low concentration connecting successively and the negative electrode N-type enhanced doped regions 07 of low concentration, described metallic cathode 11 is arranged at the bottom surface of N-type substrate, described field oxide 04 is arranged at the top of anode P type doping emitter region 06, described passivation protection layer 10 structure are arranged on the upper surface of field oxide 04 and metal anode 09, described metal anode 09 is connected with anode P type doping emitter region 06,
Described N-type substrate is n type single crystal silicon sheet substrate, and the doping content of its substrate N impurity need to be selected according to different puncture voltages and forward conduction voltage drop demand (600V to 6500V) from substrate thickness.Its thickness is 200um-600um; Its voltage bearing is 600V-6500V.
The ion that mix described anode P type doping emitter region is boron ion, and doping content is 5e16 to 5e17; The concentration of described P type doping emitter region is 5 × 10 of n type single crystal silicon sheet substrate concentration 2-2 × 10 3doubly; The thickness of described anode P type doping emitter region is 5-20um; Described anode P type doping emitter region has window; Two ends in described anode P type doping emitter region are symmetrically arranged with terminal P type doping field limiting ring, and the ion mixing in described P type doping field limiting ring is boron ion, and doping content is 1e18 to 1e20; In the outside of described terminal P type doping field limiting ring, be provided with N-type doping cut-off ring, the ion mixing in described N-type doping cut-off ring is phosphonium ion or arsenic ion, and doping content is 1e20 to 1e21; Described terminal P type doping field limiting ring and N-type doping cut-off ring all have window; The puncture voltage of described N-type doping cut-off ring is 600V-6500V.
The ion that mix described negative electrode N-type buffering doped region and negative electrode N-type enhanced doped regions is phosphonium ion or arsenic ion; The concentration of described negative electrode N-type buffering doped region is 1 × 10 of n type single crystal silicon sheet substrate concentration 3-5 × 10 3doubly; The concentration of described negative electrode N-type enhanced doped regions is 5 × 10 of n type single crystal silicon sheet substrate concentration 3-5 × 10 4doubly;
Described negative electrode N-type enhanced doped regions is arranged between negative electrode N-type buffering doped region and metallic cathode; The thickness of described negative electrode N-type buffering doped region is 15-50um; The thickness of described negative electrode N-type enhanced doped regions is 3-10um; The thickness of described metallic cathode is 1-2um.
Described field oxide is symmetricly set on the upper surface of anode P type doping emitter region, at the upper surface of described field oxide, is provided with isolating oxide layer; The thickness of described field oxide is 1-3um; The thickness of isolating oxide layer is 1.0-3.0um;
Described passivation protection layer symmetrical configuration is arranged on the upper surface of field oxide and metal anode; The thickness of described passivation protection layer structure is 2-15um; The thickness of described metal anode is 4-15um.
The utility model also provides the manufacture method of the fast recovery diode chip of low concentration doping emitter region, and its flow chart as shown in Figure 2, comprises the steps:
(1) select n type single crystal silicon sheet substrate 01, the doping content of its substrate N impurity need to be selected according to different puncture voltages and forward conduction voltage drop demand (600V to 6500V) from substrate thickness.
(2) N-type doped buffer region 02 structure of manufacture low concentration: the negative electrode N-type buffering doped region of manufacturing chip comprises: adopt the mode growth protecting sacrifice layer of oxidation or deposit membranous to the n type single crystal silicon sheet substrate face of Uniform Doped, at the n type single crystal silicon sheet back side, adopt Implantation mode to generate the impurity of N-type low concentration doping buffering area, carrying out temperature is 1125 ℃-1225 ℃ again, time is the annealing process of 30 hours to 100 hours, inject activation and the knot of ion, knot is 15-50um to institute's degree of depth, behind formation negative electrode N-type buffering doped region, remove front protecting sacrifice layer membranous.
(3) manufacture chip terminal P type doping field limiting ring 03 structure: manufacture chip terminal P type doping field limiting ring and comprise: the n type single crystal silicon sheet substrate to Uniform Doped carries out high-temperature oxydation, in the superficial growth of n type single crystal silicon sheet, go out the oxide-film for 0.01um-0.03um, and carry out photoetching, adopt Implantation mode to generate the impurity of P type doping field limiting ring, carry out again temperature and be 1125 ℃-1225 ℃, time and be the annealing process of 10 hours to 30 hours, carry out activation and the knot of ion, knot is 10-30um to the degree of depth, forms terminal P type doping field limiting ring.
(4) manufacture chip field oxide 04 structure: the mode of the n type single crystal silicon sheet substrate 01 of Uniform Doped being carried out to high-temperature oxydation, at silicon chip surface, grow 1.0 to 2.0um field oxide, after follow- up 05,06 structure completes, can be completed into field oxide 04 structure and morphology.
(5) manufacture chip N-type doping cut-off ring 05 structure: field oxide 04 structure is adopted to photoetching and etching mode, open the doping window of N-type doping cut-off ring, form field oxide 04 part-structure, at the positive impurity that adopts Implantation mode to generate N-type doping cut-off ring 05 of n type single crystal silicon sheet, carry out again temperature and be 1125 ℃-1225 ℃, time and be the annealing process of 5 hours to 20 hours, carry out activation and the knot of ion, knot is 5-20um to the degree of depth, forms chip N-type doping cut-off ring 05.
(6) anode P type doping emitter region 06 structure of manufacture chip low concentration: the field oxide 04 in step (five) is adopted to photoetching and etching mode, open the doping window of P type low concentration emitter region, be completed into field oxide 04, adopt Implantation mode to carry out anode P type doping emitter region doping, adopting temperature is that 1125 ℃-1225 ℃, time are activation and the knot of the thermal annealing mode antianode P type doping emitter region doping of 3 hours to 15 hours, knot is 5-20um to the degree of depth, forms anode P type doping emitter region 06.
(7) negative electrode N-type doping enhancement region 07 structure of manufacture low concentration: membranous to the positive mode growth protecting sacrifice layer of deposit that adopts of the n type single crystal silicon sheet substrate 01 of Uniform Doped; at the n type single crystal silicon sheet back side, adopt Implantation mode to generate the impurity of negative electrode N-type enhanced doped regions; carrying out temperature again and be 1125 ℃-1225 ℃, time is 2 hours to 10 hours annealing processs; inject activation and the knot of ion; knot, in 1-5um depth bounds, forms the rear removal front protecting sacrifice layer in negative electrode N-type enhanced doped regions 07 membranous.
(8) manufacture chip isolation oxidation silicon layer 08 structure: use the chemical deposition mode boron phosphorus doping glass of growing membranous, carry out device isolation;
(9) manufacture chip front side metal anode 09 structure: photoetching and the etching of carrying out contact hole form 08 structure, use physical deposition or evaporation mode growth aluminium alloy, carry out photoetching and the etching of metal, form 09 structure, the electrode that has completed chip front side anode connects, and forms 09 structure.
(10) manufacture chip passivation protective layer 10 structures: use the chemical deposition mode silicon oxynitride of growing membranous or use the rotary coating mode polyimides of growing membranous, after overbaking, photoetching, etching technics, form passivation protection 10 structures.
(11) manufacture chip back metal cathode electrode 11 structures: 01N type monocrystalline silicon piece substrate mode is ground to attenuate or wet etching is cleaned, adopt physical deposition or evaporation to form back metal negative electrode 11 structures, the electrical characteristics that complete chip negative electrode connect.
Fast recovery diode chip and the manufacture method thereof of the low concentration doping emitter region that the utility model provides, adopt anode P type doping emitter region, the negative electrode N-type buffering HeNXing enhanced doped regions, doped region of low concentration, can, without life-span control technology, guarantee the good electrical characteristic parameter of fast recovery diode.The manufacture method adopting, processing technology is common processes, is easy to realize.The utility model can, when guaranteeing that fast recovery diode has compared with low forward conduction voltage drop, improve the dynamic property of device.
Finally should be noted that: above embodiment is only in order to illustrate that the technical solution of the utility model is not intended to limit, although the utility model is had been described in detail with reference to above-described embodiment, those of ordinary skill in the field are to be understood that: still can modify or be equal to replacement embodiment of the present utility model, and do not depart from any modification of the utility model spirit and scope or be equal to replacement, it all should be encompassed in the middle of claim scope of the present utility model.

Claims (4)

1. the fast recovery diode chip of a low concentration doping emitter region, described chip comprises metallic cathode and metal anode, P type doped layer, N-type doped layer, and be arranged on the N-type substrate between P type doped layer and N-type doped layer, field oxide and passivation protection layer structure, it is characterized in that, the anode P type doping emitter region that described P type doped layer is low concentration, described N-type doped layer comprises the negative electrode N-type buffering doped region of the low concentration connecting successively and the negative electrode N-type enhanced doped regions of low concentration, described metallic cathode is arranged at the bottom surface of N-type substrate, described field oxide is arranged at the top of anode P type doping emitter region, described passivation protection layer structure is arranged on the upper surface of field oxide and metal anode, described metal anode is connected with anode P type doping emitter region.
2. fast recovery diode chip as claimed in claim 1, is characterized in that, the ion that mix described anode P type doping emitter region is boron ion, and doping content is 5e16 to 5e17; The concentration of described P type doping emitter region is 5 × 10 of n type single crystal silicon sheet substrate concentration 2-2 × 10 3doubly; The thickness of described anode P type doping emitter region is 5-20um; Described anode P type doping emitter region has window;
Two ends in described anode P type doping emitter region are symmetrically arranged with terminal P type doping field limiting ring, and the ion mixing in described P type doping field limiting ring is boron ion, and doping content is 1e18 to 1e20; In the outside of described terminal P type doping field limiting ring, be provided with N-type doping cut-off ring, the ion mixing in described N-type doping cut-off ring is phosphonium ion or arsenic ion, and doping content is 1e20 to 1e21; Described terminal P type doping field limiting ring and N-type doping cut-off ring all have window;
The puncture voltage of described N-type doping cut-off ring is 600V-6500V.
3. fast recovery diode chip as claimed in claim 1, is characterized in that, the ion that mix described negative electrode N-type buffering doped region and negative electrode N-type enhanced doped regions is phosphonium ion or arsenic ion; The concentration of described negative electrode N-type buffering doped region is 1 × 10 of n type single crystal silicon sheet substrate concentration 3-5 × 10 3doubly; The concentration of described negative electrode N-type enhanced doped regions is 5 × 10 of n type single crystal silicon sheet substrate concentration 3-5 × 10 4doubly;
Described negative electrode N-type enhanced doped regions is arranged between negative electrode N-type buffering doped region and metallic cathode; The thickness of described negative electrode N-type buffering doped region is 15-50um; The thickness of described negative electrode N-type enhanced doped regions is 3-10um;
The thickness of described metallic cathode is 1-2um.
4. fast recovery diode chip as claimed in claim 1, is characterized in that, described field oxide is symmetricly set on the upper surface of anode P type doping emitter region, at the upper surface of described field oxide, is provided with isolating oxide layer; The thickness of described field oxide is 1-3um; The thickness of isolating oxide layer is 1.0-3.0um;
Described passivation protection layer symmetrical configuration is arranged on the upper surface of field oxide and metal anode; The thickness of described passivation protection layer structure is 2-15um; The thickness of described metal anode is 4-15um.
CN201320705065.7U 2013-11-08 2013-11-08 Fast recovery diode chip of low concentration doping emitter region Expired - Lifetime CN203562431U (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106252244A (en) * 2016-09-22 2016-12-21 全球能源互联网研究院 A kind of terminal passivating method and semiconductor power device
CN106298512A (en) * 2016-09-22 2017-01-04 全球能源互联网研究院 A kind of fast recovery diode and preparation method thereof
CN107768260A (en) * 2016-08-22 2018-03-06 全球能源互联网研究院 A kind of plane terminal passivating method and semiconductor power device
CN111211168A (en) * 2020-01-13 2020-05-29 上海擎茂微电子科技有限公司 RC-IGBT chip and manufacturing method thereof

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107768260A (en) * 2016-08-22 2018-03-06 全球能源互联网研究院 A kind of plane terminal passivating method and semiconductor power device
CN107768260B (en) * 2016-08-22 2020-11-03 全球能源互联网研究院 Plane terminal passivation method and semiconductor power device
CN106252244A (en) * 2016-09-22 2016-12-21 全球能源互联网研究院 A kind of terminal passivating method and semiconductor power device
CN106298512A (en) * 2016-09-22 2017-01-04 全球能源互联网研究院 A kind of fast recovery diode and preparation method thereof
CN106298512B (en) * 2016-09-22 2024-05-14 全球能源互联网研究院 Fast recovery diode and preparation method thereof
CN111211168A (en) * 2020-01-13 2020-05-29 上海擎茂微电子科技有限公司 RC-IGBT chip and manufacturing method thereof
CN111211168B (en) * 2020-01-13 2022-06-10 上海擎茂微电子科技有限公司 RC-IGBT chip and manufacturing method thereof

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Granted publication date: 20140423