CN203406849U - Buffer circuit with high speed and high precision - Google Patents
Buffer circuit with high speed and high precision Download PDFInfo
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- CN203406849U CN203406849U CN201320529318.XU CN201320529318U CN203406849U CN 203406849 U CN203406849 U CN 203406849U CN 201320529318 U CN201320529318 U CN 201320529318U CN 203406849 U CN203406849 U CN 203406849U
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Abstract
The utility model relates to a buffer circuit with high speed and high precision. The buffer circuit is composed of a first MOS tube, a second MOS tube, a third MOS and a fourth MOS tube. The source electrode of the first MOS tube is connected with a DC source VAA, the grid electrode of the first MOS tube is connected with an input voltage VIN, the drain electrode of the first MOS tube is connected with a power source anode input terminal VINT. The source electrode of the second MOS tube is connected with the drain electrode of the third MOS tube, and the grid electrode of the second MOS tube is connected with the grid electrode of the fourth MOS tube. The source electrode of the third MOS tube is connected with the DC source VAA, and the grid electrode of the third MOS tube is connected with the source electrode of the second MOS tube. The source electrode of the fourth MOS tube is connected with the DC source VAA, and the grid electrode of the fourth MOS tube is connected with the power source anode input terminal VINT. By employing the buffer circuit with high speed and high precision, a DC voltage drop is not formed largely during inputting and outputting processes, the input voltage VIN and an output voltage VOUT are largely equal, the output driving capability is strong, the DC gain is high, and a large capacitance load can be driven by a manner that a supplement capacitor is added between the grid electrode and the drain electrode of the second MOS tube. Not too many loads are applied on the fourth MOS tube loop, so that the feedback speed is rapid, and the buffer circuit is applicable to high speed circuits.
Description
Technical field
The utility model relates to a kind of buffer circuit, relates in particular to a kind of high-speed, high precision buffer circuit.
Background technology
When buffer circuit generally refers to the large load of demand motive, often with a buffer circuit, drive.It is upper that this circuit is delivered to output by the waveform of input signal, and export electric capacity and the ohmic load that enough electric currents carry out driver output point; The performance index of weighing buffering mainly contain bandwidth, the linearity, and low-frequency voltage gain, output voltage and input voltage are more approaching better, and expected gain is 1.
CMOS device is to adopt the produced plane type field three terminal device of CMOS (Complementary Metal Oxide Semiconductor) technology, be used to do switch or amplification etc., generally include grid, source electrode and three ports of drain electrode, grid generally plays control action, and source class follow circuit is applied in buffering widely, as shown in Figure 1.Main shortcoming is that low-frequency gain is 0.8-0.9 left and right, and inapplicable to high-precision buffering, being input to output has direct current pressure drop, and the linearity is poor, depends on input voltage and voltage empty.
In order to solve the problem of direct current pressure drop, can use two-stage source class follow circuit as shown in accompanying drawing 2 and accompanying drawing 3, but the product of the low-frequency gain that low-frequency gain is in this case two-stage only have 0.7 left and right.
When technique provides the metal-oxide-semiconductor of two kinds of different threshold voltages, can use circuit shown in accompanying drawing 4 to improve gain.M1 is the metal-oxide-semiconductor that threshold voltage is higher, and M2 is the metal-oxide-semiconductor that threshold voltage is lower.The threshold voltage difference of M1 and M2 is the source drain voltage of M1.Due to M1, the threshold voltage difference of M2 is not for substantially changing with input voltage, and the source drain voltage of M1 does not change with input voltage substantially yet, causes the output impedance of M1 pipe to diminish on the impact of low-frequency voltage, and low-frequency voltage gain becomes large.Major defect is that technique needs two kinds of different threshold voltages.This technique is more expensive.
Also have a kind of super source class follow circuit as shown in Figure 5, when output voltage changes, M1 and current source I1 form one-level and are amplified to VINT, then by M2 and current source I2, are continued to amplify, and feed back to input.Form a loop, make whole circuit have very strong driving force.Main shortcoming is the direct current pressure drop between input and output.
Summary of the invention
Technical problem to be solved in the utility model is that a kind of height high accuracy buffer circuit that can be applicable to high speed circuit is provided.
In order to solve the problems of the technologies described above, the utility model is achieved through the following technical solutions: a kind of high-speed, high precision buffer circuit, by the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, the 3rd metal-oxide-semiconductor and the 4th metal-oxide-semiconductor form, the source electrode of described the first metal-oxide-semiconductor connects DC power supply VAA, grid connects input voltage VIN, drain electrode connects positive source input VINT, described the second metal-oxide-semiconductor source electrode connects the drain electrode of the 3rd metal-oxide-semiconductor, grid connects the grid of the 4th metal-oxide-semiconductor, the source electrode of described the 3rd metal-oxide-semiconductor 3 connects DC power supply VAA, grid is connected with the second metal-oxide-semiconductor source electrode, the source electrode of described the 4th metal-oxide-semiconductor is connected with DC power supply VAA, grid connects positive source input VINT.
Preferably, between the grid of described the second metal-oxide-semiconductor and drain electrode, be provided with electric capacity.
Compared with prior art, usefulness of the present utility model is: the input and output of this high-speed, high precision buffer circuit do not have direct current pressure drop substantially, by mating current density and the threshold voltage of the first metal-oxide-semiconductor and the 3rd metal-oxide-semiconductor, input voltage VIN and output voltage VO UT are substantially equal, output driving force is strong, and DC current gain is high, owing to there being negative feedback, DC current gain approaches 1, can be by add the situation that electric capacity is dealt with the large capacitive load of driving of supplementing between the second metal-oxide-semiconductor grid and drain electrode; The 4th metal-oxide-semiconductor loop does not have too many load, and feedback speed is fast, is applicable to high speed circuit.
accompanying drawing explanation:
Below in conjunction with accompanying drawing, the utility model is further illustrated.
Fig. 1 is existing source follower structural representation;
Fig. 2 and Fig. 3 are existing two-stage source follower structural representations;
Fig. 4 is the source class follow circuit structural representation that adopts two kinds of threshold voltages;
The super source follower structural representation of Fig. 5;
Fig. 6 is the utility model high-speed, high precision buffer circuit structural representation.
In figure: 1, the first metal-oxide-semiconductor; 2, the second metal-oxide-semiconductor; 3, the 3rd metal-oxide-semiconductor; 4, the 4th metal-oxide-semiconductor.
embodiment:
Below in conjunction with the drawings and the specific embodiments, the utility model is described in detail:
A kind of high-speed, high precision buffer circuit shown in Fig. 5, by the first metal-oxide-semiconductor 1, the second metal-oxide-semiconductor 2, the 3rd metal-oxide-semiconductor 3 and the 4th metal-oxide-semiconductor 4 form, the source electrode of described the first metal-oxide-semiconductor 1 connects DC power supply VAA, grid connects input voltage VIN, drain electrode connects positive source input VINT, described the second metal-oxide-semiconductor 2 source electrodes connect the drain electrode of the 3rd metal-oxide-semiconductor 3, grid connects the grid of the 4th metal-oxide-semiconductor 4, the source electrode of described the 3rd metal-oxide-semiconductor 3 connects DC power supply VAA, grid is connected with the second metal-oxide-semiconductor 2 source electrodes, the source electrode of described the 4th metal-oxide-semiconductor 4 is connected with DC power supply VAA, grid connects positive source input VINT, in order to deal with the situation that drives large capacitive load, between the grid of described the second metal-oxide-semiconductor 2 and drain electrode, be provided with electric capacity.
The input and output of this high-speed, high precision buffer circuit do not have direct current pressure drop substantially, by mating current density and the threshold voltage of the first metal-oxide-semiconductor 1 and the 3rd metal-oxide-semiconductor 3, input voltage VIN and output voltage VO UT are substantially equal, output driving force is strong, DC current gain is high, owing to there being negative feedback, DC current gain approaches 1, can be by add the situation that electric capacity is dealt with the large capacitive load of driving of supplementing between the second metal-oxide-semiconductor 2 grids and drain electrode; The 4th metal-oxide-semiconductor 4 loops do not have too many load, and feedback speed is fast, are applicable to high speed circuit.
It is emphasized that: be only preferred embodiment of the present utility model above, not the utility model is done to any pro forma restriction, any simple modification, equivalent variations and modification that every foundation technical spirit of the present utility model is done above embodiment, all still belong in the scope of technical solutions of the utility model.
Claims (2)
1. a high-speed, high precision buffer circuit, by the first metal-oxide-semiconductor (1), the second metal-oxide-semiconductor (2), the 3rd metal-oxide-semiconductor (3) and the 4th metal-oxide-semiconductor (4) form, it is characterized in that: the source electrode of described the first metal-oxide-semiconductor (1) connects DC power supply (VAA), grid connects input voltage (VIN), drain electrode connects positive source input (VINT), described the second metal-oxide-semiconductor (2) source electrode connects the drain electrode of the 3rd metal-oxide-semiconductor (3), grid connects the grid of the 4th metal-oxide-semiconductor (4), the source electrode of described the 3rd metal-oxide-semiconductor (3) connects DC power supply (VAA), grid is connected with the second metal-oxide-semiconductor (2) source electrode, the source electrode of described the 4th metal-oxide-semiconductor (4) is connected with DC power supply (VAA), grid connects positive source input (VINT).
2. high-speed, high precision buffer circuit according to claim 1, is characterized in that: between the grid of described the second metal-oxide-semiconductor (2) and drain electrode, be provided with electric capacity.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320529318.XU CN203406849U (en) | 2013-08-29 | 2013-08-29 | Buffer circuit with high speed and high precision |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320529318.XU CN203406849U (en) | 2013-08-29 | 2013-08-29 | Buffer circuit with high speed and high precision |
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| Publication Number | Publication Date |
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| CN203406849U true CN203406849U (en) | 2014-01-22 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201320529318.XU Expired - Fee Related CN203406849U (en) | 2013-08-29 | 2013-08-29 | Buffer circuit with high speed and high precision |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103490767A (en) * | 2013-08-29 | 2014-01-01 | 苏州苏尔达信息科技有限公司 | High-speed high-precision buffer circuit |
| CN108227814A (en) * | 2017-12-20 | 2018-06-29 | 普冉半导体（上海）有限公司 | One introduces a collection follows circuit |
| CN115421546A (en) * | 2022-08-31 | 2022-12-02 | 集益威半导体(上海)有限公司 | Voltage buffer |
-
2013
- 2013-08-29 CN CN201320529318.XU patent/CN203406849U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103490767A (en) * | 2013-08-29 | 2014-01-01 | 苏州苏尔达信息科技有限公司 | High-speed high-precision buffer circuit |
| CN108227814A (en) * | 2017-12-20 | 2018-06-29 | 普冉半导体（上海）有限公司 | One introduces a collection follows circuit |
| CN115421546A (en) * | 2022-08-31 | 2022-12-02 | 集益威半导体(上海)有限公司 | Voltage buffer |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140122 Termination date: 20140829 |
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| EXPY | Termination of patent right or utility model |