CN202183059U - Low-dropout linear voltage regulator - Google Patents
Low-dropout linear voltage regulator Download PDFInfo
- Publication number
- CN202183059U CN202183059U CN2011202149582U CN201120214958U CN202183059U CN 202183059 U CN202183059 U CN 202183059U CN 2011202149582 U CN2011202149582 U CN 2011202149582U CN 201120214958 U CN201120214958 U CN 201120214958U CN 202183059 U CN202183059 U CN 202183059U
- Authority
- CN
- China
- Prior art keywords
- triode
- biasing
- power
- feedback resistance
- drain electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Abstract
The utility model discloses a low-dropout linear voltage regulator, comprising a power input terminal, a power output terminal, a power outputting stage which serves as an output unit of the low-dropout linear voltage regulator, a power driving stage for providing a driving voltage signal to the power outputting stage, and an error amplifying stage which amplifies a reference voltage and a differential-mode signal of a feedback voltage so as to make more stable an output voltage signal of the error amplifying stage. The low-dropout linear voltage regulator of the utility model achieves low power consumption and high power supply rejection.
Description
Technical field
The utility model relates to integrated circuit fields, relates to a kind of low pressure difference linear voltage regulator concretely.
Background technology
(Low Dropout Regulator, LDO), its principle of work is the input that is output as load circuit with band-gap reference to low pressure difference linear voltage regulator, through superpotential-voltage negative feedback active circuit, supply voltage accurately is provided.Because load current directly consumes on the pressure reduction of input voltage and output voltage; Therefore the efficient of low pressure difference linear voltage regulator is lower; Theoretical top efficiency is merely the ratio of output voltage and input voltage, and no-output ripple, noise are low, the advantage of electromagnetic-radiation-free but it has.With the Switching Power Supply managing chip comparatively speaking, like DC power supplier (DC-DC) and charge pump (Charge Pump), because of there being the energy-storage travelling wave tube isolation voltage poor, thereby efficient is higher, is widely used at present.Yet the Switching Power Supply managing chip all has bigger output voltage ripple, and DC-DC also has stronger electromagnetic radiation because used inductance, can cause serious interference to circuit, and therefore, in some high precision, circuit to noise-sensitive, LDO still is first-selected.As shown in Figure 1; The low pressure difference linear voltage regulator of existing structure comprises the power drive level, and said power drive level comprises driving triode M6 '; And be to drive the biasing triode TB3 ' that triode M6 ' provides offset signal; Also be included as the biasing voltage signal VB3 ' that biasing triode TB23 ' provides, the source electrode termination power input VIN ' of biasing triode TB3 ', biasing voltage signal VB3 ' drain electrode termination drives the drain electrode end of triode M6 '; Its points of common connection is the drive output XO ' of power drive level, and the gate terminal that drives triode M6 ' is for driving input end YI '.Its drive output XO ' connects the pliotron that drives output stage.
The input impedance over the ground of the low pressure difference linear voltage regulator of this kind structure, drive output XO ' is that Z1 is approximately equal to the input impedance Z2 of drive output XO ' to power input.Its shortcoming is: when power input VIN ' has the variation of a Δ V; The change in voltage of drive output XO ' is Δ V* (Z1/ (Z1+Z2)); Then the change in voltage of drive output XO ' is about 0.5 Δ V, and then the gate source voltage of the pliotron of power output stage is the voltage that the voltage of power input VIN ' deducts drive output XO ', and it changes and also is about 0.5 Δ V; Feasible electric current through pliotron has significant change, causes power supply to suppress lower.
The utility model content
The utility model technical matters to be solved is, overcomes above deficiency, provides a kind of and can improve the low pressure difference linear voltage regulator that power supply suppresses.
In order to solve the problems of the technologies described above; The technical scheme of the utility model is: a kind of low pressure difference linear voltage regulator comprises power output stage, and for power output stage the power drive level of drive signal is provided; Said power drive level; Comprise the driving triode, and the second biasing triode of offset signal is provided, and be the 3rd biasing triode that the second biasing triode provides offset signal for driving triode; Also be included as second biasing voltage signal that the second biasing triode provides; And be the 3rd biasing voltage signal that the 3rd biasing triode provides, said second biasing voltage signal connects the gate terminal of the second biasing triode, and said the 3rd biasing voltage signal connects the gate terminal of the 3rd biasing triode; The source terminal ground connection of said driving triode, gate terminal are for driving input end; The source terminal of the drain electrode termination second biasing triode of said driving triode, the drain electrode end of the said second biasing triode is connected with the drain electrode end common drain of the 3rd biasing triode, and its points of common connection is a drive output; The source terminal of said the 3rd biasing triode is electrically connected with power input.
Further; Said power output stage; Comprise pliotron; The gate terminal of said pliotron is input end, source electrode termination power input, the feedback resistance ground connection of drain electrode end through being made up of first feedback resistance and the series connection of second feedback resistance of power output stage, and the points of common connection of said first feedback resistance and second feedback resistance is a feedback end, and the drain electrode end of said pliotron and the points of common connection of feedback resistance are power output end.
Further, the two ends of said feedback resistance are parallel with filter capacitor.
Compared with prior art; The beneficial effect of present technique scheme is: drive output input impedance over the ground is Z1, and drive output is to the input impedance Z2 of power input, because drive output input impedance Z1 over the ground has two triodes to form the cascodes amplifier; And drive output is a triode to the input impedance Z2 of power input; Therefore, drive output input impedance over the ground is that Z1 is far longer than the input impedance Z2 of drive output to power input, when power input VIN has the variation of a Δ V; The change in voltage of drive output XO is Δ V* (Z1/ (Z1+Z2)); Then the change in voltage of drive output XO approximates Δ V, and then the gate source voltage of pliotron is the voltage that the voltage of VIN deducts XO, and its variable quantity approximates zero; The electric current of pliotron does not have significant change, makes power supply suppress to be improved.
In order to solve the problems of the technologies described above; Another technical scheme of the utility model is: a kind of low pressure difference linear voltage regulator comprises power output stage, and for power output stage the power drive level of drive signal is provided; Said power drive level; Comprise the driving triode, and the second biasing triode of offset signal is provided, also be included as second biasing voltage signal that the second biasing triode provides for driving triode; Said second biasing voltage signal connects the gate terminal of the second biasing triode; The source terminal ground connection of said driving triode, gate terminal are the driving input end, the source terminal of the drain electrode termination second biasing triode of said driving triode, and the drain electrode end of the said second biasing triode connects power input through pull-up resistor; The points of common connection of said second biasing triode and pull-up resistor is a drive output, and the resistance value of said pull-up resistor is far smaller than the resistance value of drive output input impedance over the ground.
Further; Said power output stage; Comprise pliotron; The gate terminal of said pliotron is input end, source electrode termination power input, the feedback resistance ground connection of drain electrode end through being made up of first feedback resistance and the series connection of second feedback resistance of power output stage, and the points of common connection of said first feedback resistance and second feedback resistance is a feedback end, and the drain electrode end of said pliotron and the points of common connection of feedback resistance are power output end.
Further, the two ends of said feedback resistance are parallel with filter capacitor.
Compared with prior art; The beneficial effect of present technique scheme is: drive output input impedance Z1 over the ground; Drive output is the resistance value of pull-up resistor to the input impedance Z2 of power input; Because the resistance value of pull-up resistor is far smaller than drive output input impedance Z2 over the ground, therefore, drive output input impedance Z1 over the ground is far longer than the input impedance Z2 of drive output to power input.
When power input VIN has the variation of a Δ V; The change in voltage of drive output XO is Δ V* (Z1/ (Z1+Z2)); Then the change in voltage of drive output XO approximates Δ V, and then the gate source voltage of pliotron is the voltage that the voltage of power input VIN deducts drive output XO, and its variable quantity approximates zero; The electric current of pliotron does not have significant change, makes power supply suppress to be improved.
Description of drawings
Fig. 1 is the circuit theory diagrams of the power drive level of prior art;
Fig. 2 is the circuit theory diagrams of the power drive level of the utility model low pressure difference linear voltage regulator embodiment 1;
Fig. 3 is the utility model low pressure difference linear voltage regulator embodiment 1 circuit theory diagrams;
Fig. 4 is the circuit theory diagrams of the power drive level of the utility model low pressure difference linear voltage regulator embodiment 2;
Fig. 5 is the circuit theory diagrams of the utility model low pressure difference linear voltage regulator embodiment 2.
Prior art diagram: M6 ', driving triode, TB3 ', biasing triode, VB3 ', biasing voltage signal, VIN ', power input, XO ', drive output, YI ', driving input end.
The utility model diagram: 1, band-gap reference module, 2, the error amplifier stage, 3, the power drive level, 4, power output stage, VIN, power input; VO, power output end, VB1, first biasing voltage signal, VB2, second biasing voltage signal, VB3, the 3rd biasing voltage signal, TB1, the first biasing triode; TB2, the second biasing triode, TB3, the 3rd biasing triode, M1, first triode, M2, second triode; M3, the 3rd triode, M4, the 4th triode, M6, driving triode, M7, pliotron, R1, pull-up resistor; RF1, first feedback resistance, RF2, second feedback resistance, C0, filter capacitor, CC, feed-forward capacitance, VF, feedback end; K, feedforward end, XI, power input end, XO, drive output, YI, driving input end, YO, error output terminal; BIN, band-gap reference input end, VREF, band-gap reference output terminal, GND, hold the positive terminal of V+, difference input, the negative pole end of V-, difference input.
Embodiment
Below in conjunction with accompanying drawing the utility model is described in detail:
Shown in Fig. 2-3, the utility model low pressure difference linear voltage regulator comprises power input VIN; Power output end VO; Power output stage 4 is the output unit of low pressure difference linear voltage regulator, comprises power input end XI, feedback end VF and power take-off, and its power take-off is said power output end VO; Power drive level 3 for power output stage 4 provides drive voltage signal, comprises driving input end YI and drive output XO that said drive output XO meets the power input end XI of power output stage 4; Error amplifier stage 2; Comprise the positive terminal V+ of difference input, the negative pole end V-and the error output terminal YO of difference input; Said error output terminal YO is electrically connected with the driving input end YI of said power drive level 3, and the negative pole end V-of said difference input is electrically connected with the feedback end VF of power output stage 4; Band-gap reference module 1; Comprise band-gap reference input end BIN, band-gap reference output terminal VERF, hold GND; Said band-gap reference input end BIN is electrically connected with said power input VIN; Said band-gap reference output terminal VERF is electrically connected with the positive terminal V+ of the difference input of said error amplifier stage 2, holds GND ground connection saidly.
Wherein, the gate terminal of the first triode M1 is the positive terminal V+ of difference input, and the gate terminal of the said second triode M2 is the negative pole end V-of difference input;
The said first triode M1 is with after the second triode M2 common source terminal is connected, and the drain electrode end of its common point and the first biasing triode TB1 is electrically connected, said first setover triode TB1 source electrode termination power input VIN;
The drain electrode end of the said first triode M1 is electrically connected drain electrode end and the gate terminal of the 3rd triode M3 respectively; Said the 3rd triode M3 source terminal is connected with the source terminal of the 4th triode M4 altogether, the gate terminal common gate connects; The drain electrode end of the drain electrode end of said the 4th triode M4 and the second triode M2 is that common drain is connected, and its points of common connection is error output terminal YO;
The drain electrode end of the said first triode M1, with the drain electrode end of the 3rd triode M3 and the points of common connection of gate terminal be the feedforward end K of error amplifier.
Preferably, error amplifier also comprises feedforward end K, and said feedback resistance is electrically connected with said feedforward end K through feed-forward capacitance CC with the points of common connection of the drain electrode end of pliotron M7, forms feedforward path, is used to improve the frequency response characteristic of LDO.Wherein, the drain electrode end of the first triode M1, with the drain electrode end of the 3rd triode M3 and the points of common connection of gate terminal be the feedforward end K of error amplifier.
Power output stage; Comprise pliotron M7; The gate terminal of said pliotron M7 is that input end XI, the source terminal of power output stage is power input VIN, the feedback resistance ground connection of drain electrode end through being made up of the first feedback resistance RF1 and second feedback resistance RF2 series connection; The points of common connection of the said first feedback resistance RF1 and the second feedback resistance RF2 is feedback end F; Said feedback end F meets the feedback voltage input end VF of error amplifier, and said feedback resistance two ends are parallel with filter capacitor C0.Filter capacitor C0 is used for the ripple signal of filtering output terminal.
Compared with prior art; The beneficial effect of present technique scheme is: drive output input impedance over the ground is Z1; Drive output is to the input impedance Z2 of power input, because drive output input impedance Z1 over the ground has two triodes to form the cascodes amplifiers, and drive output is a triode to the input impedance Z2 of power input; Therefore, drive output input impedance over the ground is that Z1 is far longer than the input impedance Z2 of drive output to power input.When power input VIN has the variation of a Δ V; Then the change in voltage of drive output XO is Δ V* (Z1/ (Z1+Z2)); Then the change in voltage of drive output XO approximates Δ V, and then the gate source voltage of pliotron is the voltage that the voltage of power input VIN deducts drive output XO, and its variable quantity approximates zero; The electric current of pliotron does not have significant change, makes power supply suppress to be improved.
Shown in Fig. 4-5, present embodiment 2 is improvement of carrying out on the basis of embodiment 1, and its difference technical characterictic is: with the biasing of the 3rd among the embodiment 1 triode TB3 replacement pull-up resistor R1.It is power drive level 3; Comprise and drive triode M6; And be to drive the second biasing triode TB2 that triode M6 provides offset signal; Also be included as the second biasing voltage signal VB2 that the second biasing triode TB2 provides; The said second biasing voltage signal VB2 connects the gate terminal of the second biasing triode TB2, and the source terminal ground connection of said driving triode M6, gate terminal are for driving input end YI, the source terminal of the drain electrode termination second biasing triode TB2 of said driving triode M6; The drain electrode end of the said second biasing triode TB2 meets power input VIN through pull-up resistor R1, and the points of common connection of said second biasing triode TB2 and pull-up resistor R1 is drive output XO.
Drive output XO input impedance Z1 over the ground; Drive output XO is the resistance value of pull-up resistor R1 to the input impedance Z2 of power input VIN; Because the resistance value of pull-up resistor R1 is far smaller than drive output XO input impedance Z1 over the ground; Therefore, drive output input impedance Z1 over the ground is far longer than the input impedance Z2 of drive output to power input.
When power input VIN has the variation of a Δ V; The change in voltage of drive output XO is Δ V* (Z1/ (Z1+Z2)); Then the change in voltage of drive output XO approximates Δ V, and then the gate source voltage of pliotron is the voltage that the voltage of power input VIN deducts drive output XO, and its variable quantity approximates zero; The electric current of pliotron does not have significant change, makes power supply suppress to be improved.
The power supply that present embodiment 2 can not only improve LDO suppresses, and when the power output end VO of LDO load is underloading, can also reduce power consumption.Promptly when underloading, the voltage of the power take-off XO of power drive level 3 can be very high, even near VIN.If have the triode TB3 ' of biasing in the employing prior art, the electric current of power drive level 3 is fixed so; And if adopt pull-up resistor R1; Then the electric current of power drive level 3 is along with the voltage of power take-off XO more and more diminishes near power input VIN; The current value of its power take-off XO is (VIN-VXO)/R1, and wherein VXO is the magnitude of voltage of power take-off XO.For the gain of guaranteed output driving stage under heavy duty suitable with embodiment 1; The pull-up resistance values of getting can not make the current ratio embodiment 1 of power drive level under the heavy duty that remarkable reduction is arranged; But owing to be under heavy duty; The power itself that is load is just very big, so the electric current of power drive level is much smaller than load current, and the electric current of power drive level reduces obviously to influence efficient; But under underloading, the power of load is little, and the electric current of power drive level 3 can reduce automatically to comparing mutually with the power of LDO, and then the power of whole LDO will descend, and efficient is improved.
Above embodiment 1 and embodiment 2, the grid voltage of pliotron M7 can follow power input VIN and change, thereby make pliotron M7 gate source voltage not with the power-supply fluctuation of power input VIN, keep the electric current of pliotron M7 constant.Therefore, the power supply of the utility model low pressure difference linear voltage regulator suppresses higher.
Wherein, embodiment 2 is also advantageous in that: when load current diminishes, the grid voltage of P type pliotron M7 to the voltage of power input VIN near, the electric current of pull-up resistor R1 can also diminish, the quiescent current of LDO obtains Automatic Optimal.
First triode M1 in the error amplifier stage 2 and the breadth length ratio of the second triode M2 are greater than the breadth length ratio of the 3rd triode M3 and the 4th triode M4.Adopt this kind structure, the output noise that reduces the error amplifier stage can be arranged.
The utility model, pliotron M7 adopt P type pliotron, but are not limited to P type pliotron, also can adopt N type pliotron, only need to make corresponding modification in the power drive level.
Claims (6)
1. low pressure difference linear voltage regulator; Comprise power output stage (4); And be the power drive level (3) that power output stage (4) provides drive signal, it is characterized in that: said power drive level (3) comprises driving triode (M6); And be to drive the second biasing triode (TB2) that triode (M6) provides offset signal; And be the 3rd biasing triode (TB3) that the second biasing triode (TB2) provides offset signal, also be included as second biasing voltage signal (VB2) that the second biasing triode (TB2) provides, and be the 3rd biasing voltage signal (VB3) that the 3rd biasing triode (TB3) provides; Said second biasing voltage signal (VB2) connects the gate terminal of the second biasing triode (TB2); Said the 3rd biasing voltage signal (VB3) connects the gate terminal of the 3rd biasing triode (TB3), and the source terminal ground connection of said driving triode (M6), gate terminal are for driving input end (YI), the source terminal of the drain electrode termination second biasing triode (TB2) of said driving triode (M6); The drain electrode end of the said second biasing triode (TB2) is connected with the drain electrode end common drain of the 3rd biasing triode (TB3), and its points of common connection is drive output (XO); The source terminal of said the 3rd biasing triode (TB3) is electrically connected with power input (VIN).
2. low pressure difference linear voltage regulator according to claim 1; It is characterized in that: said power output stage (4); Comprise pliotron (M7); The gate terminal of said pliotron (M7) is input end (XI), source electrode termination power input (VIN), the feedback resistance ground connection of drain electrode end through being made up of first feedback resistance (RF1) and second feedback resistance (RF2) series connection of power output stage (4); The points of common connection of said first feedback resistance (RF1) and second feedback resistance (RF2) is feedback end (VF), and the drain electrode end of said pliotron (M7) and the points of common connection of feedback resistance are power output end (VO).
3. low pressure difference linear voltage regulator according to claim 3 is characterized in that: the two ends of said feedback resistance are parallel with filter capacitor (C0).
4. low pressure difference linear voltage regulator; Comprise power output stage (4); And be the power drive level (3) that power output stage (4) provides drive signal; It is characterized in that: said power drive level (3) comprises driving triode (M6), and for driving triode (M6) the second biasing triode (TB2) of offset signal is provided; Also be included as second biasing voltage signal (VB2) that the second biasing triode (TB2) provides; Said second biasing voltage signal (VB2) connects the gate terminal of the second biasing triode (TB2), and the source terminal ground connection of said driving triode (M6), gate terminal are for driving input end (YI), the source terminal of the drain electrode termination second biasing triode (TB2) of said driving triode (M6); The drain electrode end of the said second biasing triode (TB2) connects power input (VIN) through pull-up resistor (R1), and the said second biasing triode (TB2) is drive output (XO) with the points of common connection of pull-up resistor (R1); Wherein, the impedance of pull-up resistor (R1) is far smaller than drive output (XO) input impedance over the ground.
5. low pressure difference linear voltage regulator according to claim 4; It is characterized in that: said power output stage (4); Comprise pliotron (M7); The gate terminal of said pliotron (M7) is input end (XI), source electrode termination power input (VIN), the feedback resistance ground connection of drain electrode end through being made up of first feedback resistance (RF1) and second feedback resistance (RF2) series connection of power output stage (4); The points of common connection of said first feedback resistance (RF1) and second feedback resistance (RF2) is feedback end (VF), and the drain electrode end of said pliotron (M7) and the points of common connection of feedback resistance are power output end (VO).
6. low pressure difference linear voltage regulator according to claim 5 is characterized in that: the two ends of said feedback resistance are parallel with filter capacitor (C0).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2011202149582U CN202183059U (en) | 2011-06-23 | 2011-06-23 | Low-dropout linear voltage regulator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2011202149582U CN202183059U (en) | 2011-06-23 | 2011-06-23 | Low-dropout linear voltage regulator |
Publications (1)
Publication Number | Publication Date |
---|---|
CN202183059U true CN202183059U (en) | 2012-04-04 |
Family
ID=46176089
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2011202149582U Expired - Lifetime CN202183059U (en) | 2011-06-23 | 2011-06-23 | Low-dropout linear voltage regulator |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN202183059U (en) |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103149963A (en) * | 2012-11-15 | 2013-06-12 | 长沙景嘉微电子股份有限公司 | Linear power circuit with high power supply rejection ratio |
CN103513688A (en) * | 2013-08-29 | 2014-01-15 | 上海宏力半导体制造有限公司 | Low dropout linear regulator |
CN104881072A (en) * | 2015-05-22 | 2015-09-02 | 无锡中星微电子有限公司 | Low-dropout voltage regulator and power supply system |
CN104950968A (en) * | 2014-03-24 | 2015-09-30 | 奇景光电股份有限公司 | Low-dropout linear voltage regulator |
CN105005351A (en) * | 2015-07-23 | 2015-10-28 | 中山大学 | Cascode fully integrated low-dropout linear voltage regulator circuit |
CN105099392A (en) * | 2014-05-15 | 2015-11-25 | 西安阿普莱特光电科技有限公司 | Full-frequency noise signal filter |
CN107037850A (en) * | 2016-02-03 | 2017-08-11 | 意法设计与应用股份有限公司 | Voltage regulator with improved linear regulation transient response |
CN110346827A (en) * | 2019-08-26 | 2019-10-18 | 中国科学院新疆理化技术研究所 | A kind of novel dosage detection method based on LDO |
CN112558668A (en) * | 2020-12-08 | 2021-03-26 | 大连民族大学 | LDO circuit based on chopping technology |
-
2011
- 2011-06-23 CN CN2011202149582U patent/CN202183059U/en not_active Expired - Lifetime
Cited By (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103149963B (en) * | 2012-11-15 | 2014-09-03 | 长沙景嘉微电子股份有限公司 | Linear power circuit with high power supply rejection ratio |
CN103149963A (en) * | 2012-11-15 | 2013-06-12 | 长沙景嘉微电子股份有限公司 | Linear power circuit with high power supply rejection ratio |
CN103513688B (en) * | 2013-08-29 | 2016-03-23 | 上海华虹宏力半导体制造有限公司 | Low pressure difference linear voltage regulator |
CN103513688A (en) * | 2013-08-29 | 2014-01-15 | 上海宏力半导体制造有限公司 | Low dropout linear regulator |
CN104950968A (en) * | 2014-03-24 | 2015-09-30 | 奇景光电股份有限公司 | Low-dropout linear voltage regulator |
CN104950968B (en) * | 2014-03-24 | 2016-08-31 | 奇景光电股份有限公司 | Low pressure difference linear voltage regulator |
CN105099392A (en) * | 2014-05-15 | 2015-11-25 | 西安阿普莱特光电科技有限公司 | Full-frequency noise signal filter |
CN104881072A (en) * | 2015-05-22 | 2015-09-02 | 无锡中星微电子有限公司 | Low-dropout voltage regulator and power supply system |
CN105005351A (en) * | 2015-07-23 | 2015-10-28 | 中山大学 | Cascode fully integrated low-dropout linear voltage regulator circuit |
CN107037850A (en) * | 2016-02-03 | 2017-08-11 | 意法设计与应用股份有限公司 | Voltage regulator with improved linear regulation transient response |
CN107037850B (en) * | 2016-02-03 | 2018-09-21 | 意法设计与应用股份有限公司 | Voltage regulator with improved linear regulation transient response |
CN110346827A (en) * | 2019-08-26 | 2019-10-18 | 中国科学院新疆理化技术研究所 | A kind of novel dosage detection method based on LDO |
CN112558668A (en) * | 2020-12-08 | 2021-03-26 | 大连民族大学 | LDO circuit based on chopping technology |
CN112558668B (en) * | 2020-12-08 | 2022-05-20 | 大连民族大学 | LDO circuit based on chopping technology |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN202183059U (en) | Low-dropout linear voltage regulator | |
CN101714817B (en) | Voltage converter with line loss compensation | |
CN102830742B (en) | Linear stabilizer with low pressure difference | |
CN105094193B (en) | Low-dropout regulator | |
CN105652945B (en) | Low dropout regulator | |
CN103838286A (en) | Low dropout linear regulator with quick transient response and high stability | |
CN103412602B (en) | Non-capacitive low-dropout linear voltage regulator | |
CN103399607A (en) | High-PSR (high power supply rejection) low-dropout regulator with slew rate enhancement circuit integrated thereto | |
CN106094966B (en) | A kind of linear voltage regulator of wideband high PSRR | |
CN103092241A (en) | Mixed compensating type high-stability LDO (low-dropout regulator) chip circuit | |
CN103838287A (en) | Linear voltage regulator for compensation zero point dynamic adjustment | |
CN202067171U (en) | Low dropout linear regulator | |
CN104699153A (en) | Low-dropout linear regulator | |
CN103389763A (en) | Low dropout regulator (LDO) and power supply rejection ratio (PSRR) improving method thereof | |
CN104333239A (en) | High-efficiency totally-integrated AC-DC converter | |
CN103631299B (en) | A kind of constant pressure difference, variable output voltage low pressure difference linear voltage regulator | |
CN103441741A (en) | Operational amplifying circuit structure reducing offset voltage based on band-gap reference | |
CN103176494B (en) | Voltage-controlled zero compensating circuit | |
CN201936213U (en) | Low tension voltage stabilizer | |
CN205375256U (en) | Low output current LDO circuit that Q value was adjusted suitable for power management | |
CN103713679B (en) | A kind of LDO circuit based on discrete component | |
CN202711104U (en) | Low Dropout Regulator | |
CN101763134A (en) | Parallel voltage stabilizing circuit | |
CN203406849U (en) | Buffer circuit with high speed and high precision | |
CN204576328U (en) | A kind of low-power consumption linear voltage regulator adopting novel corrective network |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CX01 | Expiry of patent term | ||
CX01 | Expiry of patent term |
Granted publication date: 20120404 |