CN203340408U - A patterned ceramic layer printed circuit substrate for optical and electronic devices - Google Patents
A patterned ceramic layer printed circuit substrate for optical and electronic devices Download PDFInfo
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- CN203340408U CN203340408U CN201320345081XU CN201320345081U CN203340408U CN 203340408 U CN203340408 U CN 203340408U CN 201320345081X U CN201320345081X U CN 201320345081XU CN 201320345081 U CN201320345081 U CN 201320345081U CN 203340408 U CN203340408 U CN 203340408U
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- ceramic layer
- printed circuit
- circuit substrate
- optics
- electronic device
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Abstract
The utility model relates to a patterned ceramic layer printed circuit substrate for optical and electronic devices. The patterned ceramic layer printed circuit substrate comprises a metallic basic body on which a voltage-withstanding ceramic layer is formed. On the voltage-withstanding ceramic layer, patterned heat conductive ceramic layers are deposited and multiple heat conductive isolating pedestals are formed. The patterned ceramic layer printed circuit substrate for optical and electronic devices has the metallic basic body with a larger size and is capable of containing multiple optical and/or electronic devices which have good electrical isolation and thermal insulation.
Description
Technical field
The utility model belongs to electronic technology field, and in particular, the utility model relates to a kind of ceramic layer of the patterning for optics and electronic device printed circuit substrate.
Background technology
For the device of optics and/or electronics, as integrated circuit or laser diode all need to utilize heat conducting material to be conducted heat.Need to adopt metallic matrix for this reason, as the copper matrix, and often need the electricity isolation between the device of described optics and/or electronics and metallic matrix.And some ceramic material has higher heat conduction efficiency and electricity is insulated.The ceramic material that for this reason between the device of be everlasting optics and/or electronics and metallic matrix, uses high heat conduction is as for providing electricity isolation and the conductive intermediate materials of maintaining heat still.For the efficient heat transfer from the device of optics and/or electronics to metallic matrix is provided, it is essential that good hot interface is provided between pottery and metallic matrix.
And, in increasing application, a plurality of optics and/or electronic device need to be coupled in the functional structure with electricity isolation and heat conduction.And, in order to hold a plurality of optics and/or electronic device, need to use larger sized basis material, for example need to use larger metallic matrix and ceramic wafer.If yet, when described a plurality of optics and/or electronic device being coupled on the ceramic component at single interface, between the optics of each coupling and/or electronic device, will cause difficult heat transfer, and may cause electrically conduction and be short-circuited.For this reason, need between a plurality of optics and/or electronic device, provide electricity isolation and heat isolation.
The utility model content
In order to solve above-mentioned technical problem of the prior art, the purpose of this utility model is to provide a kind of ceramic layer of the patterning for optics and electronic device printed circuit substrate.
To achieve these goals, the utility model has adopted following technical scheme:
The utility model relates to a kind of ceramic layer of the patterning for optics and electronic device printed circuit substrate, comprise metallic matrix, be formed with withstand voltage ceramic layer on described metallic matrix, the thermal conductive ceramic layer of deposit patterned on described withstand voltage ceramic layer, and form a plurality of heat conduction isolation pedestals.
Wherein, the thickness of described withstand voltage ceramic layer is 10-500 um; Described withstand voltage ceramic layer is selected from aluminium oxide, one or more in aluminum oxynitride or carborundum.
Wherein, described withstand voltage ceramic layer is by sputter, electric arc evaporation, chemical vapour deposition (CVD), plasma reinforced chemical vapour deposition or powder sintered preparing.
Wherein, the thickness of described thermal conductive ceramic layer is 10-500 um; And described thermal conductive ceramic layer is selected from AlN, AlON or SiN.
Wherein, described thermal conductive ceramic layer is by the PVD method, and for example magnetron sputtering or electric arc evaporation coating method prepare.
Wherein, there is transition zone between described metallic matrix and withstand voltage ceramic layer.
Wherein, there is the active soldering layer between described metallic matrix and withstand voltage ceramic layer.
The technical solution of the utility model has following beneficial effect compared to existing technology:
(1) ceramic layer of the patterning for optics and electronic device printed circuit substrate described in the utility model, there is larger sized metal substrate, and can hold a plurality of optics and/or electronic device, and there is good electricity isolation and heat isolation between described a plurality of optics and/or electronic device.
(2) ceramic layer of the patterning for optics and electronic device printed circuit substrate described in the utility model, described thermal conductive ceramic layer can be realized effectively heat conduction and shift, solve the heat dissipation problem of optics and/or electronic unit.
(3) ceramic layer of the MULTILAYER COMPOSITE for optics and electronic device pattern structure substrate described in the utility model, can on described isolation pedestal, form the metallic circuit layer as required, described metallic circuit layer can be by depositing metal layers on the thermal conductive ceramic layer, and then dry ecthing forms; Also can after forming, the isolation pedestal form by deposition or coating.
The accompanying drawing explanation
The schematic diagram that Fig. 1 is the described ceramic layer of the patterning for optics and electronic device of embodiment 1 printed circuit substrate.
The schematic diagram that Fig. 2 is the described ceramic layer of the patterning for optics and electronic device of embodiment 2 printed circuit substrate.
The schematic diagram that Fig. 3 is the described ceramic layer of the patterning for optics and electronic device of embodiment 3 printed circuit substrate.
Embodiment
embodiment 1
As shown in Figure 1, the described ceramic layer of the patterning for optics and electronic device of the present embodiment printed circuit substrate, comprise aluminum or aluminum alloy matrix 10, on described matrix 10, is formed with successively Al
2o
3withstand voltage ceramic layer 20, and on described withstand voltage ceramic layer 20, utilize the magnetron sputtering deposition method by the AlN thermal conductive ceramic layer 30 of baffle plate deposit patterned, and form a plurality of heat conduction isolation pedestals 50.Described AlN thermal conductive ceramic layer adopts following technique to prepare, and target is the aluminium nitride ceramics target, by suction to 5.0 in sputtering chamber * 10
-4pa, pass into to vacuum coating is indoor the Ar that purity is 99.99%, flow 200sccm, and to keep the indoor working vacuum degree of vacuum coating be 800Pa, opens a pair of intermediate frequency shielding power supply with aluminium nitride ceramics target sputter cathode, power 10 kW; Open grid bias power supply simultaneously, grid bias power supply is the high-frequency impulse grid bias power supply, voltage 200V, frequency 20kHz, duty ratio 80% replaces, and the substrate deposition temperature remains on 420-450 ℃, is provided with a plurality of baffle plates between target and unplated piece, thereby form the AlN thermal conductive ceramic layer of patterning, deposit thickness is 200 nm.The described structure of the present embodiment can be for electronic devices such as the optics such as LED etc. or wiring boards, and can be on single metal substrate a plurality of optics of intensive laying and/or electronic device, and needn't worry heat conduction and the conductivity between described a plurality of optics and/or electronic device.
embodiment 2
As shown in Figure 2, the described ceramic layer of the patterning for optics and electronic device of the present embodiment printed circuit substrate, comprise aluminum or aluminum alloy matrix 10, on described matrix 10, is formed with successively Al
2o
3withstand voltage ceramic layer 20, and on described withstand voltage ceramic layer 20, utilize the magnetron sputtering deposition method by the AlN thermal conductive ceramic layer 30 of baffle plate deposit patterned, and form a plurality of heat conduction isolation pedestals 50; And there is aluminium transition zone 60 between described matrix 10 and withstand voltage ceramic layer 20.Described AlN thermal conductive ceramic layer adopts following technique to prepare, and target is the aluminium nitride ceramics target, by suction to 5.0 in sputtering chamber * 10
-4pa, pass into to vacuum coating is indoor the Ar that purity is 99.99%, flow 200sccm, and to keep the indoor working vacuum degree of vacuum coating be 800Pa, opens a pair of intermediate frequency shielding power supply with aluminium nitride ceramics target sputter cathode, power 10 kW; Open grid bias power supply simultaneously, grid bias power supply is the high-frequency impulse grid bias power supply, voltage 200V, frequency 20kHz, duty ratio 80% replaces, and the substrate deposition temperature remains on 420-450 ℃, is provided with a plurality of baffle plates between target and unplated piece, thereby form the AlN thermal conductive ceramic layer of patterning, deposit thickness is 200 nm.The described structure of the present embodiment can be for electronic devices such as the optics such as LED etc. or wiring boards, and can be on single metal substrate a plurality of optics of intensive laying and/or electronic device, and needn't worry heat conduction and the conductivity between described a plurality of optics and/or electronic device.
embodiment 3
As shown in Figure 3, the described ceramic layer of the patterning for optics and electronic device of the present embodiment printed circuit substrate, comprise aluminum or aluminum alloy matrix 10, on described matrix 10, is formed with successively Al
2o
3withstand voltage ceramic layer 20, and on described withstand voltage ceramic layer 20, utilize the magnetron sputtering deposition method by the AlN thermal conductive ceramic layer 30 of baffle plate deposit patterned, and form a plurality of heat conduction isolation pedestals 50; And there is active soldering layer 70 between described matrix 10 and withstand voltage ceramic layer 20.Described AlN thermal conductive ceramic layer adopts following technique to prepare, and target is the aluminium nitride ceramics target, by suction to 5.0 in sputtering chamber * 10
-4pa, pass into to vacuum coating is indoor the Ar that purity is 99.99%, flow 200sccm, and to keep the indoor working vacuum degree of vacuum coating be 800Pa, opens a pair of intermediate frequency shielding power supply with aluminium nitride ceramics target sputter cathode, power 10 kW; Open grid bias power supply simultaneously, grid bias power supply is the high-frequency impulse grid bias power supply, voltage 200V, frequency 20kHz, duty ratio 80% replaces, and the substrate deposition temperature remains on 420-450 ℃, is provided with a plurality of baffle plates between target and unplated piece, thereby form the AlN thermal conductive ceramic layer of patterning, deposit thickness is 200 nm.The described structure of the present embodiment can be for electronic devices such as the optics such as LED etc. or wiring boards, and can be on single metal substrate a plurality of optics of intensive laying and/or electronic device, and needn't worry heat conduction and the conductivity between described a plurality of optics and/or electronic device.
For the ordinary skill in the art, be to be understood that and can not breaking away from the utility model scope of disclosure, can adopt to be equal to and replace or equivalent transformation form enforcement above-described embodiment.Protection range of the present utility model is not limited to the specific embodiment of embodiment part, as long as no the execution mode that breaks away from utility model essence, within all being interpreted as dropping on the protection range of the utility model requirement.
Claims (5)
1. the ceramic layer of the patterning for an optics and electronic device printed circuit substrate, comprise metallic matrix, it is characterized in that being formed with withstand voltage ceramic layer on described metallic matrix, the thermal conductive ceramic layer of deposit patterned on described withstand voltage ceramic layer, and form a plurality of heat conduction isolation pedestals.
2. the ceramic layer of the patterning for optics and electronic device printed circuit substrate according to claim 1, the thickness that it is characterized in that described withstand voltage ceramic layer is 10-500 um.
3. the ceramic layer of the patterning for optics and electronic device printed circuit substrate according to claim 1 and 2, the thickness that it is characterized in that described thermal conductive ceramic layer is 10-500 um.
4. the ceramic layer of the patterning for optics and electronic device printed circuit substrate according to claim 1, is characterized in that having transition zone between described metallic matrix and withstand voltage ceramic layer.
5. the ceramic layer of the patterning for optics and electronic device printed circuit substrate according to claim 1, is characterized in that having the active soldering layer between described metallic matrix and withstand voltage ceramic layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320345081XU CN203340408U (en) | 2013-06-17 | 2013-06-17 | A patterned ceramic layer printed circuit substrate for optical and electronic devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320345081XU CN203340408U (en) | 2013-06-17 | 2013-06-17 | A patterned ceramic layer printed circuit substrate for optical and electronic devices |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203340408U true CN203340408U (en) | 2013-12-11 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320345081XU Expired - Fee Related CN203340408U (en) | 2013-06-17 | 2013-06-17 | A patterned ceramic layer printed circuit substrate for optical and electronic devices |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203340408U (en) |
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2013
- 2013-06-17 CN CN201320345081XU patent/CN203340408U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C56 | Change in the name or address of the patentee |
Owner name: SUZHOU JINGPIN ADVANCED MATERIALS CO., LTD. Free format text: FORMER NAME: SUZHOU JINGPIN PHOTOELECTRIC TECHNOLOGY CO., LTD. |
|
| CP03 | Change of name, title or address |
Address after: Wujiang District of Suzhou City, Jiangsu province 215200 Lili town FENHU Road No. 558 Patentee after: Suzhou Jing Pin new material limited company Address before: FenHu FenHu Avenue in Wujiang District of Suzhou City, Jiangsu province 215211 No. 558 No. two on the third floor of the building of scientific research innovation park (South) Patentee before: Suzhou Jingpin Optical-Electronical Technology Co., Ltd. |
|
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20131211 Termination date: 20160617 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |