CN203192847U - 发光二极管装置 - Google Patents
发光二极管装置 Download PDFInfo
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- CN203192847U CN203192847U CN2013201300771U CN201320130077U CN203192847U CN 203192847 U CN203192847 U CN 203192847U CN 2013201300771 U CN2013201300771 U CN 2013201300771U CN 201320130077 U CN201320130077 U CN 201320130077U CN 203192847 U CN203192847 U CN 203192847U
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
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Abstract
本实用新型公开了一种发光二极管装置,包括:基板,所述基板包括有与外界电路正负极电连接的第一导电部、第二导电部以及将第一第二导电部绝缘隔开的绝缘部;支架,所述支架形成内凹开口并与所述基板配合形成所述发光二极管装置碗杯结构;发光二极管芯片,所述发光二极管芯片设置在所述基板上,所述发光二极管芯片通过金属引线与所述导电部电连接;并且:所述基板上设置有凹槽,所述发光二极管芯片设置于所述基板凹槽内,所述金属引线为梯形,所述梯形金属引线将所述设置于所述基板凹槽内的发光二极管芯片与位于所述基板凹槽外的导电部电连接。本实用新型发光二极管装置具有可靠性高的优点。
Description
技术领域
本实用新型涉及发光二极管,尤其是涉及一种可靠性高的发光二极管装置。
背景技术
发光二极管(Light Emitting Diode,LED)作为一种绿色光源,具有发光效率高、耗电量少、使用寿命长、安全可靠和有利于环保的优点,被广泛应用于照明和背光领域。随着科技的发展,人们对发光二极管装置的要求也越来越高,LED装置的可靠性也越来越受到人们的关注。
现有技术的LED,如图1所示,包括基板1,支架2,LED芯片3及荧光胶4,支架2和基板构成LED碗杯结构,基板1上设置有与外部电路电连接的金属导电部。产品为提升亮度基本都采用二阶碗杯结构,即在基板1上设置凹槽,形成二阶碗杯,LED芯片3设置于基板1凹槽内,基板1凹槽内的LED芯片3通过金属引线与基板1上金属导电部电连接,如图1中Ⅰ部分所示,由于金属引线本身硬度不强(线径较细的原因)和线弧过长的特点,使得在实际生产中容易出现金属引线受力(如灌胶或震动)凹陷的现象,后期用户使用也存在由于外力或温度变化产生应力致使金属引线变形塌线,从而接触LED金属导电部形成短路,对发光二极管可靠性造成影响。
因此,有必要提供一种改进,以克服现有技术发光二极管装置的缺陷。
实用新型内容
本实用新型所要解决的技术问题是提供一种可靠性高的发光二极管装置。
为了实现上述目的,本实用新型采用以下技术方案:一种发光二极管装置,包括:基板,所述基板包括有与外界电路正负极电连接的第一导电部、第二导电部以及将第一第二导电部绝缘隔开的绝缘部;支架,所述支架形成内凹开口并与所述基板配合形成所述发光二极管装置碗杯结构;发光二极管芯片,所述发光二极管芯片设置在所述基板上,所述发光二极管芯片通过金属引线与所述导电部电连接;荧光胶,所述荧光胶包覆所述发光二极管芯片,并填充所述发光二极管碗杯结构;并且:所述基板上设置有凹槽,所述发光二极管芯片设置于所述基板凹槽内,所述金属引线为梯形,所述梯形金属引线将所述设置于所述基板凹槽内的发光二极管芯片与位于所述基板凹槽外的导电部电连接。
作为一种优选的技术方案,所述导电部为金属,所述发光二极管芯片固定于所述第一导电部,所述第一导电部对应所述发光二极管芯片固定位置设置有凹槽。
作为另一种优选的技术方案,所述绝缘部与所述基板凹槽相邻设置。
作为可能的技术方案,所述发光二极管芯片为平行电极芯片或垂直电极芯片。
本实用新型发光二极管装置,采用梯形金属引线将发光二极管芯片与导电部电连接,提高了金属引线的线弧与导电部之间的高度,减少了因金属引线塌陷导致的短路现象,提高了发光二极管装置的可靠性,同时,采用梯形金属引线,有效降低了线弧的整体高度,有利于产品的小型化设计。
附图说明
图1为传统结构发光二极管装置剖视图。
图2为本实用新型发光二极管装置一个实施例剖视图。
图3为本实用新型发光二极管装置另一个实施例剖视图。
具体实施方式
下面结合附图,详细说明本实用新型发光二极管结构。
如图2所示,本实用新型发光二极管装置,包括:基板,基板包括第一导电部11,第二导电部12及将两个导电部绝缘隔开的绝缘部13;支架2,支架2与基板构成发光二极管碗杯结构;发光二极管芯片3,发光二极管芯片3固定于基板第一导电部11,发光二极管芯片3的两个导电电极分别与第一导电部11和第二导电部12通过金属引线5电连接;荧光胶4,荧光胶4包覆发光二极管芯片3并填充支架2与基板构成的碗杯结构。如图2所示,第一导电部11上设置有凹槽,发光二极管芯片3设置于凹槽内,将发光二极管芯片3与基板导电部电连接的金属引线5为梯形。
本实用新型发光二极管装置,采用金属引线5将发光二极管芯片3与第一导电部11和第二导电部12电连接,金属引线5采用梯形的打线方式,可以提高线弧与导电部之间的高度,减少了金属引线5塌陷导致金属引线5同时与第一第二导电部接触导致短路的可能性,提高了发光二极管装置的可靠性。金属引线5为梯形,从整体上降低了线弧高度,有利于降低发光二极管装置体积,有利于产品的小型化设计。
如图3所示,作为另一种优化的技术方案,金属引线5为梯形的同时,绝缘部13与第一导电部11凹槽相邻设置,该结构的发光二极管装置可以避免金属导线5塌陷产生时导线同时与第一第二导电部接触,进一步避免了短路的发生,提高发光二极管装置的可靠性。
作为一种优选的技术方案,本实用新型发光二极管装置第一导电部11为金属,发光二极管芯片3固定于金属结构的第一导电部11上,可以快速有效地传递热量,提高本实用新型发光二极管装置的散热效果。
作为可能的技术方案,本实用新型发光二极管芯片3可以为平行电极芯片或垂直电极芯片。发光二极管芯片3为平行电极芯片时,通过两条金属引线5分别与第一导电部11和第二导电部电12连接;发光二极管芯片3为垂直电极芯片时,发光二极管芯片3通过直接接触与第一导电部11电连接,通过金属引线5与第二导电部12电连接。
以上仅为本实用新型实施案例而已,并不用于限制本实用新型,但凡本领域普通技术人员根据本实用新型所揭示内容所作的等效修饰或变化,皆应纳入权利要求书中记载的保护范围内。
Claims (4)
1.一种发光二极管装置,包括:
基板,所述基板包括有与外界电路正负极电连接的第一导电部、第二导电部以及将第一第二导电部绝缘隔开的绝缘部;
支架,所述支架形成内凹开口并与所述基板配合形成所述发光二极管装置碗杯结构;
发光二极管芯片,所述发光二极管芯片设置在所述基板上,所述发光二极管芯片通过金属引线与所述导电部电连接;
荧光胶,所述荧光胶包覆所述发光二极管芯片,并填充所述发光二极管碗杯结构;
其特征在于:所述基板上设置有凹槽,所述发光二极管芯片设置于所述基板凹槽内,所述金属引线为梯形,所述梯形金属引线将所述设置于所述基板凹槽内的发光二极管芯片与位于所述基板凹槽外的导电部电连接。
2.根据权利要求1所述的发光二极管装置,其特征在于:所述导电部为金属,所述发光二极管芯片固定于所述第一导电部,所述第一导电部对应所述发光二极管芯片固定位置设置有凹槽。
3.根据权利要求1所述的发光二极管装置,其特征在于:所述绝缘部与所述基板凹槽相邻设置。
4.根据权利要求1所述的发光二极管装置,其特征在于:所述发光二极管芯片为平行电极芯片或垂直电极芯片。
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105914286A (zh) * | 2016-06-30 | 2016-08-31 | 王正作 | 一种多管芯的led封装及其封装方法 |
CN106531866A (zh) * | 2016-12-19 | 2017-03-22 | 东莞中之光电股份有限公司 | 发光二极管封装结构 |
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2013
- 2013-03-21 CN CN2013201300771U patent/CN203192847U/zh not_active Expired - Lifetime
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105914286A (zh) * | 2016-06-30 | 2016-08-31 | 王正作 | 一种多管芯的led封装及其封装方法 |
CN106531866A (zh) * | 2016-12-19 | 2017-03-22 | 东莞中之光电股份有限公司 | 发光二极管封装结构 |
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Address after: 261031 Dongfang Road, Weifang high tech Industrial Development Zone, Shandong, China, No. 268 Patentee after: GOERTEK Inc. Address before: 261031 Dongfang Road, Weifang high tech Industrial Development Zone, Shandong, China, No. 268 Patentee before: Goertek Inc. |
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