CN203038912U - LGA package storage device based on standard of SD/USB2.0/USB3.0 - Google Patents
LGA package storage device based on standard of SD/USB2.0/USB3.0 Download PDFInfo
- Publication number
- CN203038912U CN203038912U CN 201220722294 CN201220722294U CN203038912U CN 203038912 U CN203038912 U CN 203038912U CN 201220722294 CN201220722294 CN 201220722294 CN 201220722294 U CN201220722294 U CN 201220722294U CN 203038912 U CN203038912 U CN 203038912U
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- Prior art keywords
- flash memory
- storage control
- pad
- standard
- memory device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Abstract
The utility model provides an LGA package storage device based on the standard of SD/USB2.0/USB3.0. The LGA package storage device comprises a single-layered and two-sided PCB substrate (2), a NANDFLASH flash memory chip (1) which is based on the single-layered and two-sided PCB substrate (2), and a storage control chip (4) which is located on the PCB substrate (2). Electrical connection points of the NANDFLASH flash memory chip (1) and the memory control chip (4) are respectively welded with flash memory chip pads (21) and storage control pads (24) through metal wires (5) in a one-to-one corresponding manner, wherein the flash memory chip pads (21) and the storage control pads (24) are arranged on the upper surface of the substrate (2). Flash memory pads (210) and SD-USB pin pads (240) are distributed on the lower surface of the substrate (2). Each flash memory pad (210) is electrically connected with each flash memory chip pad (21). Each SD-USB pin pad (240) is electrically connected with each storage control pad (24). According to the utility model, the LGA package storage device based on the standard of SD/USB2.0/USB3.0 has the advantages that the storage device has a flash storage characteristic, has the storage characteristics which meet the standards of SD and USB; SMT surface-mounting can be carried out; and the production process is simplified.
Description
Technical fieldThe utility model relates to semiconductor device, relates in particular to the LGA encapsulation memory device based on the SD/USB2.0/USB3.0 standard.
Background technologyPrior art contact array LGA (land grid array) encapsulates memory device 7
,Referring to Fig. 8, comprise individual layer double sided board PCB 72 and base flash memory wafer 71 thereon, with plain conductor 74 each electric connection point on the flash memory wafer 71 and each pad that is positioned at the PCB upper surface are welded correspondingly, be encapsulating shell 73 with epoxy encapsulation material molded seal again, distributing the pad of LGA standard of array-like electrode contacts to meet the FLASH functional requirement by the PCB lower surface.This kind LGA encapsulation memory device 7 can only be realized single flash memory FLASH function.
Referring to Fig. 9 and Figure 10, prior art safe digital card 8, be SD card (Secure Digital Memory Card), and meet USB standard (comprising USB2.0 and USB3.0 standard) encapsulation memory 9 referring to Figure 10, the profile of described SD card 8 and USB standard packaging memory 9 is card-like, the components and parts that constitute this each memory are contained in the card, card is attached with outward and meets SD or USB corresponding requirements metal pins 81,91, the memory of this version must cooperate suitable with it special-purpose deck, just the read-write of the data that can carry out.This type of structure memory can not be used for SMT and mount, thereby defines its scope of application.Dimensions owing to this type of memory is conditional simultaneously, so the capacity of this each memory is limited.If these memory devices are used for mobile internet device MID(Mobile Internet Device) or during solid-state hard disk SSD products such as (Solid State Disk), must dispose corresponding deck, and can not adopt surface mounting technology SMT(Surface Mounted Technology) mount, both increased the complexity of production cost and technology, and the capacity of memory device is restricted also.
The utility model contentThe technical problems to be solved in the utility model is to avoid above-mentioned the deficiencies in the prior art part and a kind of LGA packaged type memory device based on the SD/USB2.0/USB3.0 standard of part proposition, solve prior art LGA memory device function singleness, encapsulation memory device finite capacity such as SD and problem such as can not SMT mount.
The utility model is to solve the problems of the technologies described above the technical scheme that proposes to be, a kind of LGA encapsulation memory device based on the SD/USB2.0/USB3.0 standard, comprise PCB substrate and base NAND FLASH flash memory wafer thereon that individual layer is two-sided, also comprise the storage control wafer that is positioned on the described PCB substrate; Each electric connection point of described NAND FLASH flash memory wafer and storage control wafer welds correspondingly by flash memory die pads and the storage control pad of plain conductor and upper surface of base plate respectively; Described base lower surface is distributed with flash memory pad and SD-USB pin pad; Each described flash memory pad is electrically connected with each described flash memory die pads; Described SD-USB pin pad is electrically connected with described storage control pad.
When described storage control wafer was SD storage control wafer, then the SD-USB pin pad of described base lower surface was at least 9.
When described storage control wafer was US2.0 storage control wafer, then the SD-USB pin pad of described base lower surface was at least 4.
When described storage control wafer was SD storage control wafer, the SD-USB pin pad of described base lower surface was 5.
The above flash memory pad and SD-USB pin pad are that piecemeal is arranged or staggered.
Compare with prior art, the beneficial effects of the utility model are: make LGA encapsulation memory device not only possess the flash storage characteristics, also have a storage characteristics of symbol SD, USB2.0 or USB3.0 standard; Can be applied to products such as MID, SSD, to replace the combination that traditional SD or USB encapsulation memory device adds special-purpose deck, reduce the volume of product, and can increase the memory capacity of product, can carry out the SMT attachment process, simplify production technology, effectively reduce cost.
Description of drawingsFig. 1 is based on the main cutaway view of looking of orthographic projection of the LGA encapsulation memory device described in the preferred embodiment of LGA encapsulation memory device of SD/USB2.0/USB3.0 standard;
Fig. 2 is the non-encapsulated preceding orthographic projection schematic top plan view of the LGA encapsulation memory device described in the described preferred embodiment;
Fig. 3 is the axonometric projection schematic diagram that its bottom of LGA encapsulation memory device described in the described preferred embodiment makes progress;
Fig. 4 is the orthographic projection elevational schematic view of LGA described in described preferred embodiment encapsulation memory device, and A district is described LGA when encapsulating memory device as USB2.0 standard storage device among the figure, corresponding SD/USB2.0/USB3.0 pad 240;
Fig. 5 is the orthographic projection elevational schematic view of LGA described in described preferred embodiment encapsulation memory device, and B district is described LGA when encapsulating memory device as the memory device of USB3.0 standard among the figure, corresponding SD/USB2.0/USB3.0 pad 240;
Fig. 6 is the orthographic projection elevational schematic view of LGA described in described preferred embodiment encapsulation memory device, and C district is described LGA when encapsulating memory device as the SD memory device among the figure, corresponding SD/USB2.0/USB3.0 pad 240;
Fig. 7 is the orthographic projection elevational schematic view of LGA described in described preferred embodiment encapsulation memory device, and D portion is described LGA encapsulation memory device during as the FLASH memory device among the figure, corresponding flash memory pad 210;
Fig. 8 is the main cross-sectional schematic of looking of orthographic projection of prior art contact array LGA encapsulation memory device 7;
Fig. 9 is the main schematic diagram of looking of the orthographic projection of prior art SD card 8;
Figure 10 is the axonometric projection schematic diagram of prior art USB3.0 standard packaging memory 9.
EmbodimentBelow, the preferred embodiment shown in is further set forth the utility model by reference to the accompanying drawings.
Referring to Fig. 1 to 4, the preferred embodiment of the utility model is a kind of LGA based on the SD/USB2.0/USB3.0 standard
The encapsulation memory device comprises PCB substrate 2 and base NAND FLASH flash memory wafer 1 thereon that individual layer is two-sided, also comprises the storage control wafer 4 that is positioned on the described PCB substrate 2; Each electric connection point of described NAND FLASH flash memory wafer 1 and storage control wafer 4 welds correspondingly by flash memory die pads 21 and the storage control pad 24 of plain conductor 5 with substrate 2 upper surfaces respectively; Described substrate 2 lower surfaces are distributed with flash memory pad 210 and SD-USB pin pad 240; Each described flash memory pad 210 is electrically connected with each described flash memory die pads 21; Described SD-USB pin pad 240 is electrically connected with described storage control pad 24.By storage control wafer 4, make the described LGA encapsulation memory can not only be as common FLASH memory device, can also do based on the SD standard be equipped with, USB2.0 or USB3.0 standard LGA encapsulating structure memory device
The encapsulation memory device uses.
Referring to Fig. 5, when described storage control wafer 4 is SD storage control wafers, then the SD-USB pin pad 240 of described substrate 2 lower surfaces is at least 9, also namely is equivalent to 9 pins of SD card in the prior art, by this SD storage control wafer select use as the SD memory device.
Referring to Fig. 6, when described storage control wafer 4 is USB 2.0 storage control wafers, then the SD-USB pin pad 240 of described substrate 2 lower surfaces is at least 4,9 pins that also namely are equivalent to the memory device of USB2.0 in the prior art selectively use as the USB2.0 memory device by USB2.0 storage control wafer.
Referring to Fig. 7, controlling wafer 4 when described storage is USB 3.0 storage control wafers, and then the SD-USB pin pad 240 of described substrate 2 lower surfaces is 5.9 pins that also namely are equivalent to the memory device of USB 3.0 in the prior art selectively use as the USB2.0 memory device by USB2.0 storage control wafer.
When each above-mentioned memory device need be as the common FLASH memory device of LGA encapsulating structure, by storage control wafer 4, make the pad of described memory bottom can be set at as shown in Figure 8, to meet the input and output requirement of this type of device.
Each described flash memory pad 210 and SD-USB pin pad 240 namely want piecemeal to arrange or staggered in above-mentioned each example, and it is pre-designed just to design PCB substrate 2.
Expanded the purposes of LGA encapsulation standard, the packaging body (as USB2.0, USB3.0 or SD) of comparing traditional UDP UDP (User Datagram Protocol) has the bigger advantage of capacity, and this type of LGA packaging satisfies under the situation that high-end MID, SSD use, and can change the IC that does SD function, USB2.0 or USB3.0 function to remaining graded product and use.Its LGA pad is more conducive to SMT and mounts, and cost is lower when products such as production MID, SSD.
Said process is the preferred implementation procedure of the utility model, common variation and alternative being included within the protection range of the present utility model that those skilled in the art carries out basically at the utility model.
Claims (5)
1. the LGA based on the SD/USB2.0/USB3.0 standard encapsulates memory device, comprise PCB substrate (2) and base NAND FLASH flash memory wafer (1) thereon that individual layer is two-sided, it is characterized in that: also comprise the storage control wafer (4) that is positioned on the described PCB substrate (2); Each electric connection point of described NAND FLASH flash memory wafer (1) and storage control wafer (4) welds correspondingly by flash memory die pads (21) and the storage control pad (24) of plain conductor (5) with substrate (2) upper surface respectively; Described substrate (2) lower surface is distributed with flash memory pad (210) and SD-USB pin pad (240); Each described flash memory pad (210) is electrically connected with each described flash memory die pads (21); Described SD-USB pin pad (240) is electrically connected with described storage control pad (24).
2. according to the described LGA encapsulation memory device based on the SD/USB2.0/USB3.0 standard of claim 1, it is characterized in that:
Described storage control wafer (4) is SD storage control wafer, and the SD-USB pin pad (240) of described substrate (2) lower surface is at least 9.
3. according to the described LGA encapsulation memory device based on the SD/USB2.0/USB3.0 standard of claim 1, it is characterized in that:
Described storage control wafer (4) is US2.0 storage control wafer, and the SD-USB pin pad (240) of described substrate (2) lower surface is at least 4.
4. according to the described LGA encapsulation memory device based on the SD/USB2.0/USB3.0 standard of claim 1, it is characterized in that:
Described storage control wafer (4) is SD storage control wafer, and the SD-USB pin pad (240) of described substrate (2) lower surface is 5.
5. according to the described LGA encapsulation memory device based on the SD/USB2.0/USB3.0 standard of claim 1, it is characterized in that:
Described flash memory pad (210) and SD-USB pin pad (240) are that piecemeal is arranged or staggered.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220722294 CN203038912U (en) | 2012-12-25 | 2012-12-25 | LGA package storage device based on standard of SD/USB2.0/USB3.0 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220722294 CN203038912U (en) | 2012-12-25 | 2012-12-25 | LGA package storage device based on standard of SD/USB2.0/USB3.0 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203038912U true CN203038912U (en) | 2013-07-03 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220722294 Expired - Lifetime CN203038912U (en) | 2012-12-25 | 2012-12-25 | LGA package storage device based on standard of SD/USB2.0/USB3.0 |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203038912U (en) |
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2012
- 2012-12-25 CN CN 201220722294 patent/CN203038912U/en not_active Expired - Lifetime
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20210708 Address after: 221000 workshop D1, fenghuangwan Electronic Information Industrial Park, Xuzhou Economic and Technological Development Zone, Jiangsu Province Patentee after: Jiangsu Jingkai Semiconductor Technology Co.,Ltd. Address before: 518108 4th floor, building g, Hongfa Science Park, Shiyan Town, Bao'an District, Shenzhen City, Guangdong Province Patentee before: SHENZHEN CITY GCAI ELECTRONICS Co.,Ltd. |
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| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20130703 |