CN202837763U - Array substrate and display device - Google Patents
Array substrate and display device Download PDFInfo
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- CN202837763U CN202837763U CN 201220559690 CN201220559690U CN202837763U CN 202837763 U CN202837763 U CN 202837763U CN 201220559690 CN201220559690 CN 201220559690 CN 201220559690 U CN201220559690 U CN 201220559690U CN 202837763 U CN202837763 U CN 202837763U
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- metal wire
- array base
- public electrode
- base palte
- pixel cell
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Abstract
The utility model discloses an array substrate and a display device, and relates to the technical field of liquid crystal display. The array substrate and the display device reduce resistance of a common electrode, and improve uniformity of voltage of the common electrode. The array substrate comprises a plurality of pixel units. Each pixel unit comprises a pixel electrode and the common electrode, and further comprises a metal wire, wherein the common electrode and the metal wire are in different layers. An insulating layer is arranged between the layers where the metal and the common electrode are respectively arranged. An area where the metal wire is arranged of the insulating layer is provided with a plurality of via holes. The metal wire is connected with the common electrode through the via holes. The display device comprises the array substrate.
Description
Technical field
The utility model relates to technical field of liquid crystal display, relates in particular to a kind of array base palte and display device.
Background technology
In the present liquid crystal display, for the multiple situation of being provided with of public electrode in the panel, wherein a kind of is that public electrode is arranged in the color membrane substrates, also having a kind of is that public electrode and pixel electrode all are arranged at situation on the array base palte, senior super dimension field switch (Advanced-Super Dimensional Switching, be called for short ADS) technology for example.The ADS technology is that the electric field that the electric field that produces by gap electrode edge in the same plane and gap electrode layer and plate electrode interlayer produce forms multi-dimensional electric field, makes in the liquid crystal cell between gap electrode, all aligned liquid-crystal molecules can both produce rotation directly over the electrode.
Yet for situation about public electrode and pixel electrode all being arranged on the array base palte, public electrode has larger resistance, and because the area of public electrode is larger, so that the homogeneity of public electrode voltages is relatively poor.
The utility model content
Embodiment of the present utility model provides a kind of array base palte and display device, has reduced the resistance of public electrode, and has improved the homogeneity of public electrode voltages.
For solving the problems of the technologies described above, embodiment of the present utility model adopts following technical scheme:
A kind of array base palte comprises a plurality of pixel cells, and each described pixel cell comprises pixel electrode and public electrode, also comprises:
Be positioned at the metal wire of different layers with described public electrode;
Be provided with insulation course between described metal wire place layer and the described public electrode place layer;
Described insulation course has a plurality of via holes at the region division of described metal wire, and described metal wire is connected with described public electrode by described via hole.
Further, described metal wire is between adjacent pixel cell.
Further, described via hole is arranged at the overlapping zone of grid line and described metal wire.
Further, described metal wire is arranged between the two adjacent row pixel cells.
Further, every two row pixel cells the described metal wire of one row is set.
Further, every row pixel cell is divided into a plurality of pixel cell groups, and each pixel cell group is comprised of two adjacent pixel cells;
Every row pixel cell top is provided with the first grid line, every row pixel cell below is provided with the second grid line, described the first grid line and the second grid line are used for driving respectively two pixel cells of described each pixel cell group, and two pixel cells in each pixel cell group are connected in the same data line;
Be provided with the virtual data line between the adjacent pixel cell group, described metal wire is described virtual data line.
Further, described via hole is arranged at the zone of the first grid line and the second grid line and described virtual data line overlap adjacent between the adjacent two row pixel cells.
A kind of display device comprises above-mentioned array base palte.
Array base palte among the utility model embodiment and display device, owing to interconnect by a plurality of positions of a plurality of via holes with metal wire and public electrode, it is in parallel to be equivalent to metal wire and public electrode, has therefore reduced the resistance of public electrode, and has improved the homogeneity of public electrode voltages.
Description of drawings
In order to be illustrated more clearly in the utility model embodiment or technical scheme of the prior art, the below will do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art, apparently, accompanying drawing in the following describes only is embodiment more of the present utility model, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the structural representation of a kind of array base palte among the utility model embodiment;
Fig. 2 is the structural representation of another kind of array base palte among the utility model embodiment;
Fig. 3 be among Fig. 2 AA ' to sectional view;
Fig. 4 be among Fig. 2 BB ' to sectional view;
Fig. 5 is the manufacture method process flow diagram of a kind of array base palte among the utility model embodiment.
Description of reference numerals:
The 1-pixel electrode; The 2-public electrode; The 3-metal wire; The 4-via hole; The 5-data line; The 6-grid line.7-the second insulation course; 8-pixel cell group; The 9-glass substrate; 10-the first insulation course.
Embodiment
Below in conjunction with the accompanying drawing among the utility model embodiment, the technical scheme among the utility model embodiment is clearly and completely described, obviously, described embodiment only is the utility model part embodiment, rather than whole embodiment.Based on the embodiment in the utility model, those of ordinary skills are not making the every other embodiment that obtains under the creative work prerequisite, all belong to the scope of the utility model protection.
As shown in Figure 1, the utility model embodiment provides a kind of array base palte, comprise longitudinally data line 5 and horizontal grid line 6, data line 5 and a plurality of pixel cells of grid line 6 intersection definition, each pixel cell comprises pixel electrode 1 and public electrode 2, the point-like fill area is public electrode 2 among Fig. 1, public electrode 2 is also arranged to be communicated with the public electrode in each pixel cell in the position of data line 5 and grid line 6, pixel electrode 1 in each pixel cell and public electrode 2 are respectively tabular and slit-shaped, this array base palte also comprises: be positioned at the metal wire 3 of different layers with public electrode 2, particularly, metal wire 3 can be line longitudinally as shown in Figure 1, also can be horizontal line; Be provided with insulation course between metal wire 3 place layers and the public electrode 2 place layers; Insulation course has a plurality of via holes 4 at the region division of metal wire 3, and metal wire 3 is connected with public electrode 2 by via hole 4, and a plurality of via holes 4 are positioned at the viewing area.
Need to prove that except the pixel electrode in each pixel cell 1 shown in Fig. 1 is tabular, public electrode 2 is situations of slit-shaped, can also be slit-shaped for pixel electrode 1, and public electrode 2 is tabular situations.
Array base palte among the utility model embodiment, owing to interconnect by a plurality of positions of a plurality of via holes with metal wire and public electrode, it is in parallel to be equivalent to metal wire and public electrode, has not only reduced the resistance of public electrode, and has improved the homogeneity of public electrode voltages.
Further, metal wire 3 can be between adjacent pixel cell.Metal wire 3 can be blocked by the black matrix at data line and grid line place, can not affect transmitance.
Further, as shown in Figure 2, via hole 4 can be arranged at the position in the overlapping zone of grid line 6 and metal wire 3, is convenient to block via hole 4 by the black matrix at grid line 6 places.
Further, metal wire 3 is arranged between the two adjacent row pixel cells.Metal wire 3 concrete number and distribution modes can require according to the homogeneity of cost and public electrode voltages to arrange.
Further, every two row pixel cells one row metal wire 3 is set.
As shown in Figure 2, particularly, above-mentioned array base palte can be double grid (Dual Gate) array base palte, namely drives pixel with delegation by two grid lines 6, the quantity of data line 5 can be reduced by half like this, thereby has reduced the number of data I C joint.In the double grid array base palte, every row pixel cell is divided into a plurality of pixel cell groups 8, and each pixel cell group 8 is comprised of two adjacent pixel cells; Every row pixel cell top is provided with the first grid line, every row pixel cell below is provided with the second grid line, the first grid line and the second grid line are used for driving respectively two pixel cells of each pixel cell group 8, and two pixel cells in each pixel cell group 8 are connected in same data line 5; Be provided with virtual data line (Dummy Data Line) between the adjacent pixel cell group 8, the virtual data line does not have actual effect in the process that drives.Above-mentioned metal wire 3 can be the virtual data line.Can effectively utilize so originally in the driving process, do not have practical function the virtual data line as metal wire 3 with the resistance that reduces public electrode and the homogeneity that improves public electrode voltages.
Accordingly, in the double grid array base palte, be provided with two row grid lines 6 between the two adjacent row pixel cells; Via hole 4 is arranged at the zone of the first grid line and the second grid line and virtual data line overlap adjacent between the adjacent two row pixel cells.This is because the virtual data line is thinner, do not need too large-sized black matrix to block, need larger size and make via hole, if other positions at the virtual data line make via hole 4, then need the black matrix of large-size to block, thereby reduced transmitance, and therefore the size of two row grid lines 6 can not reduce transmitance enough greatly to cover via hole 4.
Need to prove, can delegation's via hole 4 all be set at every delegation pixel cell, delegation's via hole 4 perhaps just is set in every line.Above-mentioned via hole 4 does not need extra mask (Mask) manufacturing process, because the viewing area of array base palte periphery just needs to make via hole usually, the figure that only need to increase above-mentioned via hole 4 in original mask plate can be realized.Array base palte among the utility model embodiment is applicable to various public electrode and pixel electrode all are arranged in the display device on the array base palte, for example adopt the screen of ADS technology or adopt plane conversion (In-Plane Switching, abbreviation IPS) screen of technology, for different application, the improvement technology of ADS technology has high permeability I-ADS technology, high aperture H-ADS and high resolving power S-ADS technology etc., and the array base palte that the utility model embodiment provides is for adopting the array base palte of HADS technology display device.
Array base palte among the utility model embodiment, owing to interconnect by a plurality of positions of a plurality of via holes with metal wire and public electrode, it is in parallel to be equivalent to metal wire and public electrode, has not only reduced the resistance of public electrode, and has improved the homogeneity of public electrode voltages.
The utility model embodiment also provides a kind of display device, comprises above-mentioned array base palte.
Display device among the utility model embodiment, because array base palte interconnects by a plurality of positions of a plurality of via holes with metal wire and public electrode, it is in parallel to be equivalent to metal wire and public electrode, has not only reduced the resistance of public electrode, and has improved the homogeneity of public electrode voltages.
Shown in Figure 5, the utility model embodiment also provides a kind of manufacture method of array base palte, can be for the manufacture of the array base palte in the various embodiments described above, and this manufacture method comprises:
Concrete array base-plate structure is same as the previously described embodiments, does not repeat them here.
The method for making of array base palte among the utility model embodiment, because array base palte interconnects by a plurality of positions of a plurality of via holes with metal wire and public electrode, it is in parallel to be equivalent to metal wire and public electrode, not only reduce the resistance of public electrode, and improved the homogeneity of public electrode voltages.
In addition, for the array base palte of the pixel electrode that for example adopts the ADS technology above public electrode, also can adopt the similar manufacture method with the utility model embodiment, difference only is to make first the pattern that comprises public electrode, form insulation course at the substrate that forms above-mentioned pattern, and by composition technique, form a plurality of via holes at this insulation course, form the pattern that comprises metal wire at the substrate that forms above-mentioned pattern, metal wire is connected with public electrode by described via hole.
The above; it only is embodiment of the present utility model; but protection domain of the present utility model is not limited to this; anyly be familiar with those skilled in the art in the technical scope that the utility model discloses; can expect easily changing or replacing, all should be encompassed within the protection domain of the present utility model.Therefore, protection domain of the present utility model should be as the criterion with the protection domain of described claim.
Claims (8)
1. an array base palte comprises a plurality of pixel cells, and each described pixel cell comprises pixel electrode and public electrode, it is characterized in that, also comprises:
Be positioned at the metal wire of different layers with described public electrode;
Be provided with insulation course between described metal wire place layer and the described public electrode place layer;
Described insulation course has a plurality of via holes at the region division of described metal wire, and described metal wire is connected with described public electrode by described via hole.
2. array base palte according to claim 1 is characterized in that,
Described metal wire is between adjacent pixel cell.
3. array base palte according to claim 1 is characterized in that,
Described via hole is arranged at the overlapping zone of grid line and described metal wire.
4. array base palte according to claim 2 is characterized in that,
Described metal wire is arranged between the two adjacent row pixel cells.
5. array base palte according to claim 2 is characterized in that,
Every two row pixel cells the described metal wire of one row is set.
6. according to claim 1 to 5 arbitrary described array base paltes, it is characterized in that,
Every row pixel cell is divided into a plurality of pixel cell groups, and each pixel cell group is comprised of two adjacent pixel cells;
Every row pixel cell top is provided with the first grid line, every row pixel cell below is provided with the second grid line, described the first grid line and the second grid line are used for driving respectively two pixel cells of described each pixel cell group, and two pixel cells in each pixel cell group are connected in the same data line;
Be provided with the virtual data line between the adjacent pixel cell group, described metal wire is described virtual data line.
7. array base palte according to claim 6 is characterized in that,
Described via hole is arranged at the zone of the first grid line and the second grid line and described virtual data line overlap adjacent between the adjacent two row pixel cells.
8. a display device is characterized in that, comprises arbitrary described array base palte such as claim 1-7.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220559690 CN202837763U (en) | 2012-10-29 | 2012-10-29 | Array substrate and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220559690 CN202837763U (en) | 2012-10-29 | 2012-10-29 | Array substrate and display device |
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| CN202837763U true CN202837763U (en) | 2013-03-27 |
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| CN 201220559690 Expired - Lifetime CN202837763U (en) | 2012-10-29 | 2012-10-29 | Array substrate and display device |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103761935A (en) * | 2014-01-21 | 2014-04-30 | 深圳市华星光电技术有限公司 | Display panel |
| CN104880871A (en) * | 2015-06-23 | 2015-09-02 | 合肥鑫晟光电科技有限公司 | Display panel and display device |
| CN108107637A (en) * | 2017-11-23 | 2018-06-01 | 深圳市华星光电技术有限公司 | A kind of thin-film transistor LCD device array substrate and preparation method thereof |
-
2012
- 2012-10-29 CN CN 201220559690 patent/CN202837763U/en not_active Expired - Lifetime
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103761935A (en) * | 2014-01-21 | 2014-04-30 | 深圳市华星光电技术有限公司 | Display panel |
| CN103761935B (en) * | 2014-01-21 | 2016-01-06 | 深圳市华星光电技术有限公司 | Display panel |
| US9799247B2 (en) | 2014-01-21 | 2017-10-24 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Display panel |
| CN104880871A (en) * | 2015-06-23 | 2015-09-02 | 合肥鑫晟光电科技有限公司 | Display panel and display device |
| WO2016206449A1 (en) * | 2015-06-23 | 2016-12-29 | 京东方科技集团股份有限公司 | Display panel and display device |
| US9964823B2 (en) | 2015-06-23 | 2018-05-08 | Boe Technology Group Co., Ltd. | Display panel and display device |
| CN104880871B (en) * | 2015-06-23 | 2018-05-11 | 合肥鑫晟光电科技有限公司 | Display panel and display device |
| CN108107637A (en) * | 2017-11-23 | 2018-06-01 | 深圳市华星光电技术有限公司 | A kind of thin-film transistor LCD device array substrate and preparation method thereof |
| US10914998B2 (en) | 2017-11-23 | 2021-02-09 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Array substrate of thin-film transistor liquid crystal display device and method for manufacturing the same |
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Legal Events
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| C14 | Grant of patent or utility model | ||
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| ASS | Succession or assignment of patent right |
Owner name: BEIJING BOE PHOTOELECTRICITY SCIENCE + TECHNOLOGY Effective date: 20150703 Owner name: JINGDONGFANG SCIENCE AND TECHNOLOGY GROUP CO., LTD Free format text: FORMER OWNER: BEIJING BOE PHOTOELECTRICITY SCIENCE + TECHNOLOGY CO., LTD. Effective date: 20150703 |
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| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20150703 Address after: 100015 Jiuxianqiao Road, Beijing, No. 10, No. Patentee after: BOE TECHNOLOGY GROUP Co.,Ltd. Patentee after: BEIJING BOE OPTOELECTRONICS TECHNOLOGY Co.,Ltd. Address before: 100176, No. 8, Middle West Road, Beijing economic and Technological Development Zone, Beijing Patentee before: BEIJING BOE OPTOELECTRONICS TECHNOLOGY Co.,Ltd. |
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| CX01 | Expiry of patent term |
Granted publication date: 20130327 |
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| CX01 | Expiry of patent term |