CN202713470U - High speed image acquisition device - Google Patents

Abstract

The utility model discloses a high speed image acquisition device. The high speed image acquisition device comprises a CMOS image sensor, an FPGA processing module, and a memory. The CMOS image sensor is used for acquiring images, converting the image information into electric signals and outputting the electric signals. The FPGA processing module receives the image signals acquired by the CMOS image sensor, and carries out compression processing on the image signals. The FPGA processing module is provided with a serial-to-parallel converting interface used for the data communication with a host computer. The memory is connected to the FPGA processing module, and is used for storing the image information. The high speed image acquisition device has the advantages of simpler system peripheral circuit, smaller size, and obvious superiority.

Description

A kind of high-speed image sampling device

Technical field

The utility model belongs to the electrical application technology field, specifically a kind of high-speed image sampling device.

Background technology

Image loses in daily life nowhere, and it occupies an important position in the external information that the mankind obtain.Yet traditional image collection processing system causes the defective of IMAQ length consuming time because the image information data amount is large, is difficult to satisfy people's actual demand.

Summary of the invention

The purpose of this utility model is the shortcoming and defect that exists in order to overcome prior art, and a kind of high-speed image sampling device that a kind of module arranges rationally, IMAQ is fast is provided.

For achieving the above object, the technical solution of the utility model is to comprise with lower module:

Cmos image sensor is used for IMAQ, converts image information to signal of telecommunication output;

The FPGA processing module receives the picture signal that cmos image sensor gathers, and picture signal is compressed processing, be provided with on this FPGA processing module for string and the translation interface of host computer data communication;

Memory is connected on the FPGA processing module, is used for the storage of image information.

Further arranging is that described memory is synchronous DRAM.

The utility model take full advantage of FPGA at a high speed, the characteristics of high reliability finish the real-time processing to view data.FPGA and SDRAM transfer of data adopt the table tennis method of operation, can make like this data that collect be stored in continuously in the chip external memory, simultaneously FPGA can be continuous obtains data from SDRAM, guaranteed the real-time of system, communicates by USB interface and host computer at last.

The utility model has the advantages that take FPGA as core devices, adopt the modules in the hardware description language realization system, can make like this system peripherals circuit simpler, volume is less, and superiority is obvious.

Below in conjunction with specification drawings and specific embodiments the utility model is done further introduction.

Description of drawings

Fig. 1 the utility model embodiment theory diagram.

Embodiment

Below by embodiment the utility model is carried out concrete description; only be used for the utility model is further specified; can not be interpreted as the restriction to the utility model protection range, the technician in this field can make some nonessential improvement and adjustment to the utility model according to the content of above-mentioned utility model.

Embodiment of the present utility model as shown in Figure 1 comprises with lower module:

Cmos image sensor 1 is used for IMAQ, converts image information to signal of telecommunication output;

Adopt the FPGA processing module 2 of the EP3C40Q240C8 of Altera Cyclone series, receive the picture signal that cmos image sensor gathers, and picture signal compressed processing, be provided with on this FPGA processing module for string and the translation interface 21 of host computer data communication; FPGA(Field-Programmable Gate Array), i.e. field programmable gate array, it is the product that further develops on the basis of the programming devices such as PAL, GAL, CPLD.It occurs as a kind of semi-custom circuit in application-specific integrated circuit (ASIC) (ASIC) field, has both solved the deficiency of custom circuit, has overcome again the limited shortcoming of original programming device gate circuit number.

Memory 3 is connected on the FPGA processing module, is used for the storage of image information.This memory 3 of the present embodiment is synchronous DRAM, synchronous DRAM is SDRAM:Synchronous Dynamic Random Access Memory, refer to synchronously Memory need of work synchronised clock, the transmission of inner order and data transfer are all take it as benchmark; Refer to that dynamically storage array need to refresh constantly to guarantee that data do not lose; Refer to that at random data are not that linearity is stored successively, but free assigned address carries out reading and writing data.

The utility model whole system is comprised of several parts such as cmos image sensor, FPGA processing module, SDRAM.Wherein, cmos image sensor is responsible for obtaining image information, the information of obtaining is passed to FPGA focus on, and the task of FPGA comprises the Real Time Compression to image, then the serial data after the compression and conversion, communicates by USB2.0 mouth and host computer.SDRAM is used for the output information of register map image-position sensor, adopts simultaneously the ping-pong operation method that data are transmitted.

Claims (2)

1. high-speed image sampling device is characterized in that comprising with lower module:

Cmos image sensor is used for IMAQ, converts image information to signal of telecommunication output;

The FPGA processing module receives the picture signal that cmos image sensor gathers, and picture signal is compressed processing, be provided with on this FPGA processing module for string and the translation interface of host computer data communication;

Memory is connected on the FPGA processing module, is used for the storage of image information.

2. a kind of high-speed image sampling device according to claim 1, it is characterized in that: described memory is synchronous DRAM.