CN202406226U - Video acquiring system - Google Patents
Video acquiring system Download PDFInfo
- Publication number
- CN202406226U CN202406226U CN 201120538508 CN201120538508U CN202406226U CN 202406226 U CN202406226 U CN 202406226U CN 201120538508 CN201120538508 CN 201120538508 CN 201120538508 U CN201120538508 U CN 201120538508U CN 202406226 U CN202406226 U CN 202406226U
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- video
- asicvw2010
- decoding
- encoding
- signal
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Abstract
The utility model provides a video acquiring system, which comprises an A/D (analog/digital) video input chip SAA7113, a codec ASICVW2010, a D/A video output chip SAA7121, a JTAG (joint test action group) interface, a system power supply, an SD (synchronous dynamic) card memory, an SDRAM (synchronous dynamic random access memory) and a FLASH memory in connection with an S3C2410 master-control core unit. The A/D video input chip SAA7113 and the D/A video output chip SAA7121 are connected with the codec ASICVW2010. The video acquiring system is simple in circuit, low in cost and capable of processing in real time, and analog signals output can be directly used for simulation display.
Description
Technical field
The utility model relates to field of electric control, and a kind of video acquisition system
is provided.
Background technology
Video acquisition is the problem of obtaining that solves video information, and video acquisition and processing system mainly is divided into two kinds on acquisition mode at present:
First kind of collection of adopting special picture decoding chip to accomplish image automatically, the time that processor is taken is few.But shortcoming is its grey scale accuracy to be restricted in the special image acquisition chip, and the video signal video adaptability that generally can only gather standard is bad, generally adopts CPLD (CPLD) to control, and integrated level is low, complicated circuit, and cost is high.
Second kind, to adopt and look screen special external high-speed A, decoding is accomplished through logical device, and the interface of processor requirement and outside AD converter is also stored data.Shortcoming is to carry out precision control to clock signal, and processing capability in real time is poor.Complicated circuit, cost is high.
The utility model content
The purpose of the utility model is the deficiency to prior art, and a kind of video acquisition system based on S3C2410 that a kind of circuit is simple, with low cost, can handle in real time is provided.
The utility model is for realizing that above-mentioned purpose adopts following technical scheme:
A kind of video acquisition system is characterized in that comprising:
Simulation camera: gather video data;
A/D video input chip SAA7113: with camera collection to vision signal convert digital video signal into,
Encoding and decoding ASICVW2010: the compression coding vision signal, convert vision signal into the MPEG-4 form,
D/A video pio chip SAA7121: convert digital video signal into analog video signal,
S3C2410 master control core cell: to the control of the system data flow direction and the control and the management of peripheral module.
Jtag interface: and the serial communication between PC.
System power supply: be the whole system power supply;
SD card storage: be used for the video information that storage of collected arrives;
SDRAM memory: as storage and the operation and the dynamic buffering space of program;
FLASH memory: mainly stored operating system nucleus and root file system;
Said A/D video input chip SAA7113, encoding and decoding ASICVW2010, D/A video pio chip SAA7121, jtag interface, system power supply, the storage of SD card, SDRAM memory all are connected with S3C2410 master control core cell with the FLASH memory;
Said simulation camera sends the video data that collects to; After A/D video input chip SAA7113 carries out obtaining after analog-to-digital conversion and the decoding the unpressed ITU656 digital video signal that meets encoding and decoding ASICVW2010 video interface standard; Give encoding and decoding ASICVW2010; ASICVW2010 compression coding vision signal; Convert vision signal into the MPEG-4 form; Under the control of S3C2410 master control core cell, on the one hand deposit the video data behind the compressed encoding in the SD card with the form of file then and realize local storage, on the other hand video data is outputed to D/A video pio chip SAA7121 and carry out digital-to-analogue conversion, obtain the analog video signal that supplies conformable display to use.
The utlity model has following beneficial effect:
The utility model circuit is simple, and is with low cost, can handle in real time, and the analog signal of output can directly supply simulation to show to use.
Description of drawings
Fig. 1 is the system block diagram of the utility model.
Embodiment
A kind of video acquisition system is characterized in that comprising:
Simulation camera: gather video data;
A/D video input chip SAA7113: with camera collection to vision signal convert digital video signal into,
Encoding and decoding ASICVW2010: the compression coding vision signal, convert vision signal into the MPEG-4 form,
D/A video pio chip SAA7121: convert digital video signal into analog video signal,
S3C2410 master control core cell: to the control of the system data flow direction and the control and the management of peripheral module.
Jtag interface: and the serial communication between PC.
System power supply: be the whole system power supply;
SD card storage: be used for the video information that storage of collected arrives;
SDRAM memory: as storage and the operation and the dynamic buffering space of program;
FLASH memory: mainly stored operating system nucleus and root file system;
Said A/D video input chip SAA7113, encoding and decoding ASICVW2010, D/A video pio chip SAA7121, jtag interface, system power supply, the storage of SD card, SDRAM memory all are connected with S3C2410 master control core cell with the FLASH memory;
Said simulation camera sends the video data that collects to; After A/D video input chip SAA7113 carries out obtaining after analog-to-digital conversion and the decoding the unpressed ITU656 digital video signal that meets encoding and decoding ASICVW2010 video interface standard; Give encoding and decoding ASICVW2010; ASICVW2010 compression coding vision signal; Convert vision signal into the MPEG-4 form; Under the control of S3C2410 master control core cell, on the one hand deposit the video data behind the compressed encoding in the SD card with the form of file then and realize local storage, on the other hand video data is outputed to D/A video pio chip SAA7121 and carry out digital-to-analogue conversion, obtain the analog video signal that supplies conformable display to use.
Claims (1)
1. video acquisition system is characterized in that comprising:
Simulation camera: gather video data;
A/D video input chip SAA7113: with camera collection to vision signal convert digital video signal into,
Encoding and decoding ASICVW2010: the compression coding vision signal, convert vision signal into the MPEG-4 form,
D/A video pio chip SAA7121: convert digital video signal into analog video signal,
S3C2410 master control core cell: to the control of the system data flow direction and the control and the management of peripheral module;
Jtag interface: and the serial communication between PC;
System power supply: be the whole system power supply;
SD card storage: be used for the video information that storage of collected arrives;
SDRAM memory: as storage and the operation and the dynamic buffering space of program;
FLASH memory: mainly stored operating system nucleus and root file;
Said A/D video input chip SAA7113, encoding and decoding ASICVW2010, D/A video pio chip SAA7121, jtag interface, system power supply, the storage of SD card, SDRAM memory all are connected with S3C2410 master control core cell with the FLASH memory, and said A/D video input chip SAA7113 is connected with encoding and decoding ASICVW2010 with D/A video pio chip SAA7121;
Said simulation camera sends the video data that collects to; After A/D video input chip SAA7113 carries out obtaining after analog-to-digital conversion and the decoding the unpressed ITU656 digital video signal that meets encoding and decoding ASICVW2010 video interface standard; Give encoding and decoding ASICVW2010; ASICVW2010 compression coding vision signal; Convert vision signal into the MPEG-4 form; Under the control of S3C2410 master control core cell, on the one hand deposit the video data behind the compressed encoding in the SD card with the form of file then and realize local storage, on the other hand video data is outputed to D/A video pio chip SAA7121 and carry out digital-to-analogue conversion, obtain the analog video signal that supplies conformable display to use.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 201120538508 CN202406226U (en) | 2011-12-21 | 2011-12-21 | Video acquiring system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 201120538508 CN202406226U (en) | 2011-12-21 | 2011-12-21 | Video acquiring system |
Publications (1)
Publication Number | Publication Date |
---|---|
CN202406226U true CN202406226U (en) | 2012-08-29 |
Family
ID=46703840
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN 201120538508 Expired - Fee Related CN202406226U (en) | 2011-12-21 | 2011-12-21 | Video acquiring system |
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CN (1) | CN202406226U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102438106A (en) * | 2011-12-21 | 2012-05-02 | 成都众询科技有限公司 | Video acquisition system |
-
2011
- 2011-12-21 CN CN 201120538508 patent/CN202406226U/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102438106A (en) * | 2011-12-21 | 2012-05-02 | 成都众询科技有限公司 | Video acquisition system |
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Legal Events
Date | Code | Title | Description |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120829 Termination date: 20121221 |