CN201499258U - Twin-channel view filed digital image acquisition system - Google Patents
Twin-channel view filed digital image acquisition system Download PDFInfo
- Publication number
- CN201499258U CN201499258U CN200920222732XU CN200920222732U CN201499258U CN 201499258 U CN201499258 U CN 201499258U CN 200920222732X U CN200920222732X U CN 200920222732XU CN 200920222732 U CN200920222732 U CN 200920222732U CN 201499258 U CN201499258 U CN 201499258U
- Authority
- CN
- China
- Prior art keywords
- module
- image acquisition
- digital image
- circuit board
- fpga chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Abstract
The utility model discloses a twin-channel view filed digital image acquisition system. The system is characterized in that the system comprises a circuit board fixedly provided with a Field Programmable Gate Array (FPGA) chip 2, and a power supply module 1, a toggle switch 3, a key switch 4, SDRAM memory modules 51, 51', 52, 521'', CMOS image acquisition module 6, 6', VGA output display modules 9, 9', an active serial configuration EPCS module 8 and a download module 7 are further fixedly installed on the circuit board and respectively connected different pins of the FPGA chip 2. The digital image acquisition system has small volume, convenient carrying and using, and twin-channel view filed digital image acquisition task can be carried out at any time, thereby overcoming the defects of the traditional acquisition system that the volume is big, the cost is high, and a general-purpose computer is depended on in combination with special image acquisition card and image processing software work.
Description
Technical field
The utility model relates to a kind of two-way visual field digital image collection system, particularly a kind of embedded digital image capturing system that has based on field programmable logic array fpga chip, two-way IMAQ input equipment and standard picture output equipment interface.
Background technology
Pair requirement of two-way digital image acquisition is all arranged in existing image capturing system.And the solution that adopts at present generally is to use all-purpose computer to cooperate the special image capture card to cooperate image processing software to carry out IMAQ and processing.This image capturing system volume is big, cost an arm and a leg, should not carry.Simultaneously, make up such image capturing system and expend a large amount of time, prolong the work period.
Summary of the invention
In order to solve the above-mentioned defective that exists in the prior art, the purpose of this utility model provides that a kind of volume is little, price is low, portable two-way visual field digital image collection system.
To achieve these goals, the utility model adopts following technical scheme: a kind of two-way visual field digital image collection system, its characteristics are: it comprises that one has the circuit board of supply socket, be fixed with a programmable gate array FPGA chip on this circuit board, different pins with this fpga chip join respectively and are packed in also having on the circuit board: one group of power module, the toggle switch that 1 two-value data is provided for system, one group of 3 key switch that control signal is provided for system, one group of VGA display module that can join with LCD or CRT monitor, two cmos image acquisition modules that view data is provided for system, two groups is the active Serial E PCS configuration module that the SDRAM memory module and of system's memory image is connected with download module; Wherein, download module is made up of one 26 needle sockets and live road chip once; The input of described active Serial E PCS configuration module is connected with the download module output, and the input of download circuit chip is connected with described 26 needle socket outputs.
This two-way visual field digital image collection system is connected with general external equipment by described VGA display module; The input interface of described 26 needle sockets is connected with the parallel interface LPT of the micro-mainframe computer of peripheral hardware.
The input of 1 above-mentioned toggle switch is connected with the toggle switch port 23 of described fpga chip respectively.
The input of 3 above-mentioned key switches is connected with the key switch port 24 of described fpga chip respectively.
2 above-mentioned cmos image acquisition modules; Wherein, 1 cmos image acquisition module is gathered port 22 with first of fpga chip respectively and is connected, in order to gather first via view data; Another cmos image acquisition module is gathered port 22 ' with second of fpga chip respectively and is connected, in order to gather the second tunnel view data.
Two groups of above-mentioned SDRAM memory modules are made up of 4 storage chips, per two one group.Wherein one group of SDRAM memory module is connected with second storage port 26 with first storage port 25 of fpga chip, is used to store the information of first via image information; Another group SDRAM memory module is connected with the 4th storage port 26 ' with the 3rd storage port 25 ' of fpga chip, is used to store the information of the second tunnel image information.
The used fpga chip of this two-way visual field digital image collection system is the EP1C6Q240C6 chip of Cyclone series.
Be connected with general external equipment by the VGA output interface on this circuit board, be used for the soft nuclear of system and download, the soft nuclear of system is downloaded and is comprised the JTAG mouth and the AS mouth is downloaded, and supports the downloading mode of .sof and two kinds of files of .pof.26 needle sockets that are connected with download module are connected with the parallel interface LPT of the micro-mainframe computer of peripheral hardware by 26 core flat cables, can be the communication interface that the user provides data to download.
The utility model adopts as above technical scheme, and its beneficial effect is as follows:
1, adopts the acp chip of fpga chip, toggle switch, key switch, cmos sensor, SDRAM memory, VGA output interface and power module are connected respectively with fpga chip, and are integrated on the circuit board as system design; Easy to use, volume is little, is easy to carry.
2, image capturing system of the present utility model can be connected with microcomputer with multiple universal external equipment with 26 needle sockets by the VGA output interface; Can be the communication interface that the user provides data to download; Can realize the soft nuclear download of system of JTAG mouth and AS mouth; And the download of support .sof and two kinds of files of .pof.
3, the two-way visual field digital image collection system that is integrated into of each parts of used system programmable logic array fpga chip and connection can be used for applications such as space exploration, sea-bottom survey, medical science, meteorology, geological exploration, military surveillance.
Description of drawings
Fig. 1 is the overall connection block architecture diagram of the utility model image capturing system.
Fig. 2 is the practical layout figure of circuit board in the image capturing system of Fig. 1.
1, power module 2, fpga chip 21, configured port 22, first gathers port 22 ', second gathers port 23, toggle switch interface 24, key switch port 25, first storage port 25 ' the 3rd storage port 26, second storage port 26 ', the 4th storage port 3, toggle switch 4, key switch 51,51 ', 52,52 ' SDRAM memory module 6,6 ' cmos image acquisition module 7, download module 8, EPCS configuration module 81, download port 9,9 ' VGA display module 91, first display port 91 ', second display port
Embodiment
Describe concrete technical scheme of the present utility model in detail below in conjunction with accompanying drawing.
As shown in Figure 1 and Figure 2, two-way of the present utility model visual field digital image collection system is set to a printed circuit board (PCB) that is provided with supply socket.Be fixed with system programmable logic array fpga chip 2 on this circuit board, connect respectively with the different pins of fpga chip 2 and be installed in and also have power module 1 on this circuit board, toggle switch 3, key switch 4, SDRAM memory module 51,51 ', 52,52 ', cmos image acquisition module 6,6 ', VGA output display module 9,9 ' and one active series arrangement EPCS module 8; Wherein, initiatively the input of series arrangement EPCS module 8 is connected with one 26 needle socket (not shown) by a download module 7.
The annexation of each parts is referring to Fig. 3 on the foregoing circuit plate.Specifically details are as follows: by supply socket insert+the 5V DC power supply through power module 1 be converted to+1.5V and+the DC power supply port of 3.3V output, directly be that fpga chip 2, EPCS configuration module 8 and download module 7 are powered; 1 toggle switch 3 directly is connected with the toggle switch port 23 of fpga chip 2, and the system of can be provides 1 two-value input data; Key switch 4 is connected with the key switch port 24 of fpga chip 2, and the system of can be provides 3 control signal inputs; Two cmos image acquisition modules 6,6 ', one of them acquisition module are gathered port 22 with first of fpga chip 2 and are connected, and can be the view data that the user gathers the first via; Another acquisition module is gathered port 22 ' with second of fpga chip 2 and is connected, and can be the user and gathers the second tunnel view data; Two groups of SDRAM memory modules are connected with fpga chip 2 respectively, and wherein, one group of memory module 51,52 is connected with first storage port 25, second storage port 26 of fpga chip, can store first via view data; Another group memory module 51 ', 52 ' is connected with the 3rd storage port 25 ', the 4th storage port 26 ' of fpga chip, can store the second tunnel view data; Two VGA output display module 9,9 ' is connected with second display port 91 ' with first display port 91 of fpga chip 2, and the system of can be provides the connection of standard LCD or CRT monitor; 26 needle sockets are selected double socket for use, its the inner and one is downloaded the chip input and is connected and composed a download module 7, the output of this download module is connected with active Serial E PCS configuration module 8 inputs, and initiatively the output of Serial E PCS configuration module 8 is connected with the configured port 21 of fpga chip 2.
Wherein, system programmable logic array fpga chip 2 adopts the EP1C6Q240C6 chip of the Cyclone of altera corp series, supports two kinds of clock frequencies of 50MHz, 27MHz, selects for use for design; This fpga chip is connected with active Serial E PCS configuration module 8 by configured port 21, and download module 7 is connected with download module 7 by download port 81.It is the power module of LM317T that power module 1 is selected two models for use, be respectively fpga chip 2 provide core voltage (+1.5V) and the I/O interface voltage (+3.3V); Download module 7 models are 74HC244, and download module 7 is connected with the parallel interface LPT of the micro-mainframe computer of peripheral hardware by 26 needle sockets, can be the communication interface that the user provides data to download, the download checking of the soft nuclear design of realization system; Cmos image acquisition module 6,6 ' model are THDB-D5M, for the user gathers one tunnel view field image data; SDRAM memory module 51,51 ', 52,52 ' model are IS42S1610B, for the user provides the storage of two-way graph data; VGA output display module 9 and 9 ' model are ADV7123, for the user provides two-way image display interface.Other parts: be the commercially available universal product as devices such as toggle switch 3, key switch 4 and 26 needle sockets.
Fig. 2 is the actual installation layout of all parts on the used printed circuit board (PCB) of the utility model.The parts and the parts such as two kinds of clock frequencies, toggle switch that are about to as shown in Figure 1 are integrated on the circuit board, and its volume is little, is easy to carry, and can be connected with micro-mainframe computer with multiple universal external equipment, carries out two-way view field image collecting work.
Fig. 3 is circuit theory diagrams of the present utility model, and its operation principle is as follows:
A supply socket is housed on the circuit board of this two-way visual field digital image collection system, be used for connection+5V DC power supply, control through mains switch on the circuit board, outside+5V power supply is inserted power module 1, power module 1 promptly can be system and provides+1.5V and+direct-current working volts of 3.3V, give system's fpga chip 2, initiatively Serial E PC S configuration module 8 and download module 7 power supplies; 26 needle socket (not shown) in the system are connected with the parallel interface of the microcomputer of peripheral hardware by one 26 core flat cables, promptly can finish the download of data; Two kinds of clock frequencies of the 50MHz that is provided with on the circuit board, 27MHz can be selected for use for design.
Claims (2)
1. two-way visual field digital image collection system, it is characterized in that: it comprises that one has the circuit board of supply socket, be fixed with a programmable gate array FPGA chip (2) on this circuit board, different pins with this fpga chip connect respectively and are packed in also having on the circuit board: one group of power module (1), the toggle switch (3) that two-value data is provided for system, one group of key switch (4) that control signal is provided for system, one group of VGA display module (9,9 '), two cmos image acquisition modules (6 that view data is provided for system, 6 '), two groups is the SDRAM memory module (51 of system's memory image, 52,51 ', 52 ') and an active Serial E PCS configuration module (8) that is connected with download module (7); Wherein, described download module (7) is made up of one 26 needle sockets and live road chip once; This two-way visual field digital image collection system is connected with general external equipment by described VGA output display module (9,9 '); The input interface of described 26 needle sockets is connected with the parallel interface LPT of the micro-mainframe computer of peripheral hardware.
2. two-way according to claim 1 visual field digital image collection system is characterized in that: described fpga chip (2) is the EP1C6Q240C6 chip of Cyclone series.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN200920222732XU CN201499258U (en) | 2009-09-14 | 2009-09-14 | Twin-channel view filed digital image acquisition system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN200920222732XU CN201499258U (en) | 2009-09-14 | 2009-09-14 | Twin-channel view filed digital image acquisition system |
Publications (1)
Publication Number | Publication Date |
---|---|
CN201499258U true CN201499258U (en) | 2010-06-02 |
Family
ID=42442452
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN200920222732XU Expired - Fee Related CN201499258U (en) | 2009-09-14 | 2009-09-14 | Twin-channel view filed digital image acquisition system |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN201499258U (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102004464A (en) * | 2010-12-23 | 2011-04-06 | 合肥工业大学 | Adaline neural network controller (NNC) based on field programmable gate array (FPGA) |
CN102131053A (en) * | 2011-01-12 | 2011-07-20 | 首都师范大学 | Data acquisition, coding and storage method applied to high speed imaging system |
CN102377423A (en) * | 2010-08-23 | 2012-03-14 | 熊猫电子集团有限公司 | Field programmable gate array (FPGA) online configuration method |
CN102565073A (en) * | 2011-12-31 | 2012-07-11 | 北京航空航天大学 | Portable FPGA (Field Programmable Gate Array)-based rapid detection device of circuit board defects |
-
2009
- 2009-09-14 CN CN200920222732XU patent/CN201499258U/en not_active Expired - Fee Related
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102377423A (en) * | 2010-08-23 | 2012-03-14 | 熊猫电子集团有限公司 | Field programmable gate array (FPGA) online configuration method |
CN102004464A (en) * | 2010-12-23 | 2011-04-06 | 合肥工业大学 | Adaline neural network controller (NNC) based on field programmable gate array (FPGA) |
CN102131053A (en) * | 2011-01-12 | 2011-07-20 | 首都师范大学 | Data acquisition, coding and storage method applied to high speed imaging system |
CN102565073A (en) * | 2011-12-31 | 2012-07-11 | 北京航空航天大学 | Portable FPGA (Field Programmable Gate Array)-based rapid detection device of circuit board defects |
CN102565073B (en) * | 2011-12-31 | 2013-08-28 | 北京航空航天大学 | Portable FPGA (Field Programmable Gate Array)-based rapid detection device of circuit board defects |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN103678212B (en) | Based on the general-purpose interface detection device of VPX framework | |
CN103064006B (en) | The test device of integrated circuit | |
CN201499258U (en) | Twin-channel view filed digital image acquisition system | |
CN102545841A (en) | Analogue signal generator for TDI (Transport Driver Interface) CCD (Charge Coupled Device) | |
CN203241515U (en) | Logic analyser based on PC | |
CN201233273Y (en) | Blasting vibration meter | |
CN102438106A (en) | Video acquisition system | |
CN103091580A (en) | Micro-grid electric energy monitoring device based on ARM | |
CN203275482U (en) | Data acquisition card of virtual oscilloscope | |
CN106950885A (en) | A kind of time and frequency domain analysis system of signal | |
CN107422214B (en) | A kind of testing device for touch screens | |
CN205829883U (en) | A kind of multisource video acquisition processing system based on FPGA | |
CN104615030A (en) | Portable function signal generator | |
CN204539351U (en) | A kind of intelligent transmission line online monitoring system based on ARM9 kernel | |
CN204009460U (en) | A kind of Portable industrial signal pickup assembly | |
CN202424914U (en) | Digital video acquisition system based on wire transmission and wireless transmission of DSP (digital signal processor) | |
CN202406226U (en) | Video acquiring system | |
CN205644192U (en) | Portable miniature tensile force measurement appearance of space based on singlechip | |
CN206516323U (en) | A kind of signal generation apparatus | |
CN204406849U (en) | A kind of modular electronic designed teaching experimental box | |
CN102572392A (en) | Digital signal processor (DSP)-based wired and wireless transmission digital video acquisition system | |
CN204028190U (en) | A kind of embedded soft core FPGA mixed signal oscillograph | |
CN211630193U (en) | Power grid information acquisition device based on NB-IOT | |
CN202141759U (en) | Resistance measuring device capable of wireless signal communication transfer | |
CN201479244U (en) | Video data acquisition and storage system |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100602 Termination date: 20110914 |