CN201479244U - Video data acquisition and storage system - Google Patents
Video data acquisition and storage system Download PDFInfo
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- CN201479244U CN201479244U CN2009202164706U CN200920216470U CN201479244U CN 201479244 U CN201479244 U CN 201479244U CN 2009202164706 U CN2009202164706 U CN 2009202164706U CN 200920216470 U CN200920216470 U CN 200920216470U CN 201479244 U CN201479244 U CN 201479244U
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- acquisition circuit
- signal acquisition
- storage system
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- video data
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Abstract
The utility model discloses a video data acquisition and storage system, relating to the field of video; and the system is capable of overcoming the limitation of data acquisition in the aspects of time, space and environment and is featured with low cost and easy implementation. The video data acquisition and storage system comprises an analogue-digital conversion data acquisition chip and a signal acquisition circuit electrically connected with the analogue-digital conversion data acquisition chip. The signal acquisition circuit comprises a baseband video signal acquisition circuit, a display drawing array signal acquisition circuit, a chromatic aberration component signal acquisition circuit and a super-video signal acquisition circuit. The embodiment of the utility model is mainly used for the actual simulation verification process of liquid crystal television chip.
Description
Technical field
The utility model relates to video field, relates in particular to a kind of video data acquiring and storage system.
Background technology
At present, in video processing procedure, generally all be that vision signal is carried out digitized processing, and need when video reprocessing and emulation gather front end data earlier, and then carry out corresponding signal process.
The data acquisition that prior art provides all is firm and hard existing by the fpga of integrated belt sampling function, and owing to increased data acquisition function, this fpga plate costs an arm and a leg, and because data acquisition function has been integrated on this fpga plate, therefore, the Adc chip that can't select to satisfy different accuracy and effect is realized data acquisition function.And, because prior art is image data and can not storing in real time, can't provide in back-end processing and to have identical front end environment signal and carry out signal processing, can't realize being undertaken the assessment etc. of effect, thereby all there is greatly restriction in the data acquisition of prior art on time, space and environment by identical standard.
The utility model content
Technical problem to be solved in the utility model is to provide a kind of video data acquiring and storage system, can overcome the restriction of data acquisition on time, space and environment, and cost is low, is easy to realize.
For solving the problems of the technologies described above, the utility model adopts following technical scheme:
A kind of video data acquiring and storage system, comprise: the analog-digital conversion data acquisition chip, and the signal acquisition circuit that is electrically connected with described analog-digital conversion data acquisition chip, described signal acquisition circuit comprises: baseband video signal Acquisition Circuit, demonstration drawing array signal Acquisition Circuit, color difference components signal acquisition circuit and super video signal acquisition circuit.
Further, described signal acquisition circuit build-out resistor over the ground is 75 ohm.
Further, described analog-digital conversion data acquisition chip has been reserved signal input interface, and described signal input interface comprises: the base band video input interface that is connected with described baseband video signal Acquisition Circuit; The demonstration drawing array input interface that is connected with described demonstration drawing array signal Acquisition Circuit; Color difference components input interface that is connected with described color difference components signal acquisition circuit and the super video input interface that is connected with described super video signal acquisition circuit.
Further, the output of described analog-digital conversion data acquisition chip is provided with the standard data interface that connects the field programmable gate array platform.
Further, the output of described analog-digital conversion data acquisition chip is provided with the standard data interface that connects signal storage.
Preferably, described standard data interface is an insertion slot type socket interface.
Preferably, described signal storage is a logic analyzer.
Further, the clock line of described analog-digital conversion data acquisition chip is connected with described standard data interface.
Further, the source crystal that has of 27M is adopted in the clock source of described system.
Further, the 5V adapter provides system power supply for described system.
Compared with prior art, increased the analog-digital conversion data acquisition chip in the technical solutions of the utility model, the fpga system board has just no longer needed with the fpga plate of sampling function, therefore can buy the few fpga plate of enough functions of trying one's best, so that the buying expenses of the test platform of low costliness; And described analog-digital conversion data acquisition chip can select to satisfy the Adc chip of different accuracy and effect, in conjunction with logic analyzer data are stored simultaneously, the data of the specific format of storage as decoding and the signal source used of back end processing module, use this signal source, the whole system design just can be in different place designs, if the data of identical front end adc are arranged, back-end processing just can have identical front end environment signal and carry out signal processing, designed the back and just can carry out the assessment of effect by identical standard, thereby time and space and environmental limit have been broken, can improve development efficiency, reduce development cost; Can save simultaneously expensive signal generator in the validity that has improved circuit recruitment evaluation and checking.
Description of drawings
Fig. 1 is video data acquiring and a storage system composition frame chart among the utility model embodiment;
Fig. 2 is the schematic diagram of signal acquisition circuit among the utility model embodiment.
Embodiment
Below in conjunction with accompanying drawing the utility model embodiment is described in detail.
The utility model embodiment provides a kind of video data acquiring and storage system, as shown in Figure 1, comprise: analog-digital conversion data acquisition chip 1, and the signal acquisition circuit 2 that is electrically connected with described analog-digital conversion data acquisition chip 1, described signal acquisition circuit comprises: baseband video signal Acquisition Circuit, demonstration drawing array signal Acquisition Circuit, color difference components signal acquisition circuit and super video signal acquisition circuit.
Particularly, this equipment is mainly used in data sampling and the adc data-signal transforms, just can preserve the data that collect in conjunction with logic analyzer, this video data acquiring and storage system are by the interface of standard simultaneously, can be directly connected to astra v5 emulation platform and ip port emulation platform etc., the signal of collection inputs to these fpga platforms and carries out real time signal processing.Therefore, this data acquisition system both can be used as the front end data sampling of fpga emulation, can be used as the data acquisition system that can store data again.
Video data acquiring that the utility model provides and storage system are by own integrated analog-digital conversion data acquisition chip and data acquisition board, the fpga system board has just no longer needed with the fpga plate of sampling function, one is bought the buying expenses that the few fpga plate of enough functions of trying one's best can reduce expensive test platform, and it two is Adc chips that the sampling plate of own design can select to satisfy different accuracy and effect.In conjunction with logic analyzer data are stored simultaneously, the data of the specific format of storage as decoding and the signal source used of back end processing module, use this signal source, the whole system design just can be in different place designs, if the data of identical front end adc are arranged, everybody back-end processing just can have identical front end environment signal and carries out signal processing like this, has designed the back and just can carry out the assessment etc. of effect by identical standard, can save the signal generator of costliness simultaneously.Therefore, data acquisition system has been arranged, we have just broken time and space and environmental limit, can improve development efficiency, reduce development cost, have improved the validity of circuit recruitment evaluation and checking.
In order to realize the transmission of image data and signal data, described analog-digital conversion data acquisition chip has been reserved signal input interface, so that realization is connected with above-mentioned each circuit, specifically comprise: the base band video input interface that is connected with described baseband video signal Acquisition Circuit; The demonstration drawing array input interface that is connected with described demonstration drawing array signal Acquisition Circuit; Color difference components input interface that is connected with described color difference components signal acquisition circuit and the super video input interface that is connected with described super video signal acquisition circuit.
With the circuit diagram of above-mentioned each interface specifically as shown in Figure 2, comprising: base band video input interface RCA4 is arranged, show drawing array input interface VGA_PORT J9, color difference components input interface RCA1, RCA2, RCA3 and super video input interface SV1.The circuit of each road signal build-out resistor over the ground all adopts 75 ohm of instrument and meter compatibility standard output requirement; This system power supply is originated directly from the 5V adapter, and then converts 1.8v and the 3.3v that system also needs to by 1do.
The source crystal that has of 27M is adopted in the clock source of this system, under base band video and super video situation, directly adopt the work sample frequency of the clock of 27m crystal as Adc, when showing under drawing array and the color difference components situation hp11 that the sampling clock of Adc carries from cat 901.
The analog-digital conversion data acquisition chip that uses in the present embodiment can for but be not limited to the cat901 chip, this chip adopts i
2The c agreement is controlled, and can directly be come it is controlled by computer by the parallel port instrument, also can be by connecting the i of fpga
2C comes it is carried out i
2The control of c agreement; Any chip with this function can be used in embodiments of the present invention, and the utility model embodiment does not limit this; Owing to adopt such chip to have multiple control modes, make utiliztion ratio more convenient.
The output of described analog-digital conversion data acquisition chip is provided with the standard data interface and the standard data interface that is connected described signal storage that connects the field programmable gate array platform.Described standard data interface is an insertion slot type socket interface.Data clock output line after the Adc conversion has been connected to the standard data interface of field programmable gate array platform, can directly be plugged on the platform interface of fpga by the device on the standard data interface that is welded on the field programmable gate array platform, certainly the port of fpga need carry out initialization definitions according to the definition of order of the standard data interface of field programmable gate array platform.Data acquisition board directly passes to the fpga simulation and verification platform to data in real time by the standard data interface of field programmable gate array platform, carries out real-time simulation of Signal Processing for fpga and uses.
The standard data interface that DOL Data Output Line after the Adc conversion and clock line also have been connected to described signal storage, the standard data interface of described signal storage adopts the dual-in-line device, the digital probe of logic analyzer just can directly be plugged on the standard data interface of described signal storage like this, handles for data acquisition and preservation.
Described signal storage is a logic analyzer, this logic analyzer adopts the general logic analyzer in laboratory to get final product, but logic analyzer is preserved the text formatting that need be set to rear end simulation requirements correspondence to the collection of data, needs to set the sampling depth of logic analyzer and interior external clock etc. as requested.
Compared with prior art, increased the analog-digital conversion data acquisition chip in the technical solutions of the utility model, the fpga system board has just no longer needed with the fpga plate of sampling function, therefore can buy the few fpga plate of enough functions of trying one's best, so that the buying expenses of the test platform of low costliness; And described analog-digital conversion data acquisition chip can select to satisfy the Adc chip of different accuracy and effect, in conjunction with logic analyzer data are stored simultaneously, the data of the specific format of storage as decoding and the signal source used of back end processing module, use this signal source, the whole system design just can be in different place designs, if the data of identical front-end A dc are arranged, back-end processing just can have identical front end environment signal and carry out signal processing, designed the back and just can carry out the assessment of effect by identical standard, thereby time and space and environmental limit have been broken, can improve development efficiency, reduce development cost; Can save simultaneously expensive signal generator in the validity that has improved circuit recruitment evaluation and checking.
The above; it only is embodiment of the present utility model; but protection range of the present utility model is not limited thereto; anyly be familiar with those skilled in the art in the technical scope that the utility model discloses; can expect easily changing or replacing, all should be encompassed within the protection range of the present utility model.Therefore, protection range of the present utility model should be as the criterion with the protection range of described claim.
Claims (10)
1. video data acquiring and storage system, it is characterized in that, comprise: the analog-digital conversion data acquisition chip, and the signal acquisition circuit that is electrically connected with described analog-digital conversion data acquisition chip, described signal acquisition circuit comprises: baseband video signal Acquisition Circuit, demonstration drawing array signal Acquisition Circuit, color difference components signal acquisition circuit and super video signal acquisition circuit.
2. video data acquiring according to claim 1 and storage system is characterized in that, described signal acquisition circuit build-out resistor over the ground is 75 ohm.
3. video data acquiring according to claim 1 and storage system, it is characterized in that, described analog-digital conversion data acquisition chip has been reserved signal input interface, and described signal input interface comprises: the base band video input interface that is connected with described baseband video signal Acquisition Circuit; The demonstration drawing array input interface that is connected with described demonstration drawing array signal Acquisition Circuit; Color difference components input interface that is connected with described color difference components signal acquisition circuit and the super video input interface that is connected with described super video signal acquisition circuit.
4. video data acquiring according to claim 1 and storage system is characterized in that, the output of described analog-digital conversion data acquisition chip is provided with the standard data interface that connects the field programmable gate array platform.
5. video data acquiring according to claim 1 and storage system is characterized in that, the output of described analog-digital conversion data acquisition chip is provided with the standard data interface that connects signal storage.
6. video data acquiring according to claim 5 and storage system is characterized in that, described standard data interface is an insertion slot type socket interface.
7. video data acquiring according to claim 5 and storage system is characterized in that, described signal storage is a logic analyzer.
8. video data acquiring according to claim 5 and storage system is characterized in that, the clock line of described analog-digital conversion data acquisition chip is connected with described standard data interface.
9. video data acquiring according to claim 1 and storage system is characterized in that, the source crystal that has of 27M is adopted in the clock source of described system.
10. according to described video data acquiring of the arbitrary claim of claim 1-9 and storage system, it is characterized in that the 5V adapter provides system power supply for described system.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009202164706U CN201479244U (en) | 2009-09-16 | 2009-09-16 | Video data acquisition and storage system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009202164706U CN201479244U (en) | 2009-09-16 | 2009-09-16 | Video data acquisition and storage system |
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| Publication Number | Publication Date |
|---|---|
| CN201479244U true CN201479244U (en) | 2010-05-19 |
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| CN2009202164706U Expired - Fee Related CN201479244U (en) | 2009-09-16 | 2009-09-16 | Video data acquisition and storage system |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104780318A (en) * | 2015-04-27 | 2015-07-15 | 吉林大学 | Analog video signal acquisition system |
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2009
- 2009-09-16 CN CN2009202164706U patent/CN201479244U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104780318A (en) * | 2015-04-27 | 2015-07-15 | 吉林大学 | Analog video signal acquisition system |
| CN104780318B (en) * | 2015-04-27 | 2017-07-25 | 吉林大学 | Analog video signal acquisition system |
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100519 Termination date: 20120916 |