CN104780318A - Analog video signal acquisition system - Google Patents
Analog video signal acquisition system Download PDFInfo
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- CN104780318A CN104780318A CN201510205090.2A CN201510205090A CN104780318A CN 104780318 A CN104780318 A CN 104780318A CN 201510205090 A CN201510205090 A CN 201510205090A CN 104780318 A CN104780318 A CN 104780318A
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Abstract
The invention discloses an analog video signal acquisition system in order to solve the problems that when a single-chip microcomputer of an existing intelligent vehicle model recognizes a road through an analog camera, acquisition speed is not large enough, and analog video signals cannot be accurately and effectively utilized. The system comprises a rechargeable battery, a single-chip microcomputer U1, a voltage stabilizing circuit, a direct-current motor, a servo controller, a driving circuit, an analog circuit and a video signal processing circuit. The rechargeable battery is in line connection with the voltage stability circuit and the driving circuit, and the voltage stabilizing circuit is in line connection with the analog camera, the video signal processing circuit and the single-chip microcomputer U1. A video signal line of the analog camera is connected with a pin 2 of a chip U8 of the video signal processing unit, and a pin 3 of the chip U8 is connected with a pin PTB0 of the single-chip microcomputer. Two paths of PWM of the single-chip microcomputer U1 are sequentially connected with a half-bridge drive chip U5 of the driving circuit and a pin 2 of a half-bridge drive chip U6. A white line of the servo controller is connected with one path of PWM of the single-chip microcomputer U1. The driving circuit is in line connection with the direct-current motor.
Description
Technical field
The present invention relates to a kind of harvester belonging to sensing technology and automation aspect, or rather, the present invention relates to a kind of analog video signal acquisition system.
Background technology
Along with the high speed development of automated information technology, intelligent automobile has become the topic discussed warmly now.Intelligent automobile mainly utilizes various transducer carry out information gathering and process, thus realizes intelligence traveling; Assisting by automatic control technology, intelligent automobile will improve vehicle safety and comfortableness greatly.As the simplified model of intelligent automobile, intelligent vehicle model can be good at simulated intelligence automobile information acquisition process, automatically controls.
When existing intelligent automobile perception is extraneous, information is all by camera collection greatly.Checking intelligent automobile is can be good to the acquisition process of vision signal by research camera intelligent vehicle model.The existing intelligent vehicle model based on camera is mainly having the collection of simulation camera signals AD conversion, digital camera I/O port collection etc. to the collection of image information.But due to Chip Microcomputer A/D picking rate limited, use simulation camera cannot collect complete image, cause gather inaccuracy, intelligent vehicle model cannot accurately control; And digital camera occupies a large amount of I/O port, and data volume is huge, brings very large burden can to single-chip microcomputer acquisition process, be unfavorable for that intelligent vehicle model accurately identifies road equally, reach automatic control.
It is many that current simulation camera has amount of information as transducer, and noise is few, and discrimination is high, controls accurately effective advantage.But problem is the shortcoming that amount of information multi-band is come is that process is complicated, and collection period is long, thus causes identifying frequency decrease.In addition, simulation camera sensing device is when using generally by analog-to-digital method, and this has certain requirement to analog-to-digital conversion frequency, cannot gather by the lower single-chip microcomputer of operating speed.
If can AD conversion be avoided, only gathering effective road information, so just when not increasing single-chip microcomputer burden, intelligent vehicle model accurately effective control automatically can be realized.
Summary of the invention
Technical problem to be solved by this invention is that when on existing intelligent vehicle model, single-chip microcomputer utilizes simulation camera identification road, acquisition rate is inadequate, accurate and effective cannot utilize the problem of analog video signal, provide a kind of analog video signal acquisition system.
For solving the problems of the technologies described above, the present invention adopts following technical scheme to realize: described analog video signal acquisition system comprises rechargeable battery, single-chip microcomputer U1, voltage stabilizing circuit, direct current machine, Servo-controller, drive circuit, simulation camera and video processing circuit;
Described voltage stabilizing circuit comprises 5V voltage stabilizing circuit, 12V voltage stabilizing circuit and 3.3V voltage stabilizing circuit;
Described video processing circuit comprises video separation circuit and hardware binarization circuit;
Model in rechargeable battery positive pole and 5V voltage stabilizing circuit is the 1 pin electrical connection of the voltage stabilizing chip U2 of LM2940, and the negative pole of rechargeable battery and the model in voltage stabilizing circuit are that 2 pins of the voltage stabilizing chip U2 of LM2940 are electrically connected; 2 pins of rechargeable battery positive pole and the model in drive circuit to be model in 2 pins of the metal-oxide-semiconductor Q1 of IRF3205 and drive circuit the be metal-oxide-semiconductor Q3 of IRF3205 are connected; 12V power output end in 12V voltage stabilizing circuit connects the red wiring on simulation camera; 5V power output end in 5V voltage stabilizing circuit and the model in video separation circuit are that 8 lead-foot-lines of the chip U8 of LM1881 are connected; 5V power output end in the 5V voltage stabilizing circuit model connect in hardware binarization circuit is 8 pins of the chip U7 of AD8032; The 5V power output end of 5V voltage stabilizing circuit connects the red wiring of Servo-controller; The 3.3V power output end of 3.3V voltage stabilizing circuit and single-chip microcomputer U1 VCC pin be connected;
2 lead-foot-lines that yellow video signal cable VIDEO on described simulation camera is the chip U8 of LM1881 by electric capacity C5 and the model in video separation circuit are connected; The yellow video signal cable VIDEO model accessed in hardware binarization circuit of simulation camera is 5 pins of the chip U7 of AD8032; Model in hardware binarization circuit is the interrupt pin that 1 pin of the chip U7 of AD8032 meets PTB2, PTB3 of single-chip microcomputer U1 respectively; Model in video separation circuit is that 3 pins of the chip U8 of LM1881 connect interrupt pin in single-chip microcomputer U1 and PTB0 pin; 2 pins of to be the half-bridge driven chip U5 of IR2104S and model the be half-bridge driven chip U6 of IR2104S of the two-way PWM pin model connect successively in drive circuit in single-chip microcomputer U1; 2 pins of to be model in 3 pins of the metal-oxide-semiconductor Q3 of IRF3205 and drive circuit the be metal-oxide-semiconductor Q4 of IRF3205 of the model in drive circuit are connected with one end of direct current machine, and 2 pins of to be model in 3 pins of the metal-oxide-semiconductor Q1 of IRF3205 and drive circuit the be metal-oxide-semiconductor Q2 of IRF3205 of the model in drive circuit are connected with the other end of direct current machine; White wiring on described Servo-controller connects 1 road PWM pin on single-chip microcomputer U1.
1 pin of the model connect in drive circuit of the 12V power output end in the 12V voltage stabilizing circuit described in technical scheme to be the half-bridge driven chip U5 of IR2104S and model the be half-bridge driven chip U6 of IR2104S; The 3.3V power output end of 3.3V voltage stabilizing circuit connects the other end of the resistance R13 in hardware binarization circuit.
Rechargeable battery described in technical scheme is connected with voltage stabilizing circuit electric wire and refers to: the rechargeable battery positive pole model connect in 5V voltage stabilizing circuit is 1 pin and the Vin pin of the voltage stabilizing chip U2 of LM2940, and the negative electrode of rechargeable batteries model connect in 5V voltage stabilizing circuit is 2 pins and the GND pin of the voltage stabilizing chip U2 of LM2940; 5 lead-foot-lines that negative electrode of rechargeable batteries is the voltage stabilizing chip U3 of 34063 by variable resistor R1 and the model in 12V voltage stabilizing circuit are connected; 6 lead-foot-lines that model in 5V voltage stabilizing circuit is 3 pins of the voltage stabilizing chip U2 of LM2940 and Vout pin is the voltage stabilizing chip U3 of 34063 with the model in 12V voltage stabilizing circuit are connected; Model in 3.3V voltage stabilizing circuit is the 5V power output end that 3 pins of the voltage stabilizing chip U4 of LM1117 connect 5V voltage stabilizing circuit.
5V voltage stabilizing circuit described in technical scheme also comprises electrochemical capacitor C20 and electrochemical capacitor C21; Model is the positive terminal that 1 pin of the voltage stabilizing chip U2 of LM2940 and Vin pin meet electrochemical capacitor C20, model is the positive terminal that 3 pins of the voltage stabilizing chip U2 of LM2940 and Vout pin meet electrochemical capacitor C21, the negative pole end ground connection of electrochemical capacitor C20 and electrochemical capacitor C21, model is 2 pins and the GND pin ground connection of the voltage stabilizing chip U2 of LM2940.
12V voltage stabilizing circuit described in technical scheme also comprises inductance L 4, resistance R2, resistance R3, resistance RES4, electric capacity C1, electrochemical capacitor C2, electric capacity C25; Model is that 7 pins that 1 pin and the model of the voltage stabilizing chip U3 of 34063 is the voltage stabilizing chip U3 of 34063 are connected by an inductance L 4, model be 34063 8 pins of voltage stabilizing chip U3 be connected with an end line of resistance R2, the resistance R2 other end and model are that 7 lead-foot-lines of the voltage stabilizing chip U3 of 34063 are connected; Model is that 7 lead-foot-lines being the voltage stabilizing chip U3 of 34063 with model after the 6 pin contact resistance R3 of the voltage stabilizing chip U3 of 34063 are connected; Model is the positive pole that 1 pin of the voltage stabilizing chip U3 of 34063 connects that model is the diode D1 of IN4007, model is one end of the diode D1 negative pole contact resistance RES4 of IN4007, and the other end and the model of resistance RES4 are that 5 lead-foot-lines of the voltage stabilizing chip U3 of 34063 are connected; Model is that the negative pole exit of the diode of IN4007 is 12V power end; Model be the voltage stabilizing chip U3 of 34063 6 pins and ground and model be between the negative pole of the diode of IN4007 and ground, access electric capacity C1 and electrochemical capacitor C2; Model be the voltage stabilizing chip U3 of 34063 2 pins be connected in series 1 electric capacity C25 between 3 pins, simultaneously model is the 2 pin ground connection of the voltage stabilizing chip U3 of 34063.
3V voltage stabilizing circuit described in technical scheme also comprises electrochemical capacitor C22, electric capacity C23 and electric capacity C24; Model is the 1 pin ground connection of the voltage stabilizing chip U4 of LM1117, model is that 2 pins of the voltage stabilizing chip U4 of LM1117 are output 3.3V power end, model is one end that 3 pins of the voltage stabilizing chip U4 of LM1117 meet electric capacity C24, model is one end that 2 pins of the voltage stabilizing chip U4 of LM1117 meet electric capacity C23 and electrochemical capacitor C22, the other end ground connection of electric capacity C24, electric capacity C23 and electrochemical capacitor C22.
Drive circuit described in technical scheme also comprises metal-oxide-semiconductor Q1, metal-oxide-semiconductor Q2, metal-oxide-semiconductor Q3, metal-oxide-semiconductor Q4, diode D2, diode D3, diode D4, diode D5, diode D6, diode D7, resistance R4, resistance R5, resistance R6, resistance R7, electric capacity C3 and electric capacity C4; Wherein: metal-oxide-semiconductor Q1, metal-oxide-semiconductor Q2, metal-oxide-semiconductor Q3 and metal-oxide-semiconductor Q4 are all the metal-oxide-semiconductor that model is IRF3205, diode D2, diode D3, diode D4, diode D5, diode D6 and diode D7 are all the diode that model is IN4148.The equal ground connection of 3,4 pin of model to be the half-bridge driven chip U5 of IR2104S and model the be half-bridge driven chip U6 of IR2104S, 8 pins of model to be the half-bridge driven chip U5 of IR2104S and model the be half-bridge driven chip U6 of IR2104S connect the negative pole of diode D2 and diode D3 respectively, and the positive pole of diode D2 and diode D3 all connects 12V power output end; Model is the negative pole that 6 pins that half-bridge driven chip U5 and the model of IR2104S is the half-bridge driven chip U6 of IR2104S are connected electrochemical capacitor C3 and electrochemical capacitor C4 successively, and the positive pole of electrochemical capacitor C3 and electrochemical capacitor C4 connects the negative pole of diode D2 and diode D3 respectively; Model is the negative pole that 5,7 pins that half-bridge driven chip U5 and the model of IR2104S is the half-bridge driven chip U6 of IR2104S are respectively connected diode D5, diode D4 and diode D7, diode D6, and diode D5, diode D4 are connected with the G level line of metal-oxide-semiconductor Q2, metal-oxide-semiconductor Q1, metal-oxide-semiconductor Q4, metal-oxide-semiconductor Q3 respectively with the positive pole of diode D7, diode D6; The two ends of diode D5, diode D4, diode D7 and diode D6 are in parallel with resistance R6 two ends with resistance R5, resistance R4, resistance R7 successively; Model is that 7 pins of the half-bridge driven chip U5 of IR2104S are connected with the negative pole of diode D4, the positive pole of diode D4 is connected with 1 lead-foot-line of metal-oxide-semiconductor Q1, model is that 5 pins of the half-bridge driven chip U5 of IR2104S are connected with the negative pole of diode D5, the positive pole of diode D5 is connected with 1 lead-foot-line of metal-oxide-semiconductor Q2, model is that 7 pins of half-bridge driven chip U6 of IR2104S are connected with 1 lead-foot-line of metal-oxide-semiconductor Q3, and model is that 5 pins of half-bridge driven chip U6 of IR2104S are connected with 1 lead-foot-line of metal-oxide-semiconductor Q4; Metal-oxide-semiconductor Q1 is all connected with anode with 2 pins of metal-oxide-semiconductor Q3; The equal ground connection of 3 pin of metal-oxide-semiconductor Q2 and metal-oxide-semiconductor Q4; 3 pins of metal-oxide-semiconductor Q1 are connected with 2 lead-foot-lines of metal-oxide-semiconductor Q2; 3 pins of metal-oxide-semiconductor Q3 are connected with 2 lead-foot-lines of metal-oxide-semiconductor Q4; 3 pins of metal-oxide-semiconductor Q1 are connected with a wiring of motor M OTOR, and 3 pins of metal-oxide-semiconductor Q3 are connected with another wiring of motor M OTOR; 3 pins and the model of metal-oxide-semiconductor Q1 are that 6 lead-foot-lines of the half-bridge driven chip U5 of IR2104S are connected, and 3 pins and the model of metal-oxide-semiconductor Q3 are that 6 lead-foot-lines of the half-bridge driven chip U6 of IR2104S are connected.
Video separation circuit described in technical scheme also comprises electric capacity C5, electric capacity C6 and resistance R8; One end and the model of electric capacity C5 are that 2 lead-foot-lines of the chip U8 of LM1881 are connected, and model is the 4 pin ground connection of the chip U8 of LM1881; Model is one end that 6 pins of the chip U8 of LM1881 meet electric capacity C6 and resistance R8 simultaneously, the other end ground connection of electric capacity C6 and resistance R8; Model is that 1 pin of the chip U8 of LM1881 receives interrupt pin in single-chip microcomputer U1 and PTB1 pin.
Hardware binarization circuit described in technical scheme comprises chip U7 that model is AD8032, resistance R9, resistance R10, resistance R11, resistance R12, resistance R13, resistance R14 and resistance R15; Model is be connected in series adjustable resistance R9 between 6 pins of the chip U7 of AD8032 and 7 pins, and model is one end of the 6 pin connecting resistance R10 of the chip U7 of AD8032, resistance R10 other end ground connection; Model is the one end of the video signal VIDEO 1 connecting resistance R11 after the 7 pins outputs of the chip U7 of AD8032 are amplified, and resistance R11 other end direct type number is 2 pins of the chip U7 of AD8032; Model is the 4 pin ground connection of the chip U7 of AD8032; Model is one end of the 1 pin connecting resistance R12 of the chip U7 of AD8032, and resistance R12 other end direct type number is 3 pins of the chip U7 of AD8032; Model is one end of the 1 pin connecting resistance R13 of the chip U7 of AD8032; Model is 2 pins of one end of the 3 pin connecting resistance R14 of the chip U7 of AD8032, another termination slide rheostat R15 of resistance R14, and the left and right pin of slide rheostat R15 connects 5V power output end and the ground of 5V voltage stabilizing circuit respectively.
Rechargeable battery described in technical scheme adopts model to be the battery of 7.2VNi-Cd; Single-chip microcomputer U1 adopts model to be the single-chip microcomputer of MKL26Z256VLL4; Direct current machine adopts model to be the motor of RS-380; Servo-controller adopts model to be the servomotor of SD-05; Simulation camera employing model is the simulation camera of SONY CCD 420 line.
Compared with prior art the invention has the beneficial effects as follows:
1. analog video signal acquisition system of the present invention only needs the hopping edge gathering the every line output signal of simulation camera to be generally 3-4, and the data volume of namely often going becomes 4 from original 640, the data volume of the camera sensing device greatly reduced.
2. analog video signal acquisition system of the present invention is by hardware binarization and interrupt acquisition, utilizes the counter records value of single-chip microcomputer to replace camera signals accurately to find road edge position.Avoid the one by one collection of single-chip microcomputer to high-frequency camera signals, alleviate the burden of single-chip microcomputer, make low side single-chip microcomputer also well can utilize simulation camera collection road information.Meanwhile, because Counter Value by Single-chip Controlling, can realize programmer and be changed the acquisition precision of often going by programming, and the hopping edge gathered can be still 4, so do not increase the data volume of signal while of accomplishing to put forward high-precision, alleviates single-chip microcomputer burden.
3. analog video signal acquisition system of the present invention is by down trigger mode acquisition camera signal, the row data that single-chip microcomputer has gathered in the process of interruption free time can be made, improve the efficiency of single-chip microcomputer process image, improve the control frequency of intelligent vehicle model simultaneously.
4. the video processing circuits needed for analog video signal acquisition system of the present invention is simple, adapts to any a single-chip microcomputer having four tunnels and above external interrupt, and that can accomplish both to have reduced intelligent vehicle model builds cost, accurately can identify road again.
5. analog video signal acquisition system of the present invention strong adaptability in software, can change the identification of road edge number by programming, thus by algorithm identified multidiameter delay or road there being the road conditions of other article.
Accompanying drawing explanation
Below in conjunction with accompanying drawing, the present invention is further illustrated:
Fig. 1 is the structure principle chart of analog video signal acquisition system of the present invention;
Fig. 2 is analog video signal acquisition system structure chart of the present invention;
Fig. 3 is the structure principle chart of voltage stabilizing circuit in analog video signal acquisition system of the present invention;
Fig. 4 is the structure principle chart of drive circuit in analog video signal acquisition system of the present invention;
Fig. 5-1 is the structure principle chart of video separation circuit in video processing circuit in analog video signal acquisition system of the present invention;
Fig. 5-2 is the structure principle chart of hardware binarization circuit in video processing circuit in analog video signal acquisition system of the present invention;
Fig. 6 is the analogue video signal processing circuit signal transition diagram in analog video signal acquisition system of the present invention;
Fig. 7 is the main program flow block diagram of analog video signal acquisition system collection signal of the present invention;
Fig. 8 is that FB(flow block) is interrupted on analog video signal acquisition system collection signal program 4 tunnel of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the present invention is explained in detail:
Below in conjunction with drawings and the specific embodiments, the present invention is described in detail.
Consult Fig. 1, analog video signal acquisition system of the present invention is based on intelligent vehicle model, and the hardware needed for installation forms; Simulation camera collection analog video signal in analog video signal acquisition system, adopts single-chip microcomputer treatment of simulated vision signal, controls turning to and travelling of intelligent vehicle model by after effective analog video signal collection analysis; Namely mainly realize effective identification of road and control intelligent vehicle model automatic guide sailing function by hardware and software consonance treatment of simulated vision signal.
Consult Fig. 2, analog video signal acquisition system of the present invention comprises rechargeable battery, single-chip microcomputer U1, voltage stabilizing circuit, direct current machine, Servo-controller, drive circuit, simulation camera and video processing circuit.
Described rechargeable battery adopts model to be the rechargeable battery of 7.2VNi-Cd.
Described single-chip microcomputer U1 is the model of Freescale is the single-chip microcomputer of MKL26Z256VLL4, wherein adopt any four tunnel external interrupt pins, here PTB0 pin is used, PTB1 pin, PTB2 pin, PTB3 pin, four pass pin access the video separation circuit shown in Fig. 5-1 and the hardware binarization circuit shown in Fig. 5-2 respectively; Also adopt 3 road PWM pins and PWM1 pin, PWM2 pin and PWM3 pin, PWM3 is connected with the white line of steering wheel, PWM1 and PWM2 accesses the motor-drive circuit shown in Fig. 4 respectively.In the voltage stabilizing circuit that single-chip microcomputer U1 powers as shown in Figure 3, the power output end of 3.3V voltage stabilizing circuit provides.
Consult Fig. 3, described voltage stabilizing circuit comprises 5V voltage stabilizing circuit, 12V voltage stabilizing circuit and 3.3V voltage stabilizing circuit.
1. the 5V voltage stabilizing circuit described in comprises voltage stabilizing chip U2, the electrochemical capacitor C20 and electrochemical capacitor C21 that model is LM2940.
Model is the voltage stabilizing chip U2 of LM2940 is the chip that TI company produces, model is that the voltage stabilizing chip U2 of LM2940 has 3 pins, model is that 1 pin of the voltage stabilizing chip U2 of LM2940 and Vin pin connect input voltage, model is 2 pins and the GND pin ground connection of the voltage stabilizing chip U2 of LM2940, and model is that 3 pins of the voltage stabilizing chip U2 of LM2940 and Vout pin connect output voltage terminal.Rechargeable battery positive pole is linked 1 pin and Vin pin that model is the voltage stabilizing chip U2 of LM2940, negative pole and the model of rechargeable battery are that 2 pins of the voltage stabilizing chip U2 of LM2940 and GND pin are electrically connected, then model is that 3 pins of the voltage stabilizing chip U2 of LM2940 and Vout pin export 5V power supply.Rechargeable battery positive pole and output 5V power end can connect the electrochemical capacitor C20 of a filtering and the positive terminal of electrochemical capacitor C21 respectively, and the negative pole end ground connection of electrochemical capacitor C20 and electrochemical capacitor C21, to strengthen stability.
2. the 12V voltage stabilizing circuit described in comprises voltage stabilizing chip U3, inductance L 4, variable resistor R1, resistance R2, resistance R3, resistance RES4, electric capacity C1, electrochemical capacitor C2, the electric capacity C25 that model is 34063.
Model be 34063 voltage stabilizing chip U3 be TI company produce chip, this chip has 8 pins.6 lead-foot-lines being the voltage stabilizing chip U3 of 34063 by 3 pins of 5V voltage stabilizing circuit output 5V voltage and model are connected; 5 lead-foot-lines that negative electrode of rechargeable batteries is the voltage stabilizing chip U3 of 34063 by the variable resistor R1 of a 10K and model are connected; Model is that 7 pins that 1 pin and the model of the voltage stabilizing chip U3 of 34063 is the voltage stabilizing chip of 34063 are connected by 220um inductance L 4 line; Model is that 8 pins of the voltage stabilizing chip U3 of 34063 are connected with resistance R2 mono-end line in 220 Europe, and the resistance R2 other end and model are that 7 lead-foot-lines of the voltage stabilizing chip of 34063 are connected; Model is that 7 lead-foot-lines being the voltage stabilizing chip U3 of 34063 with model after 6 pins of the voltage stabilizing chip U3 of 34063 connect a 1 Europe resistance R3 are connected; Model is the positive pole that 1 pin of the voltage stabilizing chip U3 of 34063 connects that model is the diode D1 of IN4007, model is that the diode D1 negative pole of IN4007 connects a 47K resistance RES4 one end, and the resistance RES4 other end and model are that 5 lead-foot-lines of the voltage stabilizing chip of 34063 are connected.Be that the negative pole exit of the diode of IN4007 is 12V power end by model.On 5V voltage end and ground and electric capacity C1 and electrochemical capacitor C2 filtering between 12V voltage end and ground, can be accessed; Model be the voltage stabilizing chip U3 of 34063 2 pins be connected in series 1 electric capacity C25 between 3 pins, simultaneously model is the 2 pin ground connection of the voltage stabilizing chip U3 of 34063.
3. the 3V voltage stabilizing circuit described in comprises voltage stabilizing chip U4, electrochemical capacitor C22 that model is LM1117, electric capacity C23 and electric capacity C24.
Model is the voltage stabilizing chip U4 of LM1117 is the chip that TI company produces, model is that the voltage stabilizing chip U4 of LM1117 has 3 pins, model is the 1 pin ground connection of the voltage stabilizing chip U4 of LM1117, model is the 5V power end that 3 pins of the voltage stabilizing chip U4 of LM1117 connect 5V voltage stabilizing circuit, model is that 2 pins of the voltage stabilizing chip U4 of LM1117 export 3.3V power supply, and namely model is 2 pins of the voltage stabilizing chip U4 of LM1117 is 3.3V voltage output end.5V input supply terminal and 3.3V power output end can connect one end that namely filter capacitor meets electric capacity C24 and electric capacity C23 and electrochemical capacitor C22 respectively respectively, the other end ground connection of electric capacity C24 and electric capacity C23 and electrochemical capacitor C22, strengthen stability.
Consult Fig. 4, described drive circuit comprises the metal-oxide-semiconductor Q1 that model is IRF3205, model is the metal-oxide-semiconductor Q2 of IRF3205, model is the metal-oxide-semiconductor Q3 of IRF3205, model is the metal-oxide-semiconductor Q4 of IRF3205, model is the half-bridge driven chip U5 of IR2104S, model is the half-bridge driven chip U6 of IR2104S, model is the diode D2 of IN4148, model is the diode D3 of IN4148, model is the diode D4 of IN4148, model is the diode D5 of IN4148, model is the diode D6 of IN4148, model is the diode D7 of IN4148, resistance R4, resistance R5, resistance R6, resistance R7, electric capacity C3 and electric capacity C4.
The half-bridge driven chip U6 of described model to be the half-bridge driven chip U5 of IR2104S and model be IR2104S all has 8 pins; The metal-oxide-semiconductor Q4 of the metal-oxide-semiconductor Q2 that the metal-oxide-semiconductor Q1 that model is IRF3205, model are IRF3205, model to be the metal-oxide-semiconductor Q3 of IRF3205 and model be IRF3205 all has 3 pins, and be divided into G, D, S pole, is respectively 1,2,3 pins.The single-chip microcomputer U1 remaining two-way PWM pin by model being MKL26Z256VLL4 is accessed respectively 2 pins that the half-bridge driven chip U5 that model is IR2104S and model are the half-bridge driven chip U6 of IR2104S, the equal ground connection of 3,4 pin of model to be the half-bridge driven chip U5 of IR2104S and model the be half-bridge driven chip U6 of IR2104S, 1 pin of model to be the half-bridge driven chip U5 of IR2104S and model the be half-bridge driven chip U6 of IR2104S all connects the 12V power output end in 12V voltage stabilizing circuit, 8 pins of model to be the half-bridge driven chip U5 of IR2104S and model the be half-bridge driven chip U6 of IR2104S connect the negative pole that diode D2 that a model is IN4148 and model are the diode D3 of IN4148 respectively, and the positive pole of model to be the diode D2 of IN4148 and model the be diode D3 of IN4148 all connects 12V power output end, model is the negative pole that 6 pins that half-bridge driven chip U5 and the model of IR2104S is the half-bridge driven chip U6 of IR2104S are connected the electrochemical capacitor C3 of 100 microfarads and the electrochemical capacitor C4 of 100 microfarads successively, and the positive pole of electrochemical capacitor C3 and the electrochemical capacitor C4 respectively direct type number diode D2 that is IN4148 and model is the negative pole of the diode D3 of IN4148, model is the half-bridge driven chip U5 of IR2104S and model is 5 of the half-bridge driven chip U6 of IR2104S, 7 pins respectively link the diode D5 that a model is IN4148, the diode D7 of model to be the diode D4 of IN4148 and model be IN4148, model is the negative pole of the diode D6 of IN4148, model is the diode D5 of IN4148, the diode D7 of model to be the diode D4 of IN4148 and model be IN4148, the metal-oxide-semiconductor Q2 of model to be the positive pole of the diode D6 of IN4148 with model be respectively IRF3205, model is the metal-oxide-semiconductor Q1 of IRF3205, model is the metal-oxide-semiconductor Q4 of IRF3205, model is that G level i.e. 1 lead-foot-line of the metal-oxide-semiconductor Q3 of IRF3205 connects, resistance R5, resistance R4, the resistance R7 in the diode D4 that the diode D5 that model is IN4148, model are IN4148, model to be diode D7 and the model of IN4148 be Europe, two ends successively with 27 of the diode D6 of IN4148 are in parallel with resistance R6 two ends, model is that the negative pole that 7 pins and the model of the half-bridge driven chip U5 of IR2104S is the diode D4 of IN4148 is connected, model is that G level i.e. 1 lead-foot-line that positive pole and the model of the diode D4 of IN4148 is the metal-oxide-semiconductor Q1 of IRF3205 is connected, model is that the negative pole that 5 pins and the model of the half-bridge driven chip U5 of IR2104S is the diode D5 of IN4148 is connected, model is that G level i.e. 1 lead-foot-line that positive pole and the model of the diode D5 of IN4148 is the metal-oxide-semiconductor Q2 of IRF3205 is connected, in like manner, model is that G level i.e. 1 lead-foot-line that 7 pins and the model of the half-bridge driven chip U6 of IR2104S is the metal-oxide-semiconductor Q3 of IRF3205 is connected, model is that G level i.e. 1 lead-foot-line that 5 pins and the model of the half-bridge driven chip U6 of IR2104S is the metal-oxide-semiconductor Q4 of IRF3205 is connected, then model is that D pole i.e. 2 pins that metal-oxide-semiconductor Q1 and the model of IRF3205 are the metal-oxide-semiconductor Q3 of IRF3205 are all connected with anode, the S pole i.e. equal ground connection of 3 pin of model to be the metal-oxide-semiconductor Q2 of IRF3205 and model the be metal-oxide-semiconductor Q4 of IRF3205, model is that D pole i.e. 2 lead-foot-lines that S pole i.e. 3 pins and the model of the metal-oxide-semiconductor Q1 of IRF3205 is the metal-oxide-semiconductor Q2 of IRF3205 are connected, model is that D pole i.e. 2 lead-foot-lines that S pole i.e. 3 pins and the model of the metal-oxide-semiconductor Q3 of IRF3205 is the metal-oxide-semiconductor Q4 of IRF3205 are connected, model is that S pole i.e. 3 pins of the metal-oxide-semiconductor Q1 of IRF3205 are connected with a wiring of motor M OTOR, and model is that S pole i.e. 3 pins of the metal-oxide-semiconductor Q3 of IRF3205 are connected with another wiring of motor M OTOR, model is that 6 lead-foot-lines that S pole i.e. 3 pins and the model of the metal-oxide-semiconductor Q1 of IRF3205 is the half-bridge driven chip U5 of IR2104S are connected, and model is that 6 lead-foot-lines that S pole i.e. 3 pins and the model of the metal-oxide-semiconductor Q3 of IRF3205 is the half-bridge driven chip U6 of IR2104S are connected.
Described direct current machine adopts model to be the motor of RS-380, has two wiring, and the motor of the drive circuit shown in map interlinking 4 exports two ends respectively.
Described Servo-controller adopts model to be the servomotor of SD-05, and it has 3 wiring.Wherein red wiring connects the 5V voltage output terminal in 5V power supply and drive circuit, black wiring ground connection and battery cathode, and white wiring direct type number is 3 PWM pin Zhong mono-tunnels, road on the single-chip microcomputer U1 of MKL26Z256VLL4.
Described simulation camera employing model is the simulation camera of SONY CCD 420 line, it has three wiring, and wherein red line connects the 12V voltage output terminal in 12V power supply and voltage stabilizing circuit, black line ground connection and battery cathode, yellow line is video signal cable, connects video processing circuit.
Described video processing circuit comprises video separation circuit and hardware binarization circuit.
1. consult Fig. 5-1, described video separation circuit comprises chip U8 that model is LM1881, electric capacity C5, electric capacity C6, resistance R8.
Model is the chip U8 of LM1881 is the chip that TI company produces, and model is that the chip U8 of LM1881 has 8 pins.The yellow video signal cable VIDEO of simulation camera receives one end of the patch capacitor C5 of 0.1 microfarad, and the electric capacity C5 other end and model are that 2 lead-foot-lines of the chip U8 of LM1881 are connected; Model is the 4 pin ground connection of the chip U8 of LM1881; Model is one end that 6 pins of the chip U8 of LM1881 meet one end of the electric capacity C6 of 0.1 microfarad and the resistance R8 of a 680K simultaneously, the other end ground connection simultaneously of electric capacity C6 and resistance R8; Model is that 8 pins of the chip U8 of LM1881 are connected with the 5V power supply end line in 5V voltage stabilizing circuit; Model is interrupt pin and the PTB0 pin that 3 pins (field interrupt signal) of the chip U8 of LM1881 receive one of single-chip microcomputer U1 Zhong tetra-tunnel; Model is interrupt pin and the PTB1 pin that 1 pin (row interrupt signal) of the chip U8 of LM1881 receives one of single-chip microcomputer U1 Zhong tetra-tunnel.
2. consult Fig. 5-2, described hardware binarization circuit comprises chip U7 that model is AD8032, resistance R9, resistance R10, resistance R11, resistance R12, resistance R13, resistance R14 and resistance R15.
Model is the chip U7 of AD8032 is the chip that TI company produces, model is that the chip U7 of AD8032 has 8 pins, comprise two operational amplifiers, one of them operational amplifier is used for amplification video signal, vision signal after another operational amplifier inputs an adjustable voltage and amplifies compares, and realizes vision signal binaryzation.The yellow video signal cable VIDEO of simulation camera is accessed 5 pins that model is the chip U7 of AD8032; Be be connected with the adjustable resistance R9 of a 10K between 6 pins of the chip U7 of AD8032 and 7 pins in model; Model is one end that 6 pins of the chip U7 of AD8032 receive a 1K resistance R10, resistance R10 other end ground connection; Model is one end that 7 pins of the chip U7 of AD8032 export that the video signal VIDEO 1 after amplifying receives a 2K resistance R11, and resistance R11 other end direct type number is 2 pins of the chip U7 of AD8032; Model is the 5V power end that 8 pins of the chip U7 of AD8032 connect 5V voltage stabilizing circuit; Model is the 4 pin ground connection of the chip U7 of AD8032; Model is one end that 1 pin of the chip U7 of AD8032 receives a 10K resistance R12, and the resistance R12 other end receives 3 pins that model is the chip U7 of AD8032; Model is the 3.3V power end of one end that 1 pin of the chip U7 of AD8032 receives a 2K resistance R13, another termination 3.3V voltage stabilizing circuit of resistance R13; 1 pin also accesses the PTB2 of single-chip microcomputer U1 respectively simultaneously, PTB3 interrupt pin.Model is one end that 3 pins of the chip U7 of AD8032 receive a 1K resistance R14, and the other end of resistance R14 receives 2 pins of a 10K slide rheostat R15, and the left and right pin of slide rheostat R15 connects 5V power end and the ground of 5V voltage stabilizing circuit respectively.
Analog video signal acquisition system can be built by above-mentioned connection.
The operation principle (control method) of analog video signal acquisition system of the present invention:
When simulation camera is responded to a lot of specific external environment as transducer, do not need the gray value of each pixel to carry out analog-to-digital conversion.
Because simulation camera being the gray value cut-point in order to find relevant position as transducer collection road information, mainly in order to find the boundary positional information of road and roadside material, thus by center calculation, controlling automobile auto-steering and travelling.
Analog video signal acquisition system of the present invention is for the identification requirement of this searching boundary positional information, binary conversion treatment analog video signal, and in conjunction with video separation circuit gather row interrupt signal and field interrupt signal, catch and grab the record binary signal hopping edge time, be converted into position, hopping edge, thus obtain corresponding edge active position information.
Video processing circuit comprises video separation circuit and hardware binarization circuit.
1. consult Fig. 5, after being amplified by amplifying circuit by analog video signal, by amplifying signal input hardware binarization circuit, obtain binaryzation vision signal.Amplifying circuit uses operation amplifier chip AD8032, as comparator in Fig. 2 amplifies and binaryzation.
2. the signal after binaryzation is input to simultaneously two hopping edge triggered interrupts pins.Two pins is rising edge down trigger pattern and trailing edge down trigger pattern respectively, as singlechip interruption collection in Fig. 6.
3. another road original analogue video signal is input to video separation circuit, interrupt signal of must showing up and row interrupt signal, as video separation in Fig. 6.
4. two-path video is separated interrupt signal difference (field signal and row signal) got and is input to another two hopping edge triggered interrupts pins.Two pins is rising edge down trigger pattern and trailing edge down trigger pattern respectively, as singlechip interruption collection in Fig. 6.
The advantage of employing video processing circuit is: only can preserve the effective information about road edge position, the while of carrying high-precision, greatly reduce data volume, be conducive to low side single-chip microcomputer and utilize camera accurately to identify road; Utilize four tunnel down trigger to gather image information, can reduce and take single-chip microcomputer, make single-chip microcomputer have the more time to lead for signal transacting and control and sail.
Described simulation camera sensing device can be any a simulation camera.During the simulation camera sensing device identification road using model to be SONY CCD 420 in such as the present embodiment, road is two with the line of demarcation of road on both sides of the road, namely often row has two separations, therefore line number group is set to 3 or 4 row, ensure to collect separation and remove noise by front and back separation continuous filtering.
Illustrate: when array is 4 row (initial value is 0), when distinguishing road,
If be 255 according to the count maximum that a line time obtains
80th line number group is respectively 50,201,0,0
81st line number group is respectively 20,52,204,253
82nd line number group is respectively 51,205,0,0
Value in described array is the value of counter that two-value signal records when triggering respective interrupt, and to have continuity can obtain link location information be left margin is 50,52, and 51 points such as grade are linked to be curve, and right margin is 201,204, and 205 points such as grade are linked to be curve.More specific location information is
(record value/count maximum) * capable visual field width
Namely left margin point position is respectively (50/225) * capable visual field width, (52/225) * capable visual field width, (51/225) * capable visual field width.
Outline position information can be effectively obtained according to all line number groups.
After visible hardware handles, single-chip microcomputer needs the array gathered to become 320*4 from 320*640, greatly reduces data volume, and effectively extracts the positional information of road edge.
Analog video signal acquisition system realizes the interruption logging of hopping edge mainly through single-chip microcomputer video frequency signal processing and edge extracting.
During single-chip microcomputer initialization, open a counter, counting overflow data amount gathers the time of data line according to camera sensing device and determines.Then four tunnel external interrupt opened by single-chip microcomputer, and enter circulation according to interruption in collection signal complement mark position arrange a frame video signal and handling procedure, as shown in Figure 7.
The corresponding actions of four tunnel external interrupt, as shown in Figure 8, can be divided into:
(1) during the down trigger of field, line number is reset, open row and interrupt.
(2), during row down trigger, counter is reset.
(3) during the down trigger of binaryzation rising hopping edge, record timers value, and write in this line number group; Array sequence number is from adding.
(4) when rising hopping edge down trigger under binaryzation, record timers value, and write in this line number group; Array sequence number is from adding.
As can be seen here, before the capable interruption of single-chip microcomputer is arrived, the image dope vector of the row gathered before single-chip microcomputer can process; When monolithic airport interrupts, be a frame and gather complete flag bit, then principal function starts integral image array.Continuity filtering is carried out to the array gathered, finally obtains effective contour information.
The gathering algorithm that video separation and binaryzation detect road edge optimizes single-chip microcomputer to a great extent and simulates mating of camera, makes single-chip microcomputer offer array without the need to the resolution according to camera, records a large amount of invalid data to improve precision.Only need to set the counter of often going, as used the every line time Counter Value of camera to be 255 in the present invention, can reach corresponding precision, in this example, precision is 320*255.Again owing to only gathering the hopping edge in often going, so high-precision while, the in fact single-chip microcomputer often capable data just acquiring hopping edge number, as used 4 hopping edge arrays in this example, namely data volume only has 320*4.This programme is conducive to reducing the cost utilizing single-chip microcomputer to gather analog video signal, improves road Identification precision, reduces and takies mcu resource, improves image processing efficiency.
Claims (10)
1. an analog video signal acquisition system, it is characterized in that, described analog video signal acquisition system comprises rechargeable battery, single-chip microcomputer U1, voltage stabilizing circuit, direct current machine, Servo-controller, drive circuit, simulation camera and video processing circuit;
Described voltage stabilizing circuit comprises 5V voltage stabilizing circuit, 12V voltage stabilizing circuit and 3.3V voltage stabilizing circuit;
Described video processing circuit comprises video separation circuit and hardware binarization circuit;
Model in rechargeable battery positive pole and 5V voltage stabilizing circuit is the 1 pin electrical connection of the voltage stabilizing chip U2 of LM2940, and the negative pole of rechargeable battery and the model in voltage stabilizing circuit are that 2 pins of the voltage stabilizing chip U2 of LM2940 are electrically connected; 2 pins of rechargeable battery positive pole and the model in drive circuit to be model in 2 pins of the metal-oxide-semiconductor Q1 of IRF3205 and drive circuit the be metal-oxide-semiconductor Q3 of IRF3205 are connected; 12V power output end in 12V voltage stabilizing circuit connects the red wiring on simulation camera; 5V power output end in 5V voltage stabilizing circuit and the model in video separation circuit are that 8 lead-foot-lines of the chip U8 of LM1881 are connected; 5V power output end in the 5V voltage stabilizing circuit model connect in hardware binarization circuit is 8 pins of the chip U7 of AD8032; The 5V power output end of 5V voltage stabilizing circuit connects the red wiring of Servo-controller; The 3.3V power output end of 3.3V voltage stabilizing circuit and single-chip microcomputer U1 VCC pin be connected;
2 lead-foot-lines that yellow video signal cable VIDEO on described simulation camera is the chip U8 of LM1881 by electric capacity C5 and the model in video separation circuit are connected; The yellow video signal cable VIDEO model accessed in hardware binarization circuit of simulation camera is 5 pins of the chip U7 of AD8032; Model in hardware binarization circuit is the interrupt pin that 1 pin of the chip U7 of AD8032 meets PTB2, PTB3 of single-chip microcomputer U1 respectively; Model in video separation circuit is that 3 pins of the chip U8 of LM1881 connect interrupt pin in single-chip microcomputer U1 and PTB0 pin; 2 pins of to be the half-bridge driven chip U5 of IR2104S and model the be half-bridge driven chip U6 of IR2104S of the two-way PWM pin model connect successively in drive circuit in single-chip microcomputer U1; 2 pins of to be model in 3 pins of the metal-oxide-semiconductor Q3 of IRF3205 and drive circuit the be metal-oxide-semiconductor Q4 of IRF3205 of the model in drive circuit are connected with one end of direct current machine, and 2 pins of to be model in 3 pins of the metal-oxide-semiconductor Q1 of IRF3205 and drive circuit the be metal-oxide-semiconductor Q2 of IRF3205 of the model in drive circuit are connected with the other end of direct current machine; White wiring on described Servo-controller connects 1 road PWM pin on single-chip microcomputer U1.
2. according to analog video signal acquisition system according to claim 1, it is characterized in that, 1 pin of the model connect in drive circuit of the 12V power output end in described 12V voltage stabilizing circuit to be the half-bridge driven chip U5 of IR2104S and model the be half-bridge driven chip U6 of IR2104S; The 3.3V power output end of 3.3V voltage stabilizing circuit connects the other end of the resistance R13 in hardware binarization circuit.
3. according to analog video signal acquisition system according to claim 1, it is characterized in that, described rechargeable battery is connected with voltage stabilizing circuit electric wire and refers to:
The rechargeable battery positive pole model connect in 5V voltage stabilizing circuit is 1 pin and the Vin pin of the voltage stabilizing chip U2 of LM2940, and the negative electrode of rechargeable batteries model connect in 5V voltage stabilizing circuit is 2 pins and the GND pin of the voltage stabilizing chip U2 of LM2940; 5 lead-foot-lines that negative electrode of rechargeable batteries is the voltage stabilizing chip U3 of 34063 by variable resistor R1 and the model in 12V voltage stabilizing circuit are connected; 6 lead-foot-lines that model in 5V voltage stabilizing circuit is 3 pins of the voltage stabilizing chip U2 of LM2940 and Vout pin is the voltage stabilizing chip U3 of 34063 with the model in 12V voltage stabilizing circuit are connected; Model in 3.3V voltage stabilizing circuit is the 5V power output end that 3 pins of the voltage stabilizing chip U4 of LM1117 connect 5V voltage stabilizing circuit.
4. according to analog video signal acquisition system according to claim 1, it is characterized in that, described 5V voltage stabilizing circuit also comprises electrochemical capacitor C20 and electrochemical capacitor C21;
Model is the positive terminal that 1 pin of the voltage stabilizing chip U2 of LM2940 and Vin pin meet electrochemical capacitor C20, model is the positive terminal that 3 pins of the voltage stabilizing chip U2 of LM2940 and Vout pin meet electrochemical capacitor C21, the negative pole end ground connection of electrochemical capacitor C20 and electrochemical capacitor C21, model is 2 pins and the GND pin ground connection of the voltage stabilizing chip U2 of LM2940.
5. according to analog video signal acquisition system according to claim 1, it is characterized in that, described 12V voltage stabilizing circuit also comprises inductance L 4, resistance R2, resistance R3, resistance RES4, electric capacity C1, electrochemical capacitor C2, electric capacity C25;
Model is that 7 pins that 1 pin and the model of the voltage stabilizing chip U3 of 34063 is the voltage stabilizing chip U3 of 34063 are connected by an inductance L 4, model be 34063 8 pins of voltage stabilizing chip U3 be connected with an end line of resistance R2, the resistance R2 other end and model are that 7 lead-foot-lines of the voltage stabilizing chip U3 of 34063 are connected; Model is that 7 lead-foot-lines being the voltage stabilizing chip U3 of 34063 with model after the 6 pin contact resistance R3 of the voltage stabilizing chip U3 of 34063 are connected; Model is the positive pole that 1 pin of the voltage stabilizing chip U3 of 34063 connects that model is the diode D1 of IN4007, model is one end of the diode D1 negative pole contact resistance RES4 of IN4007, and the other end and the model of resistance RES4 are that 5 lead-foot-lines of the voltage stabilizing chip U3 of 34063 are connected; Model is that the negative pole exit of the diode of IN4007 is 12V power end; Model be the voltage stabilizing chip U3 of 34063 6 pins and ground and model be between the negative pole of the diode of IN4007 and ground, access electric capacity C1 and electrochemical capacitor C2; Model be the voltage stabilizing chip U3 of 34063 2 pins be connected in series 1 electric capacity C25 between 3 pins, simultaneously model is the 2 pin ground connection of the voltage stabilizing chip U3 of 34063.
6. according to analog video signal acquisition system according to claim 1, it is characterized in that, described 3V voltage stabilizing circuit also comprises electrochemical capacitor C22, electric capacity C23 and electric capacity C24;
Model is the 1 pin ground connection of the voltage stabilizing chip U4 of LM1117, model is that 2 pins of the voltage stabilizing chip U4 of LM1117 are output 3.3V power end, model is one end that 3 pins of the voltage stabilizing chip U4 of LM1117 meet electric capacity C24, model is one end that 2 pins of the voltage stabilizing chip U4 of LM1117 meet electric capacity C23 and electrochemical capacitor C22, the other end ground connection of electric capacity C24, electric capacity C23 and electrochemical capacitor C22.
7. according to analog video signal acquisition system according to claim 1, it is characterized in that, described drive circuit also comprises metal-oxide-semiconductor Q1, metal-oxide-semiconductor Q2, metal-oxide-semiconductor Q3, metal-oxide-semiconductor Q4, diode D2, diode D3, diode D4, diode D5, diode D6, diode D7, resistance R4, resistance R5, resistance R6, resistance R7, electric capacity C3 and electric capacity C4; Wherein: metal-oxide-semiconductor Q1, metal-oxide-semiconductor Q2, metal-oxide-semiconductor Q3 and metal-oxide-semiconductor Q4 are all the metal-oxide-semiconductor that model is IRF3205, diode D2, diode D3, diode D4, diode D5, diode D6 and diode D7 are all the diode that model is IN4148;
The equal ground connection of 3,4 pin of model to be the half-bridge driven chip U5 of IR2104S and model the be half-bridge driven chip U6 of IR2104S, 8 pins of model to be the half-bridge driven chip U5 of IR2104S and model the be half-bridge driven chip U6 of IR2104S connect the negative pole of diode D2 and diode D3 respectively, and the positive pole of diode D2 and diode D3 all connects 12V power output end; Model is the negative pole that 6 pins that half-bridge driven chip U5 and the model of IR2104S is the half-bridge driven chip U6 of IR2104S are connected electrochemical capacitor C3 and electrochemical capacitor C4 successively, and the positive pole of electrochemical capacitor C3 and electrochemical capacitor C4 connects the negative pole of diode D2 and diode D3 respectively; Model is the negative pole that 5,7 pins that half-bridge driven chip U5 and the model of IR2104S is the half-bridge driven chip U6 of IR2104S are respectively connected diode D5, diode D4 and diode D7, diode D6, and diode D5, diode D4 are connected with the G level line of metal-oxide-semiconductor Q2, metal-oxide-semiconductor Q1, metal-oxide-semiconductor Q4, metal-oxide-semiconductor Q3 respectively with the positive pole of diode D7, diode D6; The two ends of diode D5, diode D4, diode D7 and diode D6 are in parallel with resistance R6 two ends with resistance R5, resistance R4, resistance R7 successively; Model is that 7 pins of the half-bridge driven chip U5 of IR2104S are connected with the negative pole of diode D4, the positive pole of diode D4 is connected with 1 lead-foot-line of metal-oxide-semiconductor Q1, model is that 5 pins of the half-bridge driven chip U5 of IR2104S are connected with the negative pole of diode D5, the positive pole of diode D5 is connected with 1 lead-foot-line of metal-oxide-semiconductor Q2, model is that 7 pins of half-bridge driven chip U6 of IR2104S are connected with 1 lead-foot-line of metal-oxide-semiconductor Q3, and model is that 5 pins of half-bridge driven chip U6 of IR2104S are connected with 1 lead-foot-line of metal-oxide-semiconductor Q4; Metal-oxide-semiconductor Q1 is all connected with anode with 2 pins of metal-oxide-semiconductor Q3; The equal ground connection of 3 pin of metal-oxide-semiconductor Q2 and metal-oxide-semiconductor Q4; 3 pins of metal-oxide-semiconductor Q1 are connected with 2 lead-foot-lines of metal-oxide-semiconductor Q2; 3 pins of metal-oxide-semiconductor Q3 are connected with 2 lead-foot-lines of metal-oxide-semiconductor Q4; 3 pins of metal-oxide-semiconductor Q1 are connected with a wiring of motor M OTOR, and 3 pins of metal-oxide-semiconductor Q3 are connected with another wiring of motor M OTOR; 3 pins and the model of metal-oxide-semiconductor Q1 are that 6 lead-foot-lines of the half-bridge driven chip U5 of IR2104S are connected, and 3 pins and the model of metal-oxide-semiconductor Q3 are that 6 lead-foot-lines of the half-bridge driven chip U6 of IR2104S are connected.
8. according to analog video signal acquisition system according to claim 1, it is characterized in that, described video separation circuit also comprises electric capacity C5, electric capacity C6 and resistance R8;
One end and the model of electric capacity C5 are that 2 lead-foot-lines of the chip U8 of LM1881 are connected, and model is the 4 pin ground connection of the chip U8 of LM1881; Model is one end that 6 pins of the chip U8 of LM1881 meet electric capacity C6 and resistance R8 simultaneously, the other end ground connection of electric capacity C6 and resistance R8; Model is that 1 pin of the chip U8 of LM1881 receives interrupt pin in single-chip microcomputer U1 and PTB1 pin.
9. according to analog video signal acquisition system according to claim 1, it is characterized in that, described hardware binarization circuit comprises chip U7 that model is AD8032, resistance R9, resistance R10, resistance R11, resistance R12, resistance R13, resistance R14 and resistance R15;
Model is be connected in series adjustable resistance R9 between 6 pins of the chip U7 of AD8032 and 7 pins, and model is one end of the 6 pin connecting resistance R10 of the chip U7 of AD8032, resistance R10 other end ground connection; Model is the one end of the video signal VIDEO 1 connecting resistance R11 after the 7 pins outputs of the chip U7 of AD8032 are amplified, and resistance R11 other end direct type number is 2 pins of the chip U7 of AD8032; Model is the 4 pin ground connection of the chip U7 of AD8032; Model is one end of the 1 pin connecting resistance R12 of the chip U7 of AD8032, and resistance R12 other end direct type number is 3 pins of the chip U7 of AD8032; Model is one end of the 1 pin connecting resistance R13 of the chip U7 of AD8032; Model is 2 pins of one end of the 3 pin connecting resistance R14 of the chip U7 of AD8032, another termination slide rheostat R15 of resistance R14, and the left and right pin of slide rheostat R15 connects 5V power output end and the ground of 5V voltage stabilizing circuit respectively.
10. according to analog video signal acquisition system according to claim 1, it is characterized in that, described rechargeable battery adopts model to be the battery of 7.2VNi-Cd; Single-chip microcomputer U1 adopts model to be the single-chip microcomputer of MKL26Z256VLL4; Direct current machine adopts model to be the motor of RS-380; Servo-controller adopts model to be the servomotor of SD-05; Simulation camera employing model is the simulation camera of SONY CCD 420 line.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200513119A (en) * | 2003-09-19 | 2005-04-01 | Sanyo Electric Co | Video signal processing unit and television receiver |
| US7250986B2 (en) * | 2003-04-07 | 2007-07-31 | New Japan Radio Co., Ltd. | External output video signal processor |
| CN201479244U (en) * | 2009-09-16 | 2010-05-19 | 青岛海信电器股份有限公司 | Video data acquisition and storage system |
| CN201774613U (en) * | 2010-04-26 | 2011-03-23 | 苏州长风有限责任公司 | RGB analog video signal acquisition system |
| CN202587149U (en) * | 2012-04-28 | 2012-12-05 | 深圳市兆晶土电子有限公司 | Video acquisition card |
| CN204539292U (en) * | 2015-04-27 | 2015-08-05 | 吉林大学 | Analog video signal acquisition system |
-
2015
- 2015-04-27 CN CN201510205090.2A patent/CN104780318B/en not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7250986B2 (en) * | 2003-04-07 | 2007-07-31 | New Japan Radio Co., Ltd. | External output video signal processor |
| TW200513119A (en) * | 2003-09-19 | 2005-04-01 | Sanyo Electric Co | Video signal processing unit and television receiver |
| CN201479244U (en) * | 2009-09-16 | 2010-05-19 | 青岛海信电器股份有限公司 | Video data acquisition and storage system |
| CN201774613U (en) * | 2010-04-26 | 2011-03-23 | 苏州长风有限责任公司 | RGB analog video signal acquisition system |
| CN202587149U (en) * | 2012-04-28 | 2012-12-05 | 深圳市兆晶土电子有限公司 | Video acquisition card |
| CN204539292U (en) * | 2015-04-27 | 2015-08-05 | 吉林大学 | Analog video signal acquisition system |
Non-Patent Citations (2)
| Title |
|---|
| TAI-PING SUN: "Design and implementation of array readout integrated circuit and image system for current mode sensors", 《2014 IEEE SENSORS APPLICATIONS SYMPOSIUM (SAS)》 * |
| 李静等: "硬件在环试验台整车状态跟随控制系统设计", 《吉林大学学报(工学版)》 * |
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