CN109714621A - A kind of multichannel dynamic video analogy method and its processing system that timing is configurable - Google Patents

A kind of multichannel dynamic video analogy method and its processing system that timing is configurable Download PDF

Info

Publication number
CN109714621A
CN109714621A CN201910002901.7A CN201910002901A CN109714621A CN 109714621 A CN109714621 A CN 109714621A CN 201910002901 A CN201910002901 A CN 201910002901A CN 109714621 A CN109714621 A CN 109714621A
Authority
CN
China
Prior art keywords
module
timing
video
image data
dynamic video
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201910002901.7A
Other languages
Chinese (zh)
Inventor
赵建妮
卢强
唐雪寒
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xian Microelectronics Technology Institute
Original Assignee
Xian Microelectronics Technology Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xian Microelectronics Technology Institute filed Critical Xian Microelectronics Technology Institute
Priority to CN201910002901.7A priority Critical patent/CN109714621A/en
Publication of CN109714621A publication Critical patent/CN109714621A/en
Pending legal-status Critical Current

Links

Landscapes

  • Television Signal Processing For Recording (AREA)

Abstract

The invention discloses multichannel dynamic video analogy methods and its processing system that a kind of timing can configure, including sequentially connected interface module, Video decoding module, RGB/YCbCr data cache module, data writing module, memory time-sequence control module, data read through model, output data cache module, timing generation module, agreement generation module and output interface module, control interface module is connect by control command parsing module with timing generation module.The present invention can receive any customization dynamic video, independently output multi-channel dynamic video image, its frame frequency, resolution ratio, temporal aspect can independent on-line tunings, it can be frame frequency, resolution ratio, the discrepant multichannel dynamic video of temporal aspect by any Video Quality Metric, the research and development cost for reducing image processing equipment reduces the research and development cost of its auxiliary products;Batch production capacity power for improving image processing equipment, meets multiple images processing equipment while debugging, testing, and shortens the production cycle.

Description

A kind of multichannel dynamic video analogy method and its processing system that timing is configurable
Technical field
The invention belongs to technical field of video processing, and in particular to a kind of multichannel dynamic video simulation side that timing is configurable Method and its processing system.
Background technique
Existing disclosed entitled HDMI interface ultra high-definition image signal source, exports 2 road HDMI signals, and user's television set is raw The HDMI interface of producing line measurement television set.Picture material is stayed alone by ARM from SD card after powering on and is loaded by FPGA by signal source Into DDR3 memory bar, then the image in DDR3 memory bar is read by FPGA and is output on the port LVDS of FPGA, then by LVDS turns HDMI chip and is converted into HDMI signal and is output in HDMI interface.Exporting image is only picture, and can not online more Change, is only capable of realizing by rewriteeing SD card.
(Master's thesis, author's Lan Gong shield " are breathed out for PCIe-Camera Link picture signal simulation source research based on FPGA That shore polytechnical university "), which receives the image data that host computer issues by PCIe, by data buffer storage, protocol conversion It is handled with level conversion etc., with the output of standard cameralink format, supports the image output of a variety of resolution ratio, arbitrary content, It can the different cameralink configuration mode of flexible choice.The extension of dynamic video is not supported.And output port is limited, Bu Nengtong When output multi-channel arbitrary disposition timing output image.
There are also a kind of single channel HDMI video signal single channel to turn multiple-pass unit, and device includes human-machine interface module, HDMI view Frequency receiving module, HDMI protocol module, HDMI video decoder module, HDMI turn RGB block, RGB image resolution ratio monitoring modular, RGB image cache module and multiple HDMI video output modules, according to the image timing of HDMI video all the way of input, and according to this Multichannel HDMI image data is output to mould group to be measured from local each HDMI video output module by timing, realizes HDMI video signal Turn the signal extension function of multichannel all the way.But frame frequency, temporal aspect and the resolution ratio of each HDMI video output signal can not be Line adjustment, limits the diversification of output video.
For this reason, it may be necessary to which a kind of dynamic video image turns the scheme of multichannel dynamic video image, dynamic video image is respectively exported Frame frequency, resolution ratio, time sequence parameter can independent on-line tuning.
Summary of the invention
In view of the above-mentioned deficiencies in the prior art, the technical problem to be solved by the present invention is that providing a kind of timing can match The multichannel dynamic video analogy method and its processing system set receive any customization dynamic video image, independently output multi-channel Dynamic video image realizes that any customization dynamic video image turns what multichannel frame frequency, resolution ratio, temporal characteristics can be adjusted arbitrarily Dynamic video image.
The invention adopts the following technical scheme:
A kind of multichannel dynamic video processing system that timing is configurable, including the decoding of sequentially connected interface module, video Module, RGB/YCbCr data cache module, data writing module, memory time-sequence control module, data read through model, output data Cache module, timing generation module, agreement generation module and output interface module, control interface module are parsed by control command Module is connect with timing generation module;
Video decoding module is video decoding chip, for receiving any dynamic video image and parsing image data, It is selectively decoded according to control command;Data cache module receives the image data that Video decoding module decodes, and carries out figure Extraction and caching as data;Memory time-sequence control module generates the Read-write Catrol timing of memory, passes through data writing module By data cache module output image data deposit memory in, further according to general procedure dispatch, by data read through model from Image data is read in memory to output data cache module;Output data cache module receives the image data in memory And it is cached;Timing generation module receives output dynamic image frame frequency, resolution ratio, timing configuration parameter, wants by configuration parameter Seek survival into the timing of the dynamic video image of arbitrary disposition;Timing generation module is connect with agreement generation module, carries out output electricity Flat conversion;Control interface module receives control command according to the agreement of agreement, and sends control command parsing module to, parses The frame frequency of the road Chu Ge video output, resolution ratio, timing configuration parameter.
Specifically, interface module includes USB, HDMI or DVI.
Specifically, the codec format of Video decoding module includes 8-/12-bit 4:2:2YCbCr or 24-bit 4:4: 4RGB。
A kind of multichannel dynamic video analogy method that timing is configurable, comprising the following steps:
S1, the external dynamic video image arbitrarily customized is received by interface module;
The received dynamic video image arbitrarily customized of S2, interface module, is decoded through Video decoding module;
S3, data cache module receive the image data of Video decoding module, carry out the extraction of image data, and slow by row There are in dual port data fifo;
S4, image data writing module read image data from dual port data fifo, in conjunction with memory timing control mould Image data is sequentially written in specified storage address by block;
S5, image data read through model read picture number from corresponding address by row in due course according to the state of image data writing module According to, be respectively outputted to data cache module carry out output video image data caching;
S6, control interface module receive control instruction, and the control command received is parsed into pair by control command parsing module The frame frequency that do not go the same way answered, resolution ratio, timing configuration parameter information, real-time update are not gone the same way video output timing;
S7, timing generation module read image data from data cache module, and real-time according to control command parsing module Frame frequency, resolution ratio and the timing configuration parameter of output, generate different dynamic video timing;
The video image data that S8, different timing generation modules export is exported through agreement generation module and interface module.
Specifically, the method includes an interface module, a Video decoding module, data cache module, one A image data writing module, N number of image data read through model, a memory time-sequence control module, control interface module, one It a control command parsing module, N number of output data cache module, N number of timing generation module, N number of agreement generation module and N number of connects Mouth mold block.
Specifically, interface module USB, HDMI, DVI interface receive any customization video in step S1.
Specifically, codec format is 8-/12-bit 4:2:2YCbCr or 24-bit 4:4:4RGB in step S2.
Specifically, control interface module is UART, I2C or SPI in step S6.
Specifically, agreement generation module is realized using video chip in step S8, interface module is connect using cameralink Plug-in unit or HDMI connector.
Compared with prior art, the present invention at least has the advantages that
A kind of configurable multichannel dynamic video processing system of timing of the present invention, each port setting diversification of system are compatible Property it is good, internal image processing carry out modularized design, improve design efficiency be also convenient for safeguarding.
Further, interface module is extended to USB, HDMI, SDI, camralink, VGA, DVI etc., compatible current phase Machine, video module general-purpose interface, it can be achieved that any Interface Video source reconfiguration and extension, have versatility.
Further, the setting diversification of codec format, compatible more video decoding chips.
Invention additionally discloses the multichannel dynamic video analogy methods that a kind of timing can configure, can be according to any dynamic video figure Picture obtains multichannel dynamic video image, realizes the extension to single channel video image;It exports the frame frequency of dynamic video image, differentiate Rate and time sequence parameter can independent on-line tuning, do not interfere with each other;It can receive the dynamic video of any customization, can be exported by PC machine It is extended;FPGA realization, at low cost, reliable operation can be used.
Further, it the design cycle of the design shortening system of multimode, is analyzed convenient for the problem of later period whole system And maintenance.
Further, UART, I2C, SPI are the general control interfaces of current each processor, and agreement is simple and easy to control, Increase the ease for use of the system.
Further, Cameralink establishes a kind of data transmission technology on existing general low-cost technologies, It is easy study and application, is driven using LVDS low-voltage differential current-mode, speed is fast and noiseproof feature is preferable, and related chip is not But it is cheap and easy to use.Then clearer image can be presented in high-resolution in HDMI interface, while HDMI interface can It is connected to set-top box, DVD player, PC, television set etc., facilitates the display of image/video.
In conclusion the present invention can receive any customization dynamic video, independently output multi-channel dynamic video image, frame Frequently, resolution ratio, temporal aspect can independent on-line tuning, can be that frame frequency, resolution ratio, temporal aspect have by any Video Quality Metric The multichannel dynamic video of difference solves the problems, such as to obtain image source, such as analog Satellite Camera in real time for mating The debugging test of equipment realizes outdoor scene debugging;The research and development cost of image processing equipment is reduced, such as double load can be substituted simultaneously The infrared and Visible Light Camera of photoelectric nacelle greatly reduces the research and development cost of its auxiliary products;Improve image processing equipment Batch production capacity power, meet multiple images processing equipment while debugging, testing, the shortening production cycle.
Below by drawings and examples, technical scheme of the present invention will be described in further detail.
Detailed description of the invention
Fig. 1 is the functional block diagram of multichannel dynamic video processing system of the present invention;
Fig. 2 is multichannel dynamic video analogy method image real time transfer block diagram of the present invention.
Specific embodiment
Referring to Fig. 1, the present invention provides the multichannel dynamic video processing system that a kind of timing can configure, including interface mould Block, Video decoding module, RGB/YCbCr data cache module, data read through model, data writing module, memory timing control mould Block, control interface module, control command parsing module, output data cache module, timing generation module, agreement generation module and Output interface module.
Interface module is connected with Video decoding module, and Video decoding module is connected with RGB/YCbCr data cache module, RGB/YCbCr data cache module is connected with data writing module, and data writing module is connected with memory time-sequence control module, storage Device time-sequence control module is connected with data read through model, and data read through model is connected with output data cache module, output data caching Module is connected with timing generation module, and timing generation module is connected with agreement generation module, agreement generation module and output interface Module is connected, and control interface module is connected with control command parsing module, control command parsing module and timing generation module phase Even.
Interface module may be selected the interfaces such as USB, HDMI, DVI and arbitrarily customize video.
Video decoding module is video decoding chip, is connect with interface module, receives any dynamic video image and parses Image data out is selectively decoded into the lattice such as 8-/12-bit 4:2:2YCbCr or 24-bit4:4:4RGB according to control command Formula.
Data cache module receives the image data that Video decoding module decodes, and the extraction for carrying out image data is gentle It deposits, in case the storage of subsequent image data.
Memory time-sequence control module generates the Read-write Catrol timing of memory, with data read through model and data writing module phase Even, it is stored in memory by the image data that data writing module exports data cache module, is dispatched further according to general procedure, Image data is read from memory by data read through model to output data cache module.
Output data cache module receives the image data in memory and is cached, and is connected with timing generation module. Timing generation module is connected with control command parsing module, receives the ginsengs such as output dynamic image frame frequency, resolution ratio, timing configuration Number is generated the timing of the dynamic video image of arbitrary disposition by configuration parameter requirement.
Timing generation module is connect with agreement generation module, carries out the conversion of output level, such as Transistor-Transistor Logic level is converted to LVDS signal carries out the transmission of difference image data.
Control interface module receives control command according to the agreement of agreement, and sends control command parsing module to, parses The parameters such as frame frequency, resolution ratio, the timing configuration of the output of the road Chu Ge video.
Referring to Fig. 2, the multichannel dynamic video analogy method that a kind of timing of the present invention is configurable, including an interface mould Block, a Video decoding module, a data cache module, an image data writing module, N number of image data read through model, one A memory time-sequence control module, a control interface module, a control command parsing module, N number of output data cache mould Block, N number of timing generation module, N number of agreement generation module, N number of interface module;Realize that single channel dynamic video image turns multichannel dynamic The step of video image, is as follows:
S1, receive the external dynamic video image arbitrarily customized by interface module, interface module may be selected USB, HDMI, The interfaces such as DVI arbitrarily customize video.
The received dynamic video image arbitrarily customized of S2, interface module, is decoded, according to control through Video decoding module The requirement of donsole control command, alternative are decoded into 8-/12-bit 4:2:2YCbCr or 24-bit4:4:4RGB format.
S3, data cache module receive the image data of Video decoding module, carry out the extraction of image data, and slow by row There are in dual port data fifo.
S4, image data writing module read image data from dual port data fifo, in conjunction with memory timing control mould Image data is sequentially written in specified storage address by block.
S5, N number of image data read through model read figure from corresponding address by row in due course according to the state of image data writing module As data, it is respectively outputted to the caching that N number of data cache module carries out output video image data.
S6, control interface module receive control instruction, and the common control interfaces such as UART, I2C, SPI, control command may be selected The control command received is parsed into the information such as the corresponding frame frequency that do not go the same way, resolution ratio, timing configuration parameter by parsing module, real The road Shi Gengxin N video output timing.
S7, N number of timing generation module read image data from N number of data cache module respectively, and according to control command solution The parameters such as frame frequency, resolution ratio and timing configuration that analysis module exports in real time, generate the different dynamic video timing of N kind.
The video image data of the different timing generation module output of S8, N kind is defeated through agreement generation module and interface module Out.Agreement generation module realizes that common some video interface connectors can be used in interface module using video chip, such as Cameralink connector, HDMI connector etc..
The present invention has a wide range of application, and can be used for the discrepant image processing equipment of frame frequency, resolution ratio, temporal aspect and produces Product, any video acquisition device product, can not obtain in real time image source product debugging, test and batch produce, such as simultaneously mould The infrared and Visible Light Camera of the quasi- double load photoelectric nacelles of multiple groups, reducing its auxiliary products, (data logger, image co-registration are set It is standby) research and development cost and shorten the R&D cycle, strive for bigger advantage for market competition product and inexpensive product;Multiple timings, Cameralink capture card is verified in multiresolution, comprehensive test;Complete analog satellite camera, exports dynamic satellite figure in real time Picture realizes that the outdoor scene of satellite image processing equipment debugs verifying.
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention In attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is A part of the embodiment of the present invention, instead of all the embodiments.The present invention being described and shown in usually here in attached drawing is real The component for applying example can be arranged and be designed by a variety of different configurations.Therefore, below to the present invention provided in the accompanying drawings The detailed description of embodiment be not intended to limit the range of claimed invention, but be merely representative of of the invention selected Embodiment.Based on the embodiments of the present invention, those of ordinary skill in the art are obtained without creative efforts The every other embodiment obtained, shall fall within the protection scope of the present invention.
The above content is merely illustrative of the invention's technical idea, and this does not limit the scope of protection of the present invention, all to press According to technical idea proposed by the present invention, any changes made on the basis of the technical scheme each falls within claims of the present invention Protection scope within.

Claims (9)

1. a kind of configurable multichannel dynamic video processing system of timing, which is characterized in that including sequentially connected interface module, Video decoding module, RGB/YCbCr data cache module, data writing module, memory time-sequence control module, data read through model, Output data cache module, timing generation module, agreement generation module and output interface module, control interface module is by control Command analysis module is connect with timing generation module;
Video decoding module is video decoding chip, for receiving any dynamic video image and parsing image data, according to Control command selectively decodes;Data cache module receives the image data that Video decoding module decodes, and carries out picture number According to extraction and caching;Memory time-sequence control module generates the Read-write Catrol timing of memory, will be counted by data writing module According in the image data deposit memory of cache module output, dispatched further according to general procedure, by data read through model from storage Image data is read in device to output data cache module;The image data that output data cache module receives in memory is gone forward side by side Row caching;Timing generation module receives output dynamic image frame frequency, resolution ratio, timing configuration parameter, to seek survival by configuration parameter At the timing of the dynamic video image of arbitrary disposition;Timing generation module is connect with agreement generation module, carries out output level Conversion;Control interface module receives control command according to the agreement of agreement, and sends control command parsing module to, parses each The frame frequency of road video output, resolution ratio, timing configuration parameter.
2. the configurable multichannel dynamic video processing system of timing according to claim 1, which is characterized in that interface module Including USB, HDMI or DVI.
3. the configurable multichannel dynamic video processing system of timing according to claim 1 or 2, which is characterized in that video The codec format of decoder module includes 8-/12-bit 4:2:2YCbCr or 24-bit 4:4:4RGB.
4. a kind of configurable multichannel dynamic video analogy method of timing, which comprises the following steps:
S1, the external dynamic video image arbitrarily customized is received by interface module;
The received dynamic video image arbitrarily customized of S2, interface module, is decoded through Video decoding module;
S3, data cache module receive the image data of Video decoding module, carry out the extraction of image data, and be buffered in by row In dual port data fifo;
S4, image data writing module read image data from dual port data fifo, will in conjunction with memory time-sequence control module Image data is sequentially written in specified storage address;
S5, image data read through model read image data from corresponding address by row in due course according to the state of image data writing module, It is respectively outputted to the caching that data cache module carries out output video image data;
S6, control interface module receive control instruction, and the control command received is parsed into corresponding by control command parsing module The frame frequency do not gone the same way, resolution ratio, timing configuration parameter information, real-time update are not gone the same way video output timing;
S7, timing generation module read image data from data cache module, and are exported in real time according to control command parsing module Frame frequency, resolution ratio and timing configuration parameter, generate different dynamic video timing;
The video image data that S8, different timing generation modules export is exported through agreement generation module and interface module.
5. the configurable multichannel dynamic video analogy method of timing according to claim 4, which is characterized in that the method Including an interface module, a Video decoding module, a data cache module, an image data writing module, N number of image It is data read through model, a memory time-sequence control module, a control interface module, a control command parsing module, N number of defeated Data cache module, N number of timing generation module, N number of agreement generation module and N number of interface module out.
6. the configurable multichannel dynamic video analogy method of timing according to claim 4, which is characterized in that step S1 In, interface module USB, HDMI, DVI interface receive any customization video.
7. the configurable multichannel dynamic video analogy method of timing according to claim 4, which is characterized in that step S2 In, codec format is 8-/12-bit 4:2:2YCbCr or 24-bit 4:4:4RGB.
8. the configurable multichannel dynamic video analogy method of timing according to claim 4, which is characterized in that step S6 In, control interface module is UART, I2C or SPI.
9. the configurable multichannel dynamic video analogy method of timing according to claim 4, which is characterized in that step S8 In, agreement generation module is realized using video chip, and interface module uses cameralink connector or HDMI connector.
CN201910002901.7A 2019-01-02 2019-01-02 A kind of multichannel dynamic video analogy method and its processing system that timing is configurable Pending CN109714621A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910002901.7A CN109714621A (en) 2019-01-02 2019-01-02 A kind of multichannel dynamic video analogy method and its processing system that timing is configurable

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910002901.7A CN109714621A (en) 2019-01-02 2019-01-02 A kind of multichannel dynamic video analogy method and its processing system that timing is configurable

Publications (1)

Publication Number Publication Date
CN109714621A true CN109714621A (en) 2019-05-03

Family

ID=66260736

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910002901.7A Pending CN109714621A (en) 2019-01-02 2019-01-02 A kind of multichannel dynamic video analogy method and its processing system that timing is configurable

Country Status (1)

Country Link
CN (1) CN109714621A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111050093A (en) * 2019-12-17 2020-04-21 中国科学院光电技术研究所 Camera-link full-based embedded image storage and image processing system and method
CN111104354A (en) * 2019-12-20 2020-05-05 威创集团股份有限公司 Digital audio-video connector and interface thereof
CN112351223A (en) * 2020-09-24 2021-02-09 天津市英贝特航天科技有限公司 Multi-video extension system and method based on FPGA
CN112449139A (en) * 2020-11-12 2021-03-05 北京环境特性研究所 Video processing and video signal analog simulation output system and method
CN112653860A (en) * 2021-01-05 2021-04-13 苏州羿景睿图信息科技有限公司 Camera Link signal source data processing method based on HDMI interface
CN113141487A (en) * 2021-04-13 2021-07-20 合肥宏晶微电子科技股份有限公司 Video transmission module, method, display device and electronic equipment
CN115209132A (en) * 2022-06-30 2022-10-18 华东师范大学 Video signal generator equipment
CN116016823A (en) * 2022-12-12 2023-04-25 昆易电子科技(上海)有限公司 Video injection device and system

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20150102333A (en) * 2014-02-28 2015-09-07 삼성전자주식회사 Receiving broadcasting signal apparatus and control method of the same
CN105405375A (en) * 2015-12-05 2016-03-16 武汉精测电子技术股份有限公司 MIPI video signal single path-to-multipath conversion device and MIPI video signal single path-to-multipath conversion method
CN105491318A (en) * 2015-12-05 2016-04-13 武汉精测电子技术股份有限公司 Device and method for single-path to multiple-path conversion of DP video signals
CN107249107A (en) * 2017-05-03 2017-10-13 西安诺瓦电子科技有限公司 Video controller and image processing method and device
CN107959814A (en) * 2016-10-18 2018-04-24 大唐终端技术有限公司 A kind of picture output method and device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20150102333A (en) * 2014-02-28 2015-09-07 삼성전자주식회사 Receiving broadcasting signal apparatus and control method of the same
CN105405375A (en) * 2015-12-05 2016-03-16 武汉精测电子技术股份有限公司 MIPI video signal single path-to-multipath conversion device and MIPI video signal single path-to-multipath conversion method
CN105491318A (en) * 2015-12-05 2016-04-13 武汉精测电子技术股份有限公司 Device and method for single-path to multiple-path conversion of DP video signals
CN107959814A (en) * 2016-10-18 2018-04-24 大唐终端技术有限公司 A kind of picture output method and device
CN107249107A (en) * 2017-05-03 2017-10-13 西安诺瓦电子科技有限公司 Video controller and image processing method and device

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111050093A (en) * 2019-12-17 2020-04-21 中国科学院光电技术研究所 Camera-link full-based embedded image storage and image processing system and method
CN111050093B (en) * 2019-12-17 2021-11-19 中国科学院光电技术研究所 Camera-link full-based embedded image storage and image processing system and method
CN111104354A (en) * 2019-12-20 2020-05-05 威创集团股份有限公司 Digital audio-video connector and interface thereof
CN112351223A (en) * 2020-09-24 2021-02-09 天津市英贝特航天科技有限公司 Multi-video extension system and method based on FPGA
CN112449139A (en) * 2020-11-12 2021-03-05 北京环境特性研究所 Video processing and video signal analog simulation output system and method
CN112653860A (en) * 2021-01-05 2021-04-13 苏州羿景睿图信息科技有限公司 Camera Link signal source data processing method based on HDMI interface
CN113141487A (en) * 2021-04-13 2021-07-20 合肥宏晶微电子科技股份有限公司 Video transmission module, method, display device and electronic equipment
CN115209132A (en) * 2022-06-30 2022-10-18 华东师范大学 Video signal generator equipment
CN116016823A (en) * 2022-12-12 2023-04-25 昆易电子科技(上海)有限公司 Video injection device and system
CN116016823B (en) * 2022-12-12 2024-04-12 昆易电子科技(上海)有限公司 Video injection device and system

Similar Documents

Publication Publication Date Title
CN109714621A (en) A kind of multichannel dynamic video analogy method and its processing system that timing is configurable
CN104917990B (en) Video frame rate compensation is carried out by adjusting vertical blanking
CN101516015B (en) Multi-path video data acquiring, processing and transmitting method
CN104469354B (en) Device for detecting quality of MIPI video signals
CN103595924B (en) A kind of image fusion system based on Cameralink and method thereof
CN102694997A (en) Design of general data collection and transmission board based on FPGA and camera link protocol-based interface
CN102075758B (en) Motion joint photographic experts group (MJPEG) video coding and decoding system based on system on chip (SOC) and method thereof
CN103248797A (en) Video resolution enhancing method and module based on FPGA (field programmable gate array)
CN104469349B (en) A kind of method detecting the MIPI vision signal that video source produces
CN102202171A (en) Embedded high-speed multi-channel image acquisition and storage system
CN109743515A (en) A kind of asynchronous video fusion overlapping system and method based on soft core platform
CN106817545B (en) A kind of fast multiresolution video image mirror image rotation processing system
CN104469351A (en) Method for detecting LVDS video signals generated by video source
CN104469353A (en) Device for detecting quality of LVDS video signals
CN110225316B (en) Software and hardware cooperative multi-channel video processing device and system
CN106878650B (en) DVI to VGA video conversion device and method thereof
CN101325712A (en) Portable terminal for real time acquiring and displaying image based on ARM
CN204231575U (en) A kind of device detecting MIPI video signal quality
CN202261654U (en) FPGA (Field Programmable Gate Array) video image storing and processing device
CN204929022U (en) Video mosaicing processing ware that shows high -definition video signal can return
CN203104645U (en) Converter for converting VGA (Video Graphics Array) signal into HDMI (High Definition Multimedia Interface) signal
CN110418079A (en) Image signal conversion equipment
CN105430297A (en) Automatic control system for conversion from multi-video format to IIDC protocol video format
CN205584318U (en) USB high definition meeting camera
CN206596114U (en) A kind of DVI to VGA video change-over devices

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20190503