CN202617065U - Low voltage voltage-controlled oscillator capable of restraining power supply noise - Google Patents
Low voltage voltage-controlled oscillator capable of restraining power supply noise Download PDFInfo
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- CN202617065U CN202617065U CN 201220068392 CN201220068392U CN202617065U CN 202617065 U CN202617065 U CN 202617065U CN 201220068392 CN201220068392 CN 201220068392 CN 201220068392 U CN201220068392 U CN 201220068392U CN 202617065 U CN202617065 U CN 202617065U
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- supply noise
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Abstract
The utility model discloses a low voltage voltage-controlled oscillator capable of restraining power supply noise, characterized in that a power supply noise filter consumes smaller voltage margin and has a high restraining capability to power supply noise, so that the voltage-controlled oscillator is conducive to work at a low voltage. Compared with the conventional power supply noise filter taking a source follower as the core, the low voltage voltage-controlled oscillator capable of restraining power supply noise of the utility model enables a power supply voltage to be reduced by 33%. The low voltage voltage-controlled oscillator capable of restraining power supply noise of the utility model comprises a loop oscillator and the power supply noise filter, an inputted control voltage adjusts the oscillation frequency of the loop oscillator while being used as the reference voltage of the power supply noise filter via the boost operation of a level converter. The low voltage voltage-controlled oscillator capable of restraining power supply noise of the utility model can be used in various phase-locked loop systems, especially in a phase-locked loop system having a low power supply voltage.
Description
Technical field
The invention belongs to the voltage controlled oscillator field in the PHASE-LOCKED LOOP PLL TECHNIQUE, is a kind of low supply voltage voltage controlled oscillator that can suppress power supply noise, can improve the clock jitter characteristic of phase-locked loop, is applicable to low power dissipation design.
Background technology
Voltage controlled oscillator is the important component part of phase-locked loop, and the output clock of voltage-controlled oscillator (VCO) compares through the input reference clock of frequency division and phase-locked loop, passes through phase demodulation, filtering again, realizes phase locked looped function such as clock phase locking, clock jitter filtration, frequency synthesis.The basic structure of voltage controlled oscillator is ring oscillator, and the frequency of oscillation of ring oscillator is by the control voltage decision of input, and the frequency of oscillation of the output clock of voltage controlled oscillator is linear with control voltage under the ideal situation.The edge of the clock that voltage controlled oscillator produces appears at the front and back of ideal time point, and adding up of uncertain several clock cycle of process of position, this edge is reflected to phase-locked loop output, can produce bigger clock jitter.In data communication field; The data phase skew that clock jitter can make sampling clock and sampled; Particularly in high-speed data communication, because the sampling time window of each data is shorter, the deviation on the sequential might make the edge of sampling clock miss the data sampling window; Produce error code, influence the stability of communication system.
The main source of the clock jitter of voltage controlled oscillator output is the noise of supply voltage, and this noise causes the uncertain of each delay unit time of delay of forming ring oscillator, causes frequency of oscillation to change with supply voltage.The voltage ripple that Switching Power Supply produces is one of main source of noise on the voltage controlled oscillator working power; Secondly in chip system was integrated, phase-locked loop was integrated on the chip with the large scale digital circuit usually, a large amount of digital circuits at work since the upset of registered state to a large amount of noise of power line injection.
For reducing the clock jitter that voltage controlled oscillator produces, existing method is normally inserted a source follower between chip input power supply and ring oscillator, isolate the noise from power supply.But the voltage margin that source follower consumed can make the realization of existing voltage controlled oscillator under low supply voltage become difficult, is unfavorable for low power dissipation design; Secondly adopting under the advanced deep sub-micron technique even nanometer technology technology, the output resistance of main element nmos pass transistor in the operate in saturation district of source follower diminishes, and be unsatisfactory to the isolation effect of power supply noise.This patent has been invented a kind of novel filter construction of efficient insulating power supply noise, and the voltage margin that this structure consumes is less, is beneficial to voltage controlled oscillator at operation at low power supply voltage; The present invention has also overcome the defective of poor under the advanced technologies, intercepts the noise from power supply preferably.
Summary of the invention
The present invention is a kind of low-voltage voltage controlled oscillator that can suppress power supply noise, comprises a ring oscillator and a Power Noise Filter.The frequency of oscillation of said ring oscillator is by the reference voltage control of input, and the bias voltage of said ring oscillator is from the output of said Power Noise Filter.Because said Power Noise Filter is for the buffer action of power supply noise, the frequency of oscillation of said ring oscillator does not receive the influence of power supply noise.
Said ring oscillator is operated in the negative feedback pattern; Comprise a string end to end identical delay unit; Each delay unit has a pair of differential input end, a pair of difference output end, a voltage controling end and a voltage bias end, and the number of delay cell is by the desired surge frequency range decision of practical application.The differential input end of every grade of delay unit is connected with the difference output end of higher level's delay unit, and the difference output end of every grade of delay unit is connected with the differential input end of subordinate's delay unit, and formation loop circuit like this joins end to end.The voltage controling end short circuit of all delay units together, the voltage of voltage controling end is controlled the time of delay of each delay unit from external input signal.The output of the said Power Noise Filter of voltage bias termination.
Said delay unit circuit structure comprises the first and second PMOS transistors and first to fourth nmos pass transistor.The transistorized source shorted of said first and second PMOS together; Be connected with said voltage bias end; The transistorized grid of first and second PMOS is respectively as the normal phase input end and the inverting input of delay unit, and the first and second PMOS transistor drain are respectively as the reversed-phase output and the positive output end of delay unit.The drain electrode of first and second nmos pass transistors connects reversed-phase output and positive output end respectively, its grid short circuit, and as the voltage controling end of said delay unit, its source grounding.The drain electrode of third and fourth nmos pass transistor connects reversed-phase output and positive output end respectively, and its grid connects positive output end and reversed-phase output respectively, and its source electrode is ground connection respectively.Third and fourth nmos pass transistor constitutes cross coupling structure, forms a negative resistance, and is parallelly connected with first and second nmos pass transistors.
Said Power Noise Filter comprises a PMOS transistor, an operational amplifier and a level translator.Said level translator one end links to each other with said voltage controling end; The inverting input of the other end and said operational amplifier is connected; Said level translator is realized the variation of level, is used for the voltage of boosted voltage control end input, for the inverting input of said operational amplifier provides reference voltage.The transistorized grid of the said PMOS of output termination of said operational amplifier; Normal phase input end links to each other with said PMOS transistor drain; The transistorized source electrode of said PMOS connects supply voltage, and said PMOS transistor drain is as the output of said Power Noise Filter.Said operational amplifier and PMOS transistor constitute a feedback loop, make the output of said Power Noise Filter be stabilized in the output voltage of level translator, realize suppressing the noise of supply voltage.In addition, the inverting input of operational amplifier can be an independently reference voltage.The voltage margin that this device consumes is less, is applicable to the low voltage circuit design.
Description of drawings
Shown in Figure 1 is existing voltage controlled oscillator structure.
Shown in Figure 2 is a kind of existing delay unit circuit structure.
The voltage controlled oscillator structure that can suppress power supply noise for the present invention's proposition shown in Figure 3.
Embodiment
Fig. 1 is a kind of voltage controlled oscillator structure of existing use, comprises delay unit 11 to 13, nmos pass transistor 14 and level translator 15.Said delay unit 11 to 13 head and the tail annulars are connected to form ring oscillator, the surge frequency range decision that delay unit progression is required by reality, and the time of delay of delay unit is by voltage controling end V
CDecision.Nmos pass transistor 14 is formed Power Noise Filter with level translator 15, and nmos pass transistor 14 is operated in the saturation region, forms source follower, and its source voltage is by reference voltage V
CHDeduct a V
GSDecision, and independent of power voltage have intercepted the noise voltage on the power supply effectively, and said source voltage is the bias voltage V of said ring oscillator
RLevel translator 15 passes through V
CBoost and suitable reference voltage V be provided for nmos pass transistor 14
CH
Fig. 2 is the circuit structure of delay unit in the said ring oscillator, comprises PMOS transistor 21 and 22, nmos pass transistor 23 to 26. PMOS transistor 21 and 22 source shorted and by voltage bias end V
RPower supply, PMOS transistorized 21 is connected with 22 grid that difference is imported IP and IN, draining respectively links to each other with 24 drain electrode with nmos pass transistor 23. Nmos pass transistor 23 and 24 source ground, grid and voltage controling end V
CShort circuit together, nmos pass transistor 23 and 24 ohmic loads as differential configuration, its drain electrode is as difference output OP and ON.The output resistance of the time of delay of said delay unit and output OP and ON and be directly proportional at the product of the electric capacity of this node is through input voltage control end V
CChange the resistance value of nmos pass transistor 23 and 24, just can regulate the time of delay of delay unit. Nmos pass transistor 25 and 26 source ground, the drain and gate cross-couplings connects, and is connected with ON with output OP, and this structure is used to suppress common-mode signal, impels the said ring oscillator of being made up of delay unit to be operated in the pattern of difference amplification.
Output at said delay unit during voltage controlled oscillator shown in Figure 1 work produces differential clock signal, when input and output IP, IN, OP, the ON of said delay unit reach identical level, and V
RNeed at least greater than 2V
GSCould guarantee transistor 21,22,25 and 26 conducting work.Nmos pass transistor 14 is operated in the saturation region, V
CHMust be greater than V
R+ V
GS, also be that supply voltage must be greater than 3V
GSCould guarantee the normal direct current biasing of voltage controlled oscillator shown in Figure 1.Under deep-submicron and nanometer technology condition, supply voltage has been low to moderate 1V or below the 1V, the requirement of above-mentioned normal direct current biasing has limited the application of said voltage controlled oscillator structure under low supply voltage.Secondly; Under advanced person's deep-submicron and nanometer technology condition, the channel length modulation effect highly significant of nmos pass transistor 14, the variation of supply voltage can cause the change in current of nmos pass transistor; Inhibition ability to power supply noise descends greatly, and clock jitter increases.At last, the substrate terminal ground connection of nmos pass transistor 14, the discord source shorted forms noise from the change in voltage of substrate between source electrode and substrate, change the operating current in the transistor 14, causes the increase of clock jitter.
The voltage controlled oscillator structure that can suppress power supply noise for the present invention's proposition shown in Figure 3 comprises ring oscillator, level translator 15, operational amplifier 31 and the PMOS transistor 32 be made up of delay unit.Level translator 15 passes through input V
CThe suitable bias potential V of output that boosts
CH, bias potential V
CHReference voltage for operational amplifier 31.Operational amplifier 31 constitutes a closed negative feedback loop with PMOS transistor 32, with V
RAnd V
CHThe current potential clamper together, filter the noise come from power supply effectively.Secondly, PMOS transistor 32 can be operated in the saturation region, also can be operated in linear zone, V
DDCan be low to moderate near V
RMagnitude of voltage, also be V
DDMinimum is 2V
GSThe time just can satisfy the requirement of the operating voltage biasing of ring oscillator.The present invention compares with existing voltage controlled oscillator shown in Figure 1, and supply voltage reduces by 33%.At last, the substrate of PMOS transistor 32 and source electrode all meet supply voltage V
DD, keeping substrate and voltage between source electrodes difference is zero, has avoided the influence of substrate noise pair pmos transistor operating current.In addition, operational amplifier 31 can be by wherein one or more cascades realizations of telescopic operational amplifier, collapsible operational amplifier, rail-to-rail operational amplifier.
The structure of the level translator 15 in the said Power Noise Filter can be varied, includes but not limited to source follower, resistance pressure-dividing network, DC-DC transducer etc.The input of level translator 15 both can be the voltage controling end of said voltage controlled oscillator, also can be bias voltage independently.Delay unit progression in the said ring oscillator is by the surge frequency range decision of concrete design, and the structure of said ring oscillator both can be amplified delay unit by difference and constituted, and also can be made up of the single-ended signal delay unit.In addition, the ring oscillator in the said voltage controlled oscillator can also be substituted by the oscillator of other structures, includes but not limited to LC oscillator etc.
Claims (8)
1. the low-voltage voltage controlled oscillator that can suppress power supply noise is characterized in that comprising at least one loop oscillator and a Power Noise Filter, and Power Noise Filter one end connects supply voltage, and the other end links to each other with loop oscillator; The voltage bias end of loop oscillator connects Power Noise Filter, other end ground connection.
2. according to claims 1 described a kind of low-voltage voltage controlled oscillator that can suppress power supply noise; Ring oscillator characteristic wherein is to comprise a string end to end identical delay unit; Each delay unit has a pair of differential input end, a pair of difference output end, a voltage controling end and a voltage bias end; The differential input end of every grade of delay unit is connected with the difference output end of higher level's delay unit; The difference output end of every grade of delay unit is connected with the differential input end of subordinate's delay unit, and formation loop circuit like this joins end to end; The voltage controling end short circuit of all delay units together, the voltage of voltage controling end is from external input signal; The output of the said Power Noise Filter of voltage bias termination; Ring oscillator is operated in the negative feedback pattern.
3. a kind of low-voltage voltage controlled oscillator that can suppress power supply noise described according to claims 2; Ring oscillator characteristic wherein is that wherein delay unit progression is by the decision of the surge frequency range of concrete design; The structure of said ring oscillator both can be amplified delay unit by difference and constituted, and also can be made up of the single-ended signal delay unit; Ring oscillator in the said voltage controlled oscillator can be that active device constitutes, and also can be that passive device constitutes.
4. according to claims 1 described a kind of low-voltage voltage controlled oscillator that can suppress power supply noise; Power Noise Filter wherein is characterised in that and comprises at least the three PMOS transistor and an operational amplifier; The inverting input of operational amplifier can be an independently reference voltage; The feedback loop filtering that operational amplifier and the 3rd PMOS transistor constitute is from the noise of power supply, and the voltage margin that this device consumes is less, is applicable to the low voltage circuit design.
5. according to claims 4 described a kind of low-voltage voltage controlled oscillators that can suppress power supply noise; Power Noise Filter characteristic wherein is to increase a level translator; The voltage controling end of one termination loop oscillator of level translator; The other end is received the inverting input of operational amplifier, makes the voltage of operational amplifier inverting input controlled by the loop oscillator voltage controling end.
6. according to claims 4 described a kind of low-voltage voltage controlled oscillators that can suppress power supply noise; Operational amplifier in the Power Noise Filter, it is characterized in that can be by wherein one or more cascades realizations of telescopic operational amplifier, collapsible operational amplifier, rail-to-rail operational amplifier.
7. according to claims 4 described a kind of low-voltage voltage controlled oscillators that can suppress power supply noise; Level translator in the Power Noise Filter; It is characterized in that output voltage and input voltage keep certain relation, implementation method comprises source follower, electric resistance partial pressure structure, DC-DC transducer.
8. according to claims 7 described a kind of low-voltage voltage controlled oscillators that can suppress power supply noise, level translator wherein is characterized in that its input both can be the voltage controling end of said voltage controlled oscillator, also can be bias voltage independently.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN 201220068392 CN202617065U (en) | 2012-02-28 | 2012-02-28 | Low voltage voltage-controlled oscillator capable of restraining power supply noise |
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| CN 201220068392 CN202617065U (en) | 2012-02-28 | 2012-02-28 | Low voltage voltage-controlled oscillator capable of restraining power supply noise |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102843132A (en) * | 2012-02-28 | 2012-12-26 | 无锡芯骋微电子有限公司 | Low-voltage voltage-controlled oscillator capable of inhibiting power noise |
| CN104764923A (en) * | 2015-03-18 | 2015-07-08 | 广东顺德中山大学卡内基梅隆大学国际联合研究院 | Method for measuring alternating-current interference amplitude |
| CN104967446A (en) * | 2015-06-29 | 2015-10-07 | 中国科学院微电子研究所 | Annular oscillator |
| CN108418557A (en) * | 2018-03-02 | 2018-08-17 | 京东方科技集团股份有限公司 | A kind of ring oscillator, temperature sensing circuit and electronic equipment |
| CN110049263A (en) * | 2019-05-31 | 2019-07-23 | 西安微电子技术研究所 | A kind of high-speed, high precision phase-locked loop circuit for super large face array CMOS image sensor |
| CN113162614A (en) * | 2020-01-22 | 2021-07-23 | 瑞昱半导体股份有限公司 | High speed clock filter and method thereof |
-
2012
- 2012-02-28 CN CN 201220068392 patent/CN202617065U/en not_active Expired - Fee Related
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102843132A (en) * | 2012-02-28 | 2012-12-26 | 无锡芯骋微电子有限公司 | Low-voltage voltage-controlled oscillator capable of inhibiting power noise |
| CN102843132B (en) * | 2012-02-28 | 2015-11-25 | 无锡芯骋微电子有限公司 | A kind of low-voltage voltage controlled oscillator that can suppress power supply noise |
| CN104764923A (en) * | 2015-03-18 | 2015-07-08 | 广东顺德中山大学卡内基梅隆大学国际联合研究院 | Method for measuring alternating-current interference amplitude |
| CN104967446A (en) * | 2015-06-29 | 2015-10-07 | 中国科学院微电子研究所 | Annular oscillator |
| CN104967446B (en) * | 2015-06-29 | 2018-04-27 | 中国科学院微电子研究所 | A kind of ring oscillator |
| CN108418557A (en) * | 2018-03-02 | 2018-08-17 | 京东方科技集团股份有限公司 | A kind of ring oscillator, temperature sensing circuit and electronic equipment |
| CN108418557B (en) * | 2018-03-02 | 2022-04-12 | 京东方科技集团股份有限公司 | Annular oscillator, temperature sensing circuit and electronic equipment |
| CN110049263A (en) * | 2019-05-31 | 2019-07-23 | 西安微电子技术研究所 | A kind of high-speed, high precision phase-locked loop circuit for super large face array CMOS image sensor |
| CN110049263B (en) * | 2019-05-31 | 2021-06-29 | 西安微电子技术研究所 | High-speed high-precision phase-locked loop circuit for super-large area array CMOS image sensor |
| CN113162614A (en) * | 2020-01-22 | 2021-07-23 | 瑞昱半导体股份有限公司 | High speed clock filter and method thereof |
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Granted publication date: 20121219 Termination date: 20140228 |