CN202523702U - 一种半导体元件封装结构 - Google Patents

一种半导体元件封装结构 Download PDF

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CN202523702U
CN202523702U CN2011205524274U CN201120552427U CN202523702U CN 202523702 U CN202523702 U CN 202523702U CN 2011205524274 U CN2011205524274 U CN 2011205524274U CN 201120552427 U CN201120552427 U CN 201120552427U CN 202523702 U CN202523702 U CN 202523702U
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chip
semiconductor component
packaging structure
component packaging
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黄亚发
周云福
李建利
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BrightKing Shenzhen Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4918Disposition being disposed on at least two different sides of the body, e.g. dual array

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

本实用新型公开了一种半导体元件封装结构,包括半导体元件的芯片和第一引脚、第二引脚和包封料;所述的芯片包裹在所述的包封料内,所述的第一引脚和第二引脚在一端所述的包封料内与所述的芯片连接,另一端伸出所述的包封料;所述的芯片两侧与所述的第一引脚和第二引脚的侧面焊接。本实用新型由于使用两引线侧面与芯片进行焊接组装,两引线侧面之间夹有芯片或者芯片与铜电极的组合,从而保证了在产品焊接占用面积交小的前提下实现了较大的引脚间距。

Description

一种半导体元件封装结构
技术领域
本实用新型涉及电子元器件领域,特别涉及半导体封装结构。 
背景技术
随着科技的发展,电子产品功能多样化、体积小型化是一个重要方向,也是个厂家必争的一个战略要地。 
随着产品小型化要求提高,针对对器件的小型化要求越来越高,尤其是功率型半导体器件,需要在产品体积、焊接面积等减小的情况下,不能降低原有电气特性,在防雷或静电防护方面由于器件小型化,部分元件将更加脆弱因此常有厂家提出防雷器件需要减小焊接面积、减小产品体积而器件电气性能需要在提高一个等级。 
目前市场上大功率防雷半导体器件主要有使用粉末环氧树脂涂装封装的插件型HYPERFIX(特大功率雪崩击穿TVS管)、使用黑胶型环氧树脂进行P600形式封装功率达30KW的大型TVS管。其中HYPERFIX据有功率大反应速度快的优点但其使用T型引线,引线的头端与芯片或铜片结合导致产品整个尺寸不能达到较小的尺寸,且在其设计称结构下当脚间距小到一定程度时在大浪涌或者大电压下,器件引脚之间易发生间隙放电而丧失功能,P600封装产品为圆柱型封装,故其在横向装配及垂直装配均占用固有的圆形区域,其暂用空间针对封装产品也相对较大加上P600产品封装产品封装芯片有限制,不能实现较大尺寸芯片的封装,从而功率上有一定局限性。 
发明内容
本实用新型的发明目的是设计一种半导体封装方式,以实现功率器件及防雷或防静电器件具有体积小、焊接占用面积小、引线间隔远在应用过程中不易发生间隙放电。 
本实用新型为了实现其技术目的而采用的技术方案是:一种半导体元件封装结构,包括半导体元件的芯片、第一引脚、第二引脚和包封料;所述的芯片包裹在所述的包封料内,所述的第一引脚的一端和第二引脚的一端都与所述的芯片连接,另一端伸出所述的包封料;所述的芯片两侧与所述的第一引脚和第二引脚的侧面焊接。 
进一步的,上述的一种半导体元件封装结构中:所述的第一引脚和第二引脚的截面为圆形或者方形。 
进一步的,上述的一种半导体元件封装结构中:在所述的芯片上还设置有铜电极。 
本实用新型由于使用两引线侧面与芯片进行焊接组装,两引线侧面之间夹有芯片或者芯片与铜电极的组合,从而保证了在产品焊接占用面积交小的前提下实现了较大的引脚间距。 
下面结合具体实施例与附图对本实用新型进行较为详细的说明。 
附图说明
图1是本实用新型实施例1示意图。 
图中:1、包封材料,2、第一引脚,3、芯片,4、第二引脚。 
具体实施方式:
如图1所示,本实施例是一种半导体封装方式,本实施例产品包含有包封材料1,第一引脚2,芯片3,第二引脚4。本实例中芯片3两侧焊接上第一引脚2和第二引脚4的侧面。本实施例的芯片3可以为单个芯片也可以为芯片与铜电极的组合,第一引脚2与第二引脚4之间夹着芯片,第一引脚2与第二引脚4露出包封料部分相互平行,由于其中间夹着芯片3,因此其引线之间距离将得到一定的增加。本实例焊接也有特点,其焊接可以是芯片3或者芯片与铜电极组合与第一引脚2、第二引脚4一起焊接而成,也可以由芯片与铜电极组合3先组装焊接后再与第一引脚2和第二引脚4一起焊接而成,最后通过包封料1对焊接后侧半制品进行包封。包封材料为环氧模塑料或者聚酰亚胺胶等相关的封装材料。 

Claims (3)

1.一种半导体元件封装结构,包括半导体元件的芯片、第一引脚、第二引脚和包封料;所述的芯片包裹在所述的包封料内,在所述的包封料内,所述的第一引脚的一端和第二引脚的一端都与所述的芯片连接,另一端伸出所述的包封料;其特征在于:所述的芯片(3)两侧与所述的第一引脚(2)和第二引脚(4)的侧面焊接。
2.根据权利要求1所述的一种半导体元件封装结构,其特征在于:所述的第一引脚(2)和第二引脚(4)的截面为圆形或者方形。
3.根据权利要求1所述的一种半导体元件封装结构,其特征在于:在所述的芯片(3)上还设置有铜电极。
CN2011205524274U 2011-12-27 2011-12-27 一种半导体元件封装结构 Expired - Lifetime CN202523702U (zh)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103414041A (zh) * 2013-08-14 2013-11-27 番禺得意精密电子工业有限公司 电连接器及电连接器的组装方法
CN105489560A (zh) * 2015-11-30 2016-04-13 广东百圳君耀电子有限公司 一种无外壳填充保护型电路元件及其制成工艺

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103414041A (zh) * 2013-08-14 2013-11-27 番禺得意精密电子工业有限公司 电连接器及电连接器的组装方法
CN105489560A (zh) * 2015-11-30 2016-04-13 广东百圳君耀电子有限公司 一种无外壳填充保护型电路元件及其制成工艺

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Address before: 518173 Guangdong, Longgang District, Shenzhen, Henggang six, about 7 Tang Tong Road, south of the Five Ridges Industrial Park on the first floor of 3

Patentee before: BestBright Electronics (Shenzhen) Co., Ltd.

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