CN202145311U - Device for high speed communication of computer and data signal controller - Google Patents
Device for high speed communication of computer and data signal controller Download PDFInfo
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- CN202145311U CN202145311U CN201120062905U CN201120062905U CN202145311U CN 202145311 U CN202145311 U CN 202145311U CN 201120062905 U CN201120062905 U CN 201120062905U CN 201120062905 U CN201120062905 U CN 201120062905U CN 202145311 U CN202145311 U CN 202145311U
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Abstract
The utility model discloses a device for high speed communication of a computer and a data signal controller, a high speed optical coupler isolating circuit performs digital isolation of a clock signal, a data signal, and an SPI of an SPI bus from a device selection signal, a serial-in parallel-out conversion device receives the data signal isolated via the high speed optical coupler, combines data bits to data words, and sends the data words to a data buffer area in a USB device controller; the USB device controller circuit sends the data in the data buffer area to the computer via a USB 2.0 bus; and an electrically-erasable memory circuit downloads a fixed firmware code of the USB device controller stored in the erasable memory during electrification of the whole device into the USB device controller to make the device complete initialization and configuration. The device in the utility model can substantially improve communication rate between the data signal controller and the computer.
Description
Technical field
The present invention relates to a kind of digital communication method and device.
Background technology
In the demanding automation fields of real-time such as servomotor control or inverter control; When debugging at the scene, the technological development personnel need communicate rotating speed of target, feedback speed, speed error, rotor-position through computing machine and digital signal controller to obtain motor; Real-time parameters such as the instant electric current of motor windings; Important parameters such as the DC voltage of inverter, the real-time of these parameters requires usually in the microsecond level.For requirement of real time, digital signal controller need adopt high speed bus interface and computing machine to communicate.
The UART interface is mainly adopted in communicating by letter between digital signal controller commonly used and the computing machine, and the digital signal controller chip integration becomes the UART interface directly to communicate by letter with the RS232 EBI of computing machine.The RS232 bus protocol is simple, but the highest only 230.4Kbps of traffic rate is difficult to satisfy higher real-time requirement, and be subject to disturb, reliability is not high, the packing of data is with to separate packet procedures also loaded down with trivial details relatively during communication.
USB full name Universal Serial Bus (USB); It is a kind of novel computer bus interface; High transmission speed has reached 480Mbps (being 60MB/s) in the USB2.0 standard of issue in 2000; Obtained widespread use at consumption electronic product and intelligent monitoring field at present, the usb bus technology makes that being connected of computing machine and external unit is very convenient.Yet, but do not have the integration USB EBI in the digital signal controller now.
The TMS320C2000 of the dsPIC30F of the digital signal controller of main flow such as Mircochip company series and Texas Instruments company is serial now; The relative higher speed interface of traffic rate that its chip integration becomes is the spi bus interface normally; Spi bus interface communication speed reaches as high as 30Mb/s; But since computing machine on do not have the spi bus interface, the digital signal processor sheet can't with computer-directed communications.
Summary of the invention
In order to overcome the traffic rate and the low deficiency of reliability of computing machine and digital signal controller in the prior art; The present invention provides the method for a kind of computing machine and digital signal controller high-speed communication; Can significantly improve the traffic rate and the reliability of computing machine and digital signal controller; Satisfy the real-time requirement of control automatically, cost is lower.
The technical solution adopted for the present invention to solve the technical problems may further comprise the steps:
1) the SPI interface in the digital signal controller is the main equipment sending mode; The data word length of communication is 16 (bit) or 8 (bit); Adopt the mode of interruption or the transmission that mode regularly realizes data.
2), select signal to isolate data-signal, clock signal and slave unit that digital signal controller SPI interface sends at digital signal controller and seal in and go out spacer assembly is set between the conversion equipment.
3) clock signal and the slave unit that detect digital signal controller SPI interface are selected signal; And receive data when to select signal be effective, and accomplish and seal in and go out conversion at the rising edge of SPI interface clock (when digital signal controller SPI interface is that negative edge is when sending data) or negative edge (when digital signal controller SPI interface is that rising edge is when sending data) and slave unit.
4) in the USB device controller, open up the data buffer and receive the data that seal in and go out the parallel transmission of conversion equipment, when buffer zone is expired, adopt the USB2.0 EBI that buffer contents is sent to computing machine.
The present invention provides a kind of device of realizing said method, comprises feed circuit, high-speed light coupling device buffer circuit, seals in and go out conversion equipment, USB device controller and electricity erasable memorizer.This device adopts the power supply of usb bus power supply and need not to provide separately power supply.Feed circuit become 3.3V voltage with the 5V voltage transformation that usb bus provides, and on the one hand for the secondary of high-speed light coupling buffer circuit and seal in and go out conversion equipment power supply is provided, for the USB device controller power supply are provided on the other hand.High-speed light coupling device buffer circuit selects signal to carry out the numeral isolation to clock signal, data-signal, the SPI slave unit of spi bus; Seal in and go out conversion equipment and receive the data-signal after high-speed light coupling device is isolated, and data bit (bit) is combined into data word (Word) sends it to then in the data buffer in the USB device controller.The USB device controller circuitry is sent to computing machine with the data in the data buffer through the USB2.0 bus; The USB device controller firmware code that the electricity erasable memorizer circuit will be stored in when whole device powers in the electricity erasable memorizer is downloaded in the USB device controller so that it accomplishes initialization and configuration.
The invention has the beneficial effects as follows: the method and the device of the present invention's design can significantly improve the traffic rate between digital signal controller and the computing machine: traffic rate is 30Mb/s between digital signal controller SPI interface and the complex logic device able to programme; Overall communication speed is 521KB/s, is higher than the RS232 bus communication speed far away.
Below in conjunction with accompanying drawing and embodiment the present invention is further specified.
Description of drawings
Fig. 1 is a general structure synoptic diagram of the present invention
Among the figure, the 1-digital signal controller; Spi bus interface in the 2-digital signal controller; 3-high-speed light coupling device; 4-seals in and goes out conversion equipment; The 5-USB device controller; End points buffer zone in the 6-USB equipment; USB master controller in the 7-computing machine; The 8-computing machine; The 9-feed circuit; 10-electricity erasable memorizer circuit.
Fig. 2 is sealing in and go out the conversion equipment functional schematic among the present invention.
Among the figure, 3-high-speed light coupling device; 4-seals in and goes out conversion equipment; 6-USB equipment end dot buffer zone.
Embodiment
In order to embody exploitativeness of the present invention, be that example adopts device of the present invention and computing machine to communicate with the digitial controller TMS320F28335 of Texas Instruments company and the USB device controller CY7C68013 of Cypress company here.
When the present invention works:
1), configures the SPI communication module in the digital signal controller according to the requirement of step 1)
2) at digital signal controller and seal in and the data-signal, clock signal and the slave unit that go out between the conversion equipment to adopt high-speed light coupling device that digital signal controller SPI interface is sent selects signal to isolate; The bandwidth of high-speed light coupling device must be greater than the SPI clock frequency; Like the SPI clock is 30MHz, and then the bandwidth of high-speed light coupling device just must be higher than 30MHz.The device that the present invention relates to adopts high speed photo coupling ADUM1401C, and its bandwidth is 90MHz.
3) seal in and go out the status signal that rising edge that conversion equipment detects the clock of digital signal controller SPI interface (when digital signal controller SPI interface is that negative edge is when sending data) or negative edge (when digital signal controller SPI interface is that rising edge is when sending data), slave unit are selected the buffer zone in signal and the USB device controller; Receive data when to select signal be effective at the rising edge of spi bus clock (when digital signal controller SPI interface is that negative edge is when sending data) or negative edge (when digital signal controller SPI interface is that rising edge is when sending data) and slave unit; The status signal that per 16 (when the communication data word length is 16 (bit)) or 8 (when the digital word length of communicating by letter is 8 (bit)) binary digits (bit) are combined into 1 data word (Word) and the buffer zone in the USB device controller show buffer zone less than the time be sent in the buffer zone in the USB device controller this 1 data word (Word) is parallel.The device that the present invention relates to adopts complex programmable device EPM3128ATC100 completion to seal in and goes out convert task.
4) open up buffer zone in USB device inside, and by the buffer in real time monitoring of USB device controller to its inside, when buffer zone was expired, the data that it is inner were sent to computing machine through usb bus, the USB transmission mode is bulk transfer mode (Bulk).The device that the present invention relates to adopts CY7C68013A as the USB device controller; Portion opens up the buffer zone that size is 256 bytes (Byte) within it; The firmware program framework that firmware program in its USB device controller adopts Cypress company to provide only needs that transmission mode is configured to bulk transfer (Bulk) and gets final product.
Provide the instance implementation step below by method and the device that the present invention relates to for more specifically explaining:
1) the spi bus interface module of allocating digital signal controller
Digital signal controller TMS320F28335 adopts outside 30MHz crystal oscillator, and in sheet, obtaining system clock behind phaselocked loop 8 frequencys multiplication and frequency divider 2 frequency divisions is 120MHz; The SPI module is operated in and strengthens the FIFO buffer mode, sets up the transmission of 16 grades of degree of depth and receives buffering, working mode selection main equipment send mode; SPI module clock is decided to be 30MHz (Texas Instruments technical manual regulation SPI module clock must not surpass system clock 1/4th); The communication data word length of SPI module is 16; Clock module is the negative edge pattern of no phase delay, and high level is effective; Data are sent as timed sending, and per 50 μ s squeeze into the FIFO buffering with several numbers of 16 and sent by the SPI module then.
After accomplishing above configuration; The clock signal of available oscilloscope measurement spi bus and SPI slave unit are selected signal; Can observe and have only when the SPI clock signal exists; It is low level just that the SPI slave unit is selected signal, and has only that the SPI clock signal just exists when SPI slave unit selection signal is low level.
2) the SPI module of digital signal controller TMS320F28335 and the hardware unit of the present invention's design are coupled together with data line (4), can observe the secondary output of high-speed light coupling isolator with oscillograph.
If high-speed light coupling isolator is normal, should be able to select signal with the clock signal and the SPI slave unit of the spi bus of oscillograph after its secondary is observed isolation.
3) download and to seal in and go out the required code in the conversion equipment.
After accomplishing above-mentioned work,, should be able to seal in and go out the waveform of observing data-signal on the output data bus of conversion equipment with oscillograph if seal in and to go out conversion equipment normal.
4) the CY7C68013 firmware program that Cypress company is provided is downloaded in the electricity erasable memorizer.
5) the Universal USB device driver that Cypress company provides is installed on computers.
6) use application software to read the data on the usb bus, application software can use Visual C++ or LabVIEW/CVI or LabVIEW to develop voluntarily according to particular demands.
Claims (1)
1. the device of computing machine and digital signal controller high-speed communication; Comprise feed circuit, high-speed light coupling device buffer circuit, seal in and go out conversion equipment, USB device controller and electricity erasable memorizer; It is characterized in that: described feed circuit become 3.3V voltage with the 5V voltage transformation that usb bus provides; On the one hand for the secondary of high-speed light coupling buffer circuit and seal in and go out conversion equipment power supply is provided, for the USB device controller power supply is provided on the other hand; High-speed light coupling device buffer circuit selects signal to carry out the numeral isolation to clock signal, data-signal, the SPI slave unit of spi bus; Seal in and go out conversion equipment and receive the data-signal after high-speed light coupling device is isolated; And, send it to then that the USB device controller circuitry is sent to computing machine with the data in the data buffer through the USB2.0 bus in the data buffer in the USB device controller with set of data bits generated data word; The USB device controller firmware code that the electricity erasable memorizer circuit will be stored in when whole device powers in the electricity erasable memorizer is downloaded in the USB device controller so that it accomplishes initialization and configuration.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201120062905U CN202145311U (en) | 2011-03-10 | 2011-03-10 | Device for high speed communication of computer and data signal controller |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201120062905U CN202145311U (en) | 2011-03-10 | 2011-03-10 | Device for high speed communication of computer and data signal controller |
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| Publication Number | Publication Date |
|---|---|
| CN202145311U true CN202145311U (en) | 2012-02-15 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201120062905U Expired - Fee Related CN202145311U (en) | 2011-03-10 | 2011-03-10 | Device for high speed communication of computer and data signal controller |
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| CN (1) | CN202145311U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140089552A1 (en) * | 2011-06-24 | 2014-03-27 | Leonardo Sala | Usb hubs with galvanic isolation |
-
2011
- 2011-03-10 CN CN201120062905U patent/CN202145311U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140089552A1 (en) * | 2011-06-24 | 2014-03-27 | Leonardo Sala | Usb hubs with galvanic isolation |
| US9009382B2 (en) * | 2011-06-24 | 2015-04-14 | Maxim Integrated Products, Inc. | USB hubs with galvanic isolation |
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120215 Termination date: 20150310 |
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| EXPY | Termination of patent right or utility model |