CN208369684U - A kind of video image processor - Google Patents

A kind of video image processor Download PDF

Info

Publication number
CN208369684U
CN208369684U CN201820682387.7U CN201820682387U CN208369684U CN 208369684 U CN208369684 U CN 208369684U CN 201820682387 U CN201820682387 U CN 201820682387U CN 208369684 U CN208369684 U CN 208369684U
Authority
CN
China
Prior art keywords
image
module
box body
interface
video image
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201820682387.7U
Other languages
Chinese (zh)
Inventor
刘益山
曹晓鹏
刘良
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Guangzhou Zhong Gan Mdt Infotech Ltd
Original Assignee
Guangzhou Zhong Gan Mdt Infotech Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Guangzhou Zhong Gan Mdt Infotech Ltd filed Critical Guangzhou Zhong Gan Mdt Infotech Ltd
Priority to CN201820682387.7U priority Critical patent/CN208369684U/en
Application granted granted Critical
Publication of CN208369684U publication Critical patent/CN208369684U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Controls And Circuits For Display Device (AREA)

Abstract

The utility model discloses a kind of video image processors, including box body, box body is built-in with image and receives FPGA module, image segmentation, frequency multiplication, zoomed image processing module, the power patching module, image buffers module and image output module, box portion outside has the interface of connection external equipment, it is connected with the digital interface in image processor with the video card corresponding ports of computer, the EDID information of the automatic reading image processor of video card after successful connection, video card exports the image of corresponding resolution to processor, processor receives image buffered first, then it is required according to configuration parameter, image is divided accordingly, frequency multiplication, scaling processing, pass through image output module output driving display unit later.

Description

A kind of video image processor
Technical field
The utility model belongs to video technique field more particularly to a kind of video image processor.
Background technique
With the fast development of image display technology, the figure video card that display chip is integrated in computer is individually exported Port performance is also constantly being promoted, and is promoted at present from conventional 1080P output to can achieve output 4K or higher Resolution ratio;But due to computer operating system, for example, the resource management limitation of WINDOWS operating system, a meter The figure video card limited amount that can be installed in calculation machine system and effectively manage, at most can only be simultaneously in WINDOWS operating system Make a video card output port more than 20 that there is Video Out, there is also same by other computer operating systems such as linux, unix Sample applies bottleneck.
Application along with big data era, the application of the management of data wisdom and display, video-splicing wall everywhere may be used See, at best image terminal indispensable in the projects such as smart city, safe city, intelligent transportation, in video-splicing wall Show the figure video driver tens that same computer system is needed in application or even a up to 1080P resolution ratio up to a hundred Display unit, if directly driving the scheme of display unit using the video card output in single computer system, it is clear that can not It completes, if not only increasing the estimate for a project cost using the scheme of video card joint output driving in multiple stage computers system; And since the data volume that image is shown is very big, the implementation technology of image data transmission and interaction between multiple stage computers is difficult Degree is also very big.
Utility model content
The utility model provides a kind of video image processor, solves the deficiencies in the prior art.
A kind of video image processor, including including box body, box body is built-in with 1 image and receives FPGA module, 2 images Segmentation, frequency multiplication, zoomed image processing module, 1 the power patching module, 2 image buffers modules, image output module, power supply Interconnecting module;Box portion outside has the interface of connection external equipment, connect with computer and receives image information, first delays to image Punching processing, then according to requiring to be divided accordingly, export image after frequency multiplication, scaling processing;
Further, the quantity of image output module is 4, needs to increase the number of output module according to output;
Further, the interface of box portion outside includes connecting the DVI/HDMI/DP digital interface of outer computer video card, The circuit structure of the interface is built in the box body.
Further, tray interior is also placed with the JTAG debugging module that program is debugged and downloaded for FPGA.
Further, the interface of box portion outside further includes that, for the RS232 serial interface of serial communication, the interface is electric Line structure is built in the box body.
Further, it is also placed in box body and video processing applications program is encrypted using known encryption method Encrypting module.
Further, the SDRAM high speed electricity for superhigh speed buffer function in video image processing is also placed in box body Road module.
Further, the EEPROM memory module for saving input interface EDID parameter information is also placed in box body.
Further, the synchronous communication control for transmitting synchronizing information between multiple images processor is also placed in box body Module
The utility model has the following beneficial effects: a kind of video image processor provided by the utility model, can dock aobvious The single output port of card receives the 4K resolution ratio or higher resolution image of video card output, then by dividing image It cuts, after the specialized images technical treatment such as frequency multiplication, scaling, the image of the single output port of video card can be made, be converted at most output 8 The image of a 1080P, while driving the display unit of 8 1080P;Each output port access the utility model of video card After video image processor, the display list of the images outputting of a computer system while driving up to up to a hundred may be implemented Member, can preferably meet big data era, and the application demand of the management of data wisdom and display is also brought while saving the project budget Shocking display effect, makes one fresh and new.
Detailed description of the invention
Fig. 1 is that a kind of video image processor provided by the utility model implements structural schematic diagram;
Fig. 2 is that another video image processor provided by the utility model implements structural schematic diagram.
Specific embodiment
As shown in Figure 1, a kind of video image processor, including box body 100, box body 100 are built-in with image and receive FPGA mould Block 101, image segmentation, frequency multiplication, zoomed image processing module 1021 and 1022, image buffers module 1041 and 1042,4 images Output module 1031,1032,1033 and 1034, there are also and PERCOM peripheral communication serial communication modular 105, circuit structure is built in The JTAG debugging module 106 of box body 100 and the DVI digital interface 107 docked with outer computer video card output end of image mouth;
As shown in Fig. 2, video image processor provided by the utility model is also equipped with and outside on the basis of Fig. 1 The DP digital interface 108 and HDMI digital interface 109 of computer display card output end of image mouth docking;There are also 4 additional displays The image output module 1035,1036,1037 and image output module 1038 of unit;
Should be noted that Fig. 1, it is shown in Fig. 2 by way of example only, in actual products, can according to need setting One or two of DVI digital interface, DP digital interface, HDMI digital interface;
It is also equipped with inside box body 100 and is added using known encryption method to what video processing applications program was encrypted Close module;For saving the EEPROM/FLASH memory module of application program configuration parameters storage;For saving input interface The EEPROM memory module of EDID parameter information;Synchronous communication for transmitting synchronizing information between multiple images processor controls mould Block and the power patching module of the voltage conversion for image processor power supply.
Video image processor provided by the utility model, with the DVI digital interface of image processor and computer The connection of the port video card DVI, the EDID information of the automatic reading image processor of video card after successful connection, video card export corresponding resolution To processor, processor receives image buffered first, is then required according to configuration parameter image, corresponding to image progress Segmentation, frequency multiplication, scaling processing pass through image output module output driving display unit later.It is highly preferred that described image is handled Device cassette interior contains encrypting module, video processing applications program in box can be encrypted, improve the quilt of box The safety plagiarized and imitated.
Video image processor disclosed in the utility model embodiment can effectively extend computer display card driving Display unit quantity meets the display demand of extensive combination, has stronger technical feasibility and implementation result guarantee, together When can also saving project budget cost by a relatively large margin, also preferably meet various output ports of existing video card on the market Demand, the also compatible more video card ports type of video image processor provided by embodiment, improves image processor The scope of application.
It is worth noting that being created although foregoing teachings describe the utility model by reference to several specific embodiments Spirit and principle, it is to be understood that, it is not limited to the specific embodiments disclosed for the utility model, any without creation Property the change or replacement expected of labour, should all cover in scope of protection of the utility model.

Claims (9)

1. a kind of video image processor, it is characterised in that: including box body, box body is built-in with 1 image and receives FPGA module, and 2 A image segmentation, frequency multiplication, zoomed image processing module, 1 the power patching module, 2 image buffers modules, image export mould Block, the power patching module;Box portion outside has the interface of connection external equipment, connect with computer and receives image information, first to figure As carrying out buffered, then according to requiring to be divided accordingly, export image after frequency multiplication, scaling processing.
2. video image processor according to claim 1, it is characterised in that: the quantity of image output module is 4, root Need to increase the number of output module according to output.
3. video image processor according to claim 1, it is characterised in that: the interface of box portion outside includes that connection is outer The DVI/HDMI/DP digital interface of portion's computer display card, the circuit structure of the interface are built in the box body.
4. video image processor according to claim 1, it is characterised in that: tray interior is also placed with for FPGA tune The JTAG debugging module of examination and downloading program.
5. video image processor according to claim 1, it is characterised in that: the interface of box portion outside further includes being used for The RS232 serial interface of serial communication, the circuit structure of the interface are built in the box body.
6. video image processor according to claim 1, it is characterised in that: be also placed in box body and utilize known encryption The encrypting module that video processing applications program is encrypted in method.
7. video image processor according to claim 1, it is characterised in that: be also placed in box body for video image The SDRAM high speed circuit module of superhigh speed buffer function in processing.
8. video image processor according to claim 1, it is characterised in that: be also placed in box body for saving input The EEPROM memory module of interface EDID parameter information.
9. video image processor according to claim 1, it is characterised in that: be also placed in box body for multiple images The synchronous communication control module of synchronizing information is transmitted between processor.
CN201820682387.7U 2018-05-09 2018-05-09 A kind of video image processor Active CN208369684U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201820682387.7U CN208369684U (en) 2018-05-09 2018-05-09 A kind of video image processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201820682387.7U CN208369684U (en) 2018-05-09 2018-05-09 A kind of video image processor

Publications (1)

Publication Number Publication Date
CN208369684U true CN208369684U (en) 2019-01-11

Family

ID=64934269

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201820682387.7U Active CN208369684U (en) 2018-05-09 2018-05-09 A kind of video image processor

Country Status (1)

Country Link
CN (1) CN208369684U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111343393A (en) * 2020-02-25 2020-06-26 四川新视创伟超高清科技有限公司 Ultrahigh-definition video picture cutting method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111343393A (en) * 2020-02-25 2020-06-26 四川新视创伟超高清科技有限公司 Ultrahigh-definition video picture cutting method

Similar Documents

Publication Publication Date Title
CN103915063B (en) LED display controls card and controls system, resolution self-adapting regulation method
CN111031371B (en) Single-line screen projection system and method
CN107704413A (en) A kind of reinforcement type parallel information processing platform based on VPX frameworks
CN103309830A (en) Driver of CPCI bus CAN communicating module under VxWorks operating system and driving method
CN103763549A (en) Camera Link interface testing and developing system based on FPGA
CN107241591A (en) A kind of embedded 3D video image display methods of airborne radar and system
CN107277390A (en) One kind is based on Zynq multi-channel video splicing systems
CN103412841A (en) Driver and driving method for CPCI (Compact Peripheral Component Interconnect) bus RS422 communication module under VxWorks operating system
CN205692166U (en) Core board based on PowerPC framework central processing unit
CN208369684U (en) A kind of video image processor
CN203070010U (en) Multifunctional board card used for flexible AC power transmission apparatus
CN202026431U (en) Debugging device and debugging system
CN103780819A (en) Intelligent industrial camera
CN202855261U (en) Asynchronous LED display screen full-color synchronous play control system
CN201765584U (en) Device for sending general calculation data of graphics processing unit with digital visual interface (DVI)
CN103108165A (en) Embedded flotation froth image monitoring device based on digital signal processor (DSP)
CN208367733U (en) Embedded A I machine vision hardware configuration
CN203658990U (en) Debugging device for central processing unit
CN207683430U (en) Full visual field camera host controller
CN204046728U (en) A kind of multiple DSP system based on video information acquisition process
CN203761518U (en) FPGA-based Camera Link interface experiment and development system
CN110245099B (en) FPGA-based data storage and dump system
CN208225049U (en) A kind of computer data is to passing on-line unit
CN107423249A (en) It is a kind of based on AHB lite bus protocols from end bus control unit design method
CN105068965A (en) Inter-integrated circuit (I2C) bus based NAND Flash storage method and system

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant