CN201947553U - Supplementary structure for detecting layer to layer registration of PCB (printed circuit board) - Google Patents
Supplementary structure for detecting layer to layer registration of PCB (printed circuit board) Download PDFInfo
- Publication number
- CN201947553U CN201947553U CN2010202360780U CN201020236078U CN201947553U CN 201947553 U CN201947553 U CN 201947553U CN 2010202360780 U CN2010202360780 U CN 2010202360780U CN 201020236078 U CN201020236078 U CN 201020236078U CN 201947553 U CN201947553 U CN 201947553U
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- pcb
- supplementary structure
- level
- annulus
- veneer
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Abstract
A supplementary structure for detecting layer to layer registration of a PCB (printed circuit board), which is preinstalled on a single PCB, is at least two circular rings arranged at the edge of each single PCB. Circular rings of each single PCB are arranged with the same axis, and the diameter of each circular ring increases or reduces progressively in sequence. The supplementary structure is novel in conception and convenient to use. By means of three-dimensional detection of the circular ring offset between single PCBs, qualification of press fit between single PCBs can be judged directly.
Description
Technical field
The utility model relates to a kind of PCB and makes the auxiliary detection structure.
Background technology
Existing P CB plate is generally sandwich construction, form by the pressing of polylith PCB veneer, owing to have mismachining tolerance during pressing, can occur the problem of skew between each PCB veneer, and be the insoluble difficult problems of those skilled in the art always in the drift condition that how to detect after the pressing between each PCB veneer.
Summary of the invention
In view of this, be necessary to provide a kind of easy to detect, measure accurately PCB level to level alignment degree and detect supplementary structure.
A kind of PCB level to level alignment degree detects supplementary structure, defaults in the PCB veneer, and this supplementary structure is at least two annulus that are arranged at each PCB veneer edge, and each PCB veneer annulus is a concentric setting and circle diameter increasing or decreasing successively.
As the improvement to such scheme, the annulus spacing is a reference value A between the adjacent PCB veneer.This reference value A is the 2mil(mil).
As further improvement of these options, described annulus is four, is distributed in four corners of each PCB veneer.
And described annulus live width is the 4mil(mil).
The utility model is novel, can judge directly by annulus side-play amount between the three-D detection PCB veneer whether pressing is qualified, convenient and practical between each PCB veneer.
Description of drawings
Fig. 1 is a pressing pre-structure schematic diagram between each PCB veneer of the utility model embodiment;
Fig. 2 is a structural representation after each PCB veneer pressing of present embodiment;
Fig. 3 is the overlapping back of each PCB veneer annulus of a present embodiment structural representation.
Be further detailed below in conjunction with accompanying drawing.
Embodiment
At the defective that prior art exists, the utility model embodiment has proposed a kind of more perfect solution, in detail shown in accompanying drawing 1～3.
It mainly is a kind of technical solution that is difficult to detect drift condition between each PCB individual layer in the PCB manufacturing process at sandwich construction that PCB level to level alignment degree that this programme disclosed detects supplementary structure.For the ease of understanding, the PCB that this programme exemplified is formed by six PCB veneer 1 pressings of L1～L6, is laid with circuit on each PCB veneer.Need guarantee can not to occur exceeding between each veneer the skew of permission during in pressing at each PCB veneer, therefore, after pressing, all must measure the side-play amount of each PCB veneer 1, check whether be non-defective unit by instrument.
For the ease of detecting, the supplementary structure of present embodiment is four annulus 11 that are arranged at each 1 four corner of PCB veneer, the annulus 11 of each PCB veneer 1 same position increases progressively successively for concentric setting and annulus 11 diameters, annulus 11 spacings between adjacent PCB veneer 1 are provided with a canonical reference value A, this value A is the 2mil(mil), the live width with annulus 11 also is defined as 4mil simultaneously.
After the pressing of a plurality of PCB veneer is finished, measure the spacing between the annulus and bottom PCB veneer on each PCB veneer by three-D, whether the side-play amount that can draw this layer PCB veneer exceeds arm's length standard.
The above embodiment has only expressed execution mode of the present utility model, and it describes comparatively concrete and detailed, but can not therefore be interpreted as the restriction to the utility model claim.Should be noted that; for the person of ordinary skill of the art; under the prerequisite that does not break away from the utility model design; can also make some distortion and improvement; as the quantity of annulus and concrete dimensions can be decided according to the actual requirements, circle diameter also can once successively decrease etc. between the adjacent PCB veneer, these all belong to protection range of the present utility model.Therefore, the protection range of the utility model patent should be as the criterion with claims.
Claims (5)
1. a PCB level to level alignment degree detects supplementary structure, default on the PCB veneer (1), it is characterized in that: this supplementary structure is at least two annulus (11) that are arranged at each PCB veneer edge, and each PCB veneer annulus is a concentric setting and circle diameter increasing or decreasing successively.
2. PCB level to level alignment degree according to claim 1 detects supplementary structure, and it is characterized in that: the annulus spacing is a reference value A between the adjacent PCB veneer.
3. PCB level to level alignment degree according to claim 2 detects supplementary structure, and it is characterized in that: described reference value A is 2mil.
4. PCB level to level alignment degree according to claim 3 detects supplementary structure, and it is characterized in that: described annulus is four, is distributed in four corners of each PCB veneer.
5. detect supplementary structure according to any described PCB level to level alignment degree in the claim 1～4, it is characterized in that: described annulus live width is 4mil.
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Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010202360780U CN201947553U (en) | 2010-06-24 | 2010-06-24 | Supplementary structure for detecting layer to layer registration of PCB (printed circuit board) |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010202360780U CN201947553U (en) | 2010-06-24 | 2010-06-24 | Supplementary structure for detecting layer to layer registration of PCB (printed circuit board) |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201947553U true CN201947553U (en) | 2011-08-24 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN2010202360780U Expired - Fee Related CN201947553U (en) | 2010-06-24 | 2010-06-24 | Supplementary structure for detecting layer to layer registration of PCB (printed circuit board) |
Country Status (1)
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| CN (1) | CN201947553U (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103839861A (en) * | 2014-03-18 | 2014-06-04 | 常州天合光能有限公司 | Multi-overprinting alignment method for solar cell surface fine grid |
| CN103913471A (en) * | 2012-12-31 | 2014-07-09 | 深南电路有限公司 | Method for examining position alignment of capacitor-embedding layer on capacitor-embedding plate |
| CN104302098A (en) * | 2014-10-31 | 2015-01-21 | 华进半导体封装先导技术研发中心有限公司 | Circuit board lamination alignment target structure and manufacturing method thereof |
| CN104582331A (en) * | 2014-12-31 | 2015-04-29 | 广州兴森快捷电路科技有限公司 | Inner-layer deviation detecting method for multi-layer circuit board |
| CN108925066A (en) * | 2018-08-28 | 2018-11-30 | 深圳市景旺电子股份有限公司 | A kind of multi-layer board interlayer bias detecting method and detection system |
-
2010
- 2010-06-24 CN CN2010202360780U patent/CN201947553U/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103913471A (en) * | 2012-12-31 | 2014-07-09 | 深南电路有限公司 | Method for examining position alignment of capacitor-embedding layer on capacitor-embedding plate |
| CN103913471B (en) * | 2012-12-31 | 2016-04-13 | 深南电路有限公司 | The method held and plate buries and holds layer contraposition is buried in a kind of inspection |
| CN103839861A (en) * | 2014-03-18 | 2014-06-04 | 常州天合光能有限公司 | Multi-overprinting alignment method for solar cell surface fine grid |
| CN103839861B (en) * | 2014-03-18 | 2016-11-16 | 常州天合光能有限公司 | Repeatedly chromatography alignment methods for the thin grid of solar cell surface |
| CN104302098A (en) * | 2014-10-31 | 2015-01-21 | 华进半导体封装先导技术研发中心有限公司 | Circuit board lamination alignment target structure and manufacturing method thereof |
| CN104582331A (en) * | 2014-12-31 | 2015-04-29 | 广州兴森快捷电路科技有限公司 | Inner-layer deviation detecting method for multi-layer circuit board |
| CN104582331B (en) * | 2014-12-31 | 2017-10-17 | 广州兴森快捷电路科技有限公司 | The internal layer off normal detection method of multilayer circuit board |
| CN108925066A (en) * | 2018-08-28 | 2018-11-30 | 深圳市景旺电子股份有限公司 | A kind of multi-layer board interlayer bias detecting method and detection system |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C56 | Change in the name or address of the patentee | ||
| CP01 | Change in the name or title of a patent holder |
Address after: Huizhou City, Guangdong province 516211 freshwater town Huiyang District Xinqiao village Cheng Technology Park Patentee after: Victory Giant Technology (Huizhou) Co., Ltd. Address before: Huizhou City, Guangdong province 516211 freshwater town Huiyang District Xinqiao village Cheng Technology Park Patentee before: Victory Giant Technology(HuiZhou)Co.,Ltd. |
|
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110824 Termination date: 20180624 |