CN201903876U - Circuit board supporting automatic external test equipment - Google Patents
Circuit board supporting automatic external test equipment Download PDFInfo
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- CN201903876U CN201903876U CN2010206819447U CN201020681944U CN201903876U CN 201903876 U CN201903876 U CN 201903876U CN 2010206819447 U CN2010206819447 U CN 2010206819447U CN 201020681944 U CN201020681944 U CN 201020681944U CN 201903876 U CN201903876 U CN 201903876U
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Abstract
The utility model relates to a circuit board supporting automatic external test equipment and a method for externally controlling the circuit board. The circuit board comprises a microprocessor and a functional module group connected with the microprocessor, wherein various functional modules in the functional module group are connected with the microprocessorrespectively; the circuit board further comprises a plurality of isolating control circuits, wherein the isolating control circuits are used for isolating the control of the microprocessor to each functional module and allowing the automatic external control test equipment to control each functional module in the functional module group; each isolating control circuit is arranged between the microprocessor and the automatic external test equipment and arranged in the corresponding functional module. By using the circuit board, the problems that the present circuit board cannot support the automatic external test equipment and cannot accurately position test faults are solved. The circuit board supports the automatic external test equipment and can be used for accurately testing.
Description
Technical field
The utility model relates to a kind of circuit board of supporting outside ATE (automatic test equipment).
Background technology
The fault detect of existing circuit board all is by microprocessor each entrained functional module of circuit board self to be detected respectively, but such detection method can't judge it is that functional module fault actually, and localization of fault is inaccurate.
Outside ATE (automatic test equipment) ATE carries out under the situation of the microprocessor release bus control right of tested circuit board, be that microprocessor does not participate in operating circuit in the circuit board, the test of circuit board inner function module is that externally the control of ATE (automatic test equipment) gets off to finish, can detect at different functional modules, carry out fault and normal indication respectively, but finish this test, need circuit board inside to have a kind of circuit can support the test of external test facility, all can not the supports outer ATE (automatic test equipment) in the available circuit plate, this just presses for provides a kind of circuit board that can support outside ATE (automatic test equipment).
The utility model content
Can't support outside ATE (automatic test equipment), test failure to locate inaccurate technical matters in order to solve existing circuit board, the utility model provides a kind of circuit board of supporting external test facility.
Technical solution of the present utility model:
A kind of circuit board of supporting outside ATE (automatic test equipment), the functional module group that comprises microprocessor and be connected with microprocessor, each functional module links to each other with microprocessor respectively in the described functional module group, its special character is: it comprises that also being used to isolate microprocessor controls each functional module, a plurality of isolation control circuits that outside ATE (automatic test equipment) can be controlled each functional module of functional module group, described each isolation control circuit is arranged between microprocessor and the outside ATE (automatic test equipment), and described each isolation control circuit is separately positioned in the corresponding functional modules.
Above-mentioned functions module group comprises clock module, and described isolation control circuit comprises clock circuit, and described clock circuit is arranged in the clock module, and described clock circuit comprises first Sheffer stroke gate and second Sheffer stroke gate; Two input ends of described first Sheffer stroke gate connect the output of inner crystal oscillator and the clock shielded signal of outside ATE (automatic test equipment) respectively, one of them input end of its output termination second Sheffer stroke gate, the external clock input signal of the outside ATE (automatic test equipment) of another input termination of described second Sheffer stroke gate is used the clock signal pin in the plate of the output termination microprocessor of described second Sheffer stroke gate.
Above-mentioned functions module group comprises bus control module, and described bus inhibition request circuit is arranged in the bus control module,
Described bus inhibition request circuit comprises the inhibit circuit that is used to forbid microprocessor control bus control module, be used for outside ATE (automatic test equipment) carries out the address bus circuit of external control and is used for outside ATE (automatic test equipment) is carried out external control to the data bus data bus circuit address bus
Described inhibit circuit, address bus circuit and data bus circuit are arranged between microprocessor and the outside ATE (automatic test equipment) and are parallel with one another;
Described inhibit circuit comprises the signal driver and the reset circuit of series connection, described reset circuit comprises or logic, described or logic one end connects outside ATE (automatic test equipment), and the other end connects signal driver, and the other end of described signal driver is connected with microprocessor;
Described address bus circuit comprises first bidirectional buffer and the latch of series connection, and the other end of described first bidirectional buffer links to each other with outside ATE (automatic test equipment), and the other end of described latch links to each other with microprocessor;
Described data bus circuit comprises second bidirectional buffer, and an end of described second bidirectional buffer links to each other with outside ATE (automatic test equipment), and the other end of described second bidirectional buffer links to each other with microprocessor.
Above-mentioned functions module group comprises the discrete magnitude control module, described isolation control circuit comprises discrete magnitude buffer circuit, discrete magnitude input circuit and discrete magnitude output circuit, described discrete magnitude buffer circuit, discrete magnitude input circuit and discrete magnitude output circuit are arranged in the discrete magnitude control module
Described discrete magnitude buffer circuit comprises the signal driver and the reset circuit of series connection, described reset circuit comprises or logic, described or logic one end connects outside ATE (automatic test equipment), and the other end connects signal driver, and the other end of described signal driver is connected with microprocessor;
Described discrete magnitude input circuit comprises first modulate circuit, one-way damper and the 6th bidirectional buffer, described first modulate circuit and one-way damper series connection, the other end of described first modulate circuit links to each other with outside ATE (automatic test equipment), and the other end of described one-way damper is connected with microprocessor by 16 peripheral data buses and the 5th bidirectional buffer; Described discrete magnitude output circuit comprises the 6th bidirectional buffer, discrete magnitude input latch and second modulate circuit, described discrete magnitude input latch is connected with second modulate circuit, the other end of described discrete magnitude input latch is connected with microprocessor by 16 peripheral data buses and the 5th bidirectional buffer, and the other end of described second modulate circuit links to each other with outside ATE (automatic test equipment); One end of described the 6th bidirectional buffer links to each other with outside ATE (automatic test equipment) by the sixteen-bit system data bus, and its other end is connected with microprocessor by 16 peripheral data buses and the 5th bidirectional buffer.
The method of outside automatic control circuit board may further comprise the steps:
1] set up isolation control circuit in this circuit board, described isolation control circuit one end is connected with outside automatic equipment, and the other end is connected with microprocessor, and described isolation control circuit is used for isolating the control of microprocessor to each functional module of functional module group;
2] outside ATE (automatic test equipment) sending function shielded signal is isolated the control of microprocessor to functional module to isolation control circuit;
3] outside ATE (automatic test equipment) sending function input signal is given isolation control circuit, isolates microprocessor by isolation control circuit and takes over functional module, and functional module is carried out outside test automatically.
7, the method for outside automatic control circuit board according to claim 5 is characterized in that: concrete steps are:
1] set up isolation control circuit in this circuit board, described isolation control circuit is a clock circuit, and described clock circuit comprises first Sheffer stroke gate and second Sheffer stroke gate that is parallel between outside ATE (automatic test equipment) and the microprocessor:
2] outside ATE (automatic test equipment) tranmitting data register shielded signal is given first Sheffer stroke gate, and the shielding microprocessor is to the control of inner crystal oscillator in the clock module;
3] outside ATE (automatic test equipment) sends the control that the external clock input signal is taken over clock module to the second Sheffer stroke gate control microprocessor, isolates microprocessor by clock circuit and controls clock module.
Above method concrete steps are:
1] in this circuit board, sets up isolation control circuit, described isolation control circuit is a bus inhibition request circuit, described bus inhibition request circuit comprises the inhibit circuit that is used to forbid microprocessor control bus control module, be used for outside ATE (automatic test equipment) carries out the address bus circuit of external control and is used for outside ATE (automatic test equipment) is carried out external control to the data bus data bus circuit address bus
Described inhibit circuit, address bus circuit and data bus circuit are parallel between microprocessor and the outside ATE (automatic test equipment),
Described inhibit circuit comprises and is series at the signal driver and the reset circuit of connecting between outside ATE (automatic test equipment) and the microprocessor, the other end of described reset circuit is connected with outside ATE (automatic test equipment), and the other end of described signal driver is connected with microprocessor;
Described address bus circuit comprises that first bidirectional buffering of the series connection that is series between outside ATE (automatic test equipment) and the microprocessor drives and latch,
Described data bus circuit comprises second bidirectional buffer that is connected between ATE (automatic test equipment) and the microprocessor, and described reset circuit comprises or logic;
2] outside ATE (automatic test equipment) sending function shielded signal isolates the control of microprocessor to bus control module for bus inhibition request circuit:
Outside ATE (automatic test equipment) sends the reset signal of HOLD request signal and reset circuit transmission and isolates the control of microprocessor to bus control module by signal driver;
3] outside ATE (automatic test equipment) sending function input signal is given bus inhibition request circuit, isolates microprocessor by bus inhibition request circuit and takes over bus control module, and bus control module is carried out outside test automatically:
Outside ATE (automatic test equipment) comes control microprocessor to take over bus control module by first bidirectional buffer and the latch of second bidirectional buffer and series connection.
Above method concrete steps are:
1] set up isolation control circuit in this circuit board, described isolation control circuit is discrete magnitude buffer circuit, discrete magnitude input circuit and discrete magnitude output circuit,
Described buffer circuit, discrete magnitude input circuit and discrete magnitude output circuit are parallel between outside ATE (automatic test equipment) and the microprocessor,
Described discrete magnitude buffer circuit comprises and is series at the signal driver and the reset circuit of connecting between outside ATE (automatic test equipment) and the microprocessor, the other end of described reset circuit is connected with outside ATE (automatic test equipment), and the other end of described signal driver is connected with microprocessor;
Described discrete magnitude input circuit comprises first modulate circuit, one-way damper and the 6th bidirectional buffer of the series connection that is connected between outside ATE (automatic test equipment) and the microprocessor,
Described discrete magnitude output circuit comprises the 6th bidirectional buffer, discrete magnitude input latch and second modulate circuit of the series connection that is connected between outside ATE (automatic test equipment) and the microprocessor,
2] outside ATE (automatic test equipment) sending function shielded signal isolates the control of microprocessor to the discrete magnitude control module for the discrete magnitude buffer circuit;
Outside ATE (automatic test equipment) sends the HOLD request signal to isolating the control of microprocessor to the discrete magnitude control module with the reset signal of reset circuit transmission by signal driver;
3] outside ATE (automatic test equipment) sending function input signal is given discrete magnitude input circuit and discrete magnitude output circuit, isolate microprocessor by discrete magnitude input circuit and discrete magnitude output circuit and take over the discrete magnitude control module, and the discrete magnitude control module is carried out outside test automatically:
Outside ATE (automatic test equipment) sends the discrete magnitude input signal to first modulate circuit, after pass through the input of one-way damper and the 6th bidirectional buffer control microprocessor discrete magnitude successively; Outside ATE (automatic test equipment) sends 16 system data buss to the 6th bidirectional buffer, after through the discrete magnitude input latch and second modulate circuit discrete magnitude is outputed signal to outside ATE (automatic test equipment) successively.
The advantage that the utility model had:
The utility model is by being provided with isolation control circuit in the circuit board of being tested, outside ATE (automatic test equipment) ATE sending function shielded signal is isolated the control of microprocessor to functional module to isolation control circuit, outside ATE (automatic test equipment) sending function input signal is given isolation control circuit, isolate microprocessor by isolation control circuit and take over functional module, and functional module is carried out outside test automatically.Support that outside ATE (automatic test equipment) can very accurate test be which functional module breaks down actually.
Description of drawings
Fig. 1 is the clocking scheme of the utility model isolation control circuit;
Fig. 2 is the inhibit circuit figure of the utility model isolation control circuit;
Fig. 3 is the utility model bus inhibition request circuit;
Fig. 4 is discrete magnitude buffer circuit figure for the utility model;
Fig. 5 is discrete magnitude input and an output circuit in the discrete magnitude buffer circuit.
Embodiment
A kind of circuit board of supporting outside ATE (automatic test equipment), the functional module group that comprises microprocessor and be connected with microprocessor, each functional module is parallel to microprocessor in the described functional module group, it also comprises and is used to isolate microprocessor to each functional module control, a plurality of isolation control circuits that outside ATE (automatic test equipment) can be controlled each functional module of microprocessor, described isolation control circuit is arranged between microprocessor and the outside ATE (automatic test equipment), and described isolation control circuit is arranged in the corresponding functional modules.
As shown in Figure 1, the functional module group comprises clock module, and isolation control circuit comprises clock circuit, and clock circuit is arranged in the clock module, and clock circuit comprises first Sheffer stroke gate and second Sheffer stroke gate that is arranged between outside ATE (automatic test equipment) and the microprocessor; Two input ends of first Sheffer stroke gate connect the output of inner crystal oscillator and the clock shielded signal of outside ATE (automatic test equipment) respectively, one of them input end of its output termination second Sheffer stroke gate, the external clock input signal of the outside ATE (automatic test equipment) of another input termination of described second Sheffer stroke gate is used the clock signal pin in the plate of the output termination microprocessor of second Sheffer stroke gate.
The said external ATE (automatic test equipment) sends the clock shielded signal for first Sheffer stroke gate, first Sheffer stroke gate is isolated the signal of inner crystal oscillator in the time clock feature module, and the external clock input signal that the second Sheffer stroke gate transmit outer ATE (automatic test equipment) is sent is got to microprocessor and finished control.
As shown in Figure 3, the functional module group comprises that the bus control module isolation control circuit comprises the bus inhibition request circuit that is arranged between outside ATE (automatic test equipment) and the microprocessor, and bus inhibition request circuit is arranged in the bus control module,
Bus inhibition request circuit comprises the inhibit circuit that is used to forbid microprocessor control bus control module, be used for outside ATE (automatic test equipment) carries out the address bus circuit of external control and is used for outside ATE (automatic test equipment) is carried out external control to the data bus data bus circuit address bus
Inhibit circuit, address bus circuit and data bus circuit are arranged between microprocessor and the outside ATE (automatic test equipment) and are parallel with one another;
Inhibit circuit comprises and being arranged between outside ATE (automatic test equipment) and the microprocessor and the signal driver and the reset circuit of series connection mutually that the other end of reset circuit is connected with outside ATE (automatic test equipment), and the other end of signal driver is connected with microprocessor;
The address bus circuit comprises and being arranged between outside ATE (automatic test equipment) and the microprocessor and first bidirectional buffering of series connection drives and latch, the other end of first bidirectional buffer links to each other with outside ATE (automatic test equipment), and the other end of latch links to each other with microprocessor;
Data bus circuit comprises second bidirectional buffer that is connected between ATE (automatic test equipment) and the microprocessor, and an end of described second bidirectional buffer links to each other with outside ATE (automatic test equipment), and the other end of second bidirectional buffer links to each other with microprocessor;
As shown in Figure 2, wherein reset circuit comprises or logic, or logic one end connects outside ATE (automatic test equipment), and is standby in the other end output signal plate.Or the reset signal of the outside ATE (automatic test equipment) transmission of logical delivery, process or logic, stay plate to use part signal, promptly can be used in the bus inhibition request circuit isolation of microprocessor be can be used for the isolation signals of isolation control circuit in the discrete magnitude control module again.
As Fig. 4, shown in Figure 5, the functional module group comprises the discrete magnitude control module, isolation control circuit comprises discrete magnitude buffer circuit, discrete magnitude input circuit and discrete magnitude output circuit, and discrete magnitude buffer circuit, discrete magnitude input circuit and discrete magnitude output circuit are arranged in the discrete magnitude control module
Discrete magnitude buffer circuit, discrete magnitude input circuit and discrete magnitude output are arranged between outside ATE (automatic test equipment) and the microprocessor and are parallel with one another,
The discrete magnitude buffer circuit comprises and being arranged between outside ATE (automatic test equipment) and the microprocessor and the signal driver and the reset circuit of series connection mutually, the other end of reset circuit is connected with outside ATE (automatic test equipment), and the other end of signal driver is connected with microprocessor;
The discrete magnitude input circuit comprises first modulate circuit, one-way damper and the 6th bidirectional buffer that is arranged between outside ATE (automatic test equipment) and the microprocessor, first modulate circuit and one-way damper series connection, the other end of described first modulate circuit links to each other with outside ATE (automatic test equipment), and the other end of one-way damper is connected with microprocessor by 16 peripheral data buses and the 5th bidirectional buffer; The discrete magnitude output circuit comprises the 6th bidirectional buffer, discrete magnitude input latch and second modulate circuit that is arranged between outside ATE (automatic test equipment) and the microprocessor, the discrete magnitude input latch is connected with second modulate circuit, the other end of described discrete magnitude input latch is connected with microprocessor by 16 peripheral data buses and the 5th bidirectional buffer, and the other end of second modulate circuit links to each other with outside ATE (automatic test equipment); One end of the 6th bidirectional buffer links to each other with outside ATE (automatic test equipment) by the sixteen-bit system data bus, and its other end is connected with microprocessor by 16 peripheral data buses and the 5th bidirectional buffer.
The method of the outside foregoing circuit of control automatically plate, it may further comprise the steps:
1] set up isolation control circuit in this circuit board, described isolation control circuit one end is connected with outside automatic equipment, and the other end is connected with microprocessor, and described isolation control circuit is used for isolating the control of microprocessor to each functional module of functional module group;
2] outside ATE (automatic test equipment) sending function shielded signal is isolated the control of microprocessor to functional module to isolation control circuit;
3] outside ATE (automatic test equipment) sending function input signal is given isolation control circuit, isolates microprocessor by isolation control circuit and takes over functional module, and functional module is carried out outside test automatically.
The method of above-mentioned outside automatic control circuit board, concrete steps are:
1] set up isolation control circuit in this circuit board, described isolation control circuit is a clock circuit, and described clock circuit comprises first Sheffer stroke gate and second Sheffer stroke gate that is parallel between outside ATE (automatic test equipment) and the microprocessor:
2] outside ATE (automatic test equipment) tranmitting data register shielded signal is given first Sheffer stroke gate, and the shielding microprocessor is to the control of inner crystal oscillator in the clock module;
3] outside ATE (automatic test equipment) sends the control that the external clock input signal is taken over clock module to the second Sheffer stroke gate control microprocessor, isolates microprocessor by clock circuit and controls clock module.
The method of above-mentioned outside automatic control circuit board, concrete steps are:
1] in this circuit board, sets up isolation control circuit, described isolation control circuit is a bus inhibition request circuit, described bus inhibition request circuit comprises the inhibit circuit that is used to forbid microprocessor control bus control module, be used for outside ATE (automatic test equipment) carries out the address bus circuit of external control and is used for outside ATE (automatic test equipment) is carried out external control to the data bus data bus circuit address bus
Described inhibit circuit, address bus circuit and data bus circuit are parallel between microprocessor and the outside ATE (automatic test equipment),
Described inhibit circuit comprises and is series between outside ATE (automatic test equipment) and the microprocessor signal driver in parallel and the other end of the described reset circuit of reset circuit is connected with outside ATE (automatic test equipment) that the other end of described signal driver is connected with microprocessor;
Described address bus circuit comprises that first bidirectional buffering of the series connection that is series between outside ATE (automatic test equipment) and the microprocessor drives and latch,
Described data bus circuit comprises second bidirectional buffer that is connected between ATE (automatic test equipment) and the microprocessor, and described reset circuit comprises or logic;
2] outside ATE (automatic test equipment) sending function shielded signal isolates the control of microprocessor to bus control module for bus inhibition request circuit:
Outside ATE (automatic test equipment) sends the reset signal of HOLD request signal and reset circuit transmission and isolates the control of microprocessor to bus control module by signal driver;
3] outside ATE (automatic test equipment) sending function input signal is given bus inhibition request circuit, isolates microprocessor by bus inhibition request circuit and takes over bus control module, and bus control module is carried out outside test automatically:
Outside ATE (automatic test equipment) comes control microprocessor to take over bus control module by first bidirectional buffer and the latch of second bidirectional buffer and series connection.
The method of said external automatic control circuit board, concrete steps are:
1] set up isolation control circuit in this circuit board, described isolation control circuit is discrete magnitude buffer circuit, discrete magnitude input circuit and discrete magnitude output circuit,
Described buffer circuit, discrete magnitude input circuit and discrete magnitude output circuit are parallel between outside ATE (automatic test equipment) and the microprocessor,
The discrete magnitude buffer circuit comprises signal driver and the reset circuit that is series at parallel connection between outside ATE (automatic test equipment) and the microprocessor, the other end of described reset circuit is connected with outside ATE (automatic test equipment), and the other end of described signal driver is connected with microprocessor;
The discrete magnitude input circuit comprises first modulate circuit, one-way damper and the 6th bidirectional buffer of the series connection that is connected between outside ATE (automatic test equipment) and the microprocessor,
The discrete magnitude output circuit comprises the 6th bidirectional buffer, discrete magnitude input latch and second modulate circuit of the series connection that is connected between outside ATE (automatic test equipment) and the microprocessor,
2] outside ATE (automatic test equipment) sending function shielded signal isolates the control of microprocessor to the discrete magnitude control module for the discrete magnitude buffer circuit;
Outside ATE (automatic test equipment) sends the HOLD request signal to isolating the control of microprocessor to the discrete magnitude control module with the reset signal of reset circuit transmission by signal driver;
3] outside ATE (automatic test equipment) sending function input signal is given discrete magnitude input circuit and discrete magnitude output circuit, isolate microprocessor by discrete magnitude input circuit and discrete magnitude output circuit and take over the discrete magnitude control module, and the discrete magnitude control module is carried out outside test automatically:
Outside ATE (automatic test equipment) sends the discrete magnitude input signal to first modulate circuit, after pass through the input of one-way damper and the 6th bidirectional buffer control microprocessor discrete magnitude successively;
Outside ATE (automatic test equipment) sends 16 system data buss to the 6th bidirectional buffer, after through the discrete magnitude input latch and second modulate circuit discrete magnitude is outputed signal to outside ATE (automatic test equipment) successively.
Clock circuit
When external controllable is supported in the clock source in the module board, should support outside clock input.Implementation method such as Fig. 1.When testing, testing apparatus is exported the inner crystal oscillator of shielding Signal Spacing, module is moved required clock signal switch to outside input realization, and module internal clock source is isolated.
Reset circuit
Reset signal is used for each functional circuit in the initialization module plate.
The reset signal of central processing module has three kinds:
A. electrification reset is resetting that module produces during by normal power-up.
B. controlled the resetting of outside discrete magnitude comes from a discrete magnitude input port, and reality is provided by comprehensive exploitation equipment.
C. software reset is as a discrete delivery outlet address, by carrying out resetting that the write address instruction produces.For the test reset circuit, three above class reset signals should have controllability.The software reset is produced by program implementation, and controlled the resetting of outside discrete magnitude is the reset signal of outside discrete magnitude input, and they have had controllability.Electrification reset is the reset signal that produces when powering up, in order to test this signal flexibly, and should be with the control signal wire end tab outer (as Fig. 2) of electrification reset.Producing under the controllable situation of reset signal, also should reset circuit produce for using to such an extent that RESET (reset signal) draws outside the module board separately in the plate, so that generation that can be from external monitoring to this signal.
Bus is forbidden
Under the ATE test case, forbid the control of microprocessor to the plate internal bus, microprocessor at this moment is working procedure not.Microprocessor self has bus inhibition request signal HOLD, and HOLD signal and reset signal can make microprocessor discharge bus control right.The ATE test is to finish under the control of ATE (automatic test equipment), and ATE (automatic test equipment) fully can be by the control of HOLD signal and reset signal being taken over the bus control right in the module board, to finish the test to functional circuit in the module.Therefore the HOLD signal wire is led to outside the module board.Bus inhibition request circuit as shown in Figure 3.
The Testability Design of bus is to support the core of ATE test.
ROM (read-only memory) in the module, random access storage device, discrete magnitude IO interface etc. all are to be connected with bus, when testing, ATE is in illegal state by outside HOLD request and reset enable signal microprocessor, discharge the control of bus, how to allow outside ATE (automatic test equipment) can detect them, depend on bus-structured design fully.
For supporting the isolation test, bus should satisfy following requirement:
A. ATE (automatic test equipment) can be carried out exchanges data with module inner core sheet by data bus.
B. ATE (automatic test equipment) can be by different address space in the address bus access modules.
C. ATE (automatic test equipment) can be come the operation of chip in the control module by control bus.
Address bus is designed to the two-stage isolation buffer way of output.Address bus structure as shown in Figure 4.First-level buffer realizes by latch, and reset signal is as the enable signal of latch, the latching of address valid signal control address signal.Level 2 buffering is designed to bidirectional buffering and drives.When ATE tested, ATE (automatic test equipment) can send address signal outside module, was used for each functional block of testing inner.
Structure such as Fig. 5 of data bus in the module.
The 32-bit microprocessor data bus is divided into the data bus of 3 isolation for using with system in the module in the module.8 I/O data bus is used for the same programmable timer of microprocessor, programmable interrupt controller is carried out exchanges data; 16 peripheral data bus is used for discrete magnitude input/output port and the serial ports controller in the module, and its process bidirectional buffer of while exports module-external to and is used for carrying out data transmission with other module; 32 memory data bus is used for the read-only and random access storage device in the access modules.
Support to test:
A. by controlling the direction of impact damper between sixteen-bit system data bus and the peripheral data bus, the data-signal that ATE (automatic test equipment) can be sent here is delivered to the discrete magnitude delivery outlet as pumping signal, ATE (automatic test equipment) also can read the data of discrete magnitude input port from system data bus, to reach the purpose of test.
B.32 position internal storage data bus, it has directly been guided to the module board socket.When ATE tests, output enable invalidating signal by the bidirectional buffer between control 32-bit microprocessor data bus and internal storage data bus, cause output ternary, thereby external test facility is taken over the internal storage data bus, by this bus directly with the memory transactions data in the module.
In order to support ATE test, from module outside, introduce extra control signal, to satisfy ATE test outside controlled to each functional circuit in the module down.Comprise control to the enabling of data bidirectional buffer and address bidirectional buffer, direction end; To the storer Enable Pin, the control of read-write control end; To control of discrete magnitude output latch register controlled end etc.
Output to the outer system control signal of module and adopt unidirectional buffer compartment from output, the Enable Pin of one-way damper adopts systematic reset signal to control.When whole module was in reset mode, the output of this one-way damper was high-impedance state.Because the system reset state in the module can be by external control,, make the output of system control signal in the module also just equally by external controllable system so adopt reset signal as enabling.
The discrete magnitude imput output circuit
The design of this partial circuit testability depends primarily on bus-structured design, its structure such as Fig. 5.
The one-way damper that discrete magnitude signal input stimulus is enabled transfers to module inner peripheral data bus, and external test facility is by sixteen-bit system data bus sampling proof scheme.The output of discrete magnitude signal, data on the latch data bus, the digital quantity after latching is exported after treatment.Can directly be sampled proof scheme.
Claims (5)
1. circuit board of supporting outside ATE (automatic test equipment), the functional module group that comprises microprocessor and be connected with microprocessor, each functional module links to each other with microprocessor respectively in the described functional module group, it is characterized in that: it comprises that also being used to isolate microprocessor controls each functional module, a plurality of isolation control circuits that outside ATE (automatic test equipment) can be controlled each functional module of functional module group, described each isolation control circuit is arranged between microprocessor and the outside ATE (automatic test equipment), and described each isolation control circuit is separately positioned in the corresponding functional modules.
2. the circuit board of the outside ATE (automatic test equipment) of support according to claim 1, it is characterized in that: described functional module group comprises clock module, described isolation control circuit comprises clock circuit, described clock circuit is arranged in the clock module, and described clock circuit comprises first Sheffer stroke gate and second Sheffer stroke gate; Two input ends of described first Sheffer stroke gate connect the output of inner crystal oscillator and the clock shielded signal of outside ATE (automatic test equipment) respectively, one of them input end of its output termination second Sheffer stroke gate, the external clock input signal of the outside ATE (automatic test equipment) of another input termination of described second Sheffer stroke gate is used the clock signal pin in the plate of the output termination microprocessor of described second Sheffer stroke gate.
3. the circuit board of the outside ATE (automatic test equipment) of support according to claim 1 and 2 is characterized in that: described functional module group comprises bus control module, and described bus inhibition request circuit is arranged in the bus control module,
Described bus inhibition request circuit comprises the inhibit circuit that is used to forbid microprocessor control bus control module, be used for outside ATE (automatic test equipment) carries out the address bus circuit of external control and is used for outside ATE (automatic test equipment) is carried out external control to the data bus data bus circuit address bus
Described inhibit circuit, address bus circuit and data bus circuit are arranged between microprocessor and the outside ATE (automatic test equipment) and are parallel with one another;
Described inhibit circuit comprises the signal driver and the reset circuit of series connection, described reset circuit comprises or logic, described or logic one end connects outside ATE (automatic test equipment), and the other end connects signal driver, and the other end of described signal driver is connected with microprocessor;
Described address bus circuit comprises first bidirectional buffer and the latch of series connection, and the other end of described first bidirectional buffer links to each other with outside ATE (automatic test equipment), and the other end of described latch links to each other with microprocessor;
Described data bus circuit comprises second bidirectional buffer, and an end of described second bidirectional buffer links to each other with outside ATE (automatic test equipment), and the other end of described second bidirectional buffer links to each other with microprocessor.
4. the circuit board of the outside ATE (automatic test equipment) of support according to claim 3, it is characterized in that: described functional module group comprises the discrete magnitude control module, described isolation control circuit comprises discrete magnitude buffer circuit, discrete magnitude input circuit and discrete magnitude output circuit, described discrete magnitude buffer circuit, discrete magnitude input circuit and discrete magnitude output circuit are arranged in the discrete magnitude control module
Described discrete magnitude buffer circuit comprises the signal driver and the reset circuit of series connection, described reset circuit comprises or logic, described or logic one end connects outside ATE (automatic test equipment), and the other end connects signal driver, and the other end of described signal driver is connected with microprocessor;
Described discrete magnitude input circuit comprises first modulate circuit, one-way damper and the 6th bidirectional buffer, described first modulate circuit and one-way damper series connection, the other end of described first modulate circuit links to each other with outside ATE (automatic test equipment), and the other end of described one-way damper is connected with microprocessor by 16 peripheral data buses and the 5th bidirectional buffer; Described discrete magnitude output circuit comprises the 6th bidirectional buffer, discrete magnitude input latch and second modulate circuit, described discrete magnitude input latch is connected with second modulate circuit, the other end of described discrete magnitude input latch is connected with microprocessor by 16 peripheral data buses and the 5th bidirectional buffer, and the other end of described second modulate circuit links to each other with outside ATE (automatic test equipment); One end of described the 6th bidirectional buffer links to each other with outside ATE (automatic test equipment) by the sixteen-bit system data bus, and its other end is connected with microprocessor by 16 peripheral data buses and the 5th bidirectional buffer.
5. the circuit board of the outside ATE (automatic test equipment) of support according to claim 1 and 2, it is characterized in that: described functional module group comprises the discrete magnitude control module, described isolation control circuit comprises discrete magnitude buffer circuit, discrete magnitude input circuit and discrete magnitude output circuit, described discrete magnitude buffer circuit, discrete magnitude input circuit and discrete magnitude output circuit are arranged in the discrete magnitude control module
Described discrete magnitude buffer circuit comprises the signal driver and the reset circuit of series connection, described reset circuit comprises or logic, described or logic one end connects outside ATE (automatic test equipment), and the other end connects signal driver, and the other end of described signal driver is connected with microprocessor;
Described discrete magnitude input circuit comprises first modulate circuit, one-way damper and the 6th bidirectional buffer, described first modulate circuit and one-way damper series connection, the other end of described first modulate circuit links to each other with outside ATE (automatic test equipment), and the other end of described one-way damper is connected with microprocessor by 16 peripheral data buses and the 5th bidirectional buffer; Described discrete magnitude output circuit comprises the 6th bidirectional buffer, discrete magnitude input latch and second modulate circuit, described discrete magnitude input latch is connected with second modulate circuit, the other end of described discrete magnitude input latch is connected with microprocessor by 16 peripheral data buses and the 5th bidirectional buffer, and the other end of described second modulate circuit links to each other with outside ATE (automatic test equipment); One end of described the 6th bidirectional buffer links to each other with outside ATE (automatic test equipment) by the sixteen-bit system data bus, and its other end is connected with microprocessor by 16 peripheral data buses and the 5th bidirectional buffer.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010206819447U CN201903876U (en) | 2010-12-27 | 2010-12-27 | Circuit board supporting automatic external test equipment |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010206819447U CN201903876U (en) | 2010-12-27 | 2010-12-27 | Circuit board supporting automatic external test equipment |
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| CN201903876U true CN201903876U (en) | 2011-07-20 |
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| CN2010206819447U Expired - Lifetime CN201903876U (en) | 2010-12-27 | 2010-12-27 | Circuit board supporting automatic external test equipment |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102043695A (en) * | 2010-12-27 | 2011-05-04 | 中国航空工业集团公司第六三一研究所 | Printed circuit board (PCB) supporting external automatic test equipment (ATE) and method for externally controlling same |
| CN109143959A (en) * | 2018-09-11 | 2019-01-04 | 陕西千山航空电子有限责任公司 | A kind of highly reliable anti-interference discrete magnitude output control circuit |
-
2010
- 2010-12-27 CN CN2010206819447U patent/CN201903876U/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102043695A (en) * | 2010-12-27 | 2011-05-04 | 中国航空工业集团公司第六三一研究所 | Printed circuit board (PCB) supporting external automatic test equipment (ATE) and method for externally controlling same |
| CN109143959A (en) * | 2018-09-11 | 2019-01-04 | 陕西千山航空电子有限责任公司 | A kind of highly reliable anti-interference discrete magnitude output control circuit |
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