CN201788460U - Reset circuit - Google Patents

Abstract

The utility model relates to a reset circuit. A primary power supply is additionally arranged between a WDT (watch dog timer) and a CPU (central processing unit) to control a triode, namely a PNP (plug-and-play) pipe, the power supply of the CPU is controlled by input signals of the PNP pipe. The reset circuit can be widely applied in microprocessor systems such as various single chip microcomputers, ARM, DSP (digital signal processor) and the like. The power failure reset to the CPU can be ensured under the situation that software running of the CPU is out of control, so as to enable the program to operate again and recover the work of the system without the manual intervention.

Description

A kind of reset circuit

Technical field:

The utility model relates to a kind of reset circuit.

Background technology:

Watchdog circuit (WDT) is the chip that produces reset signal in CPU running software situation out of control.WDT comprises one 14 digit counter and the WatchDog Timer SFR (WDTRST) that resets.After WDT enabled, machine cycle of every mistake added 1 under the situation of oscillator operation.When WDT overflowed, it can produce a reset pulse at the RST pin.

WDT is the part of the widely used Anti-interference Design of present field of microprocessors.

Classical at present reset circuit is that the reseting controling signal of WDT directly links to each other with the reset pin of CPU, as shown in Figure 2.The shortcoming of present classical reset circuit is:

1, under certain strong interference affects, CPU inside has the component register content unusual, sends reset signal only for the RESET pin of CPU, make program roll back, but unusual register can cause program run to make mistakes, and does not reach the effect of normal operation.

2, can not reliably make cpu reset for the RESET pin transmission reset signal of CPU.

The utility model content:

The utility model proposes a kind of reset circuit, adding level power supply control triode between WDT and CPU is the PNP pipe, controls the power supply of CPU by described PNP pipe base input signal.

Utilize the power supply of the reset signal control CPU of watchdog circuit, single-chip microcomputer is thoroughly resetted.

CPU regularly gives watchdog circuit " hello dog " pulse, in case the CPU program fleet can not normally send " feeding dog " pulse, the watchdog circuit timing counter overflows, and sends reset signal.Play effect to the CPU program monitoring.

The reset circuit that the utility model proposes, but in widespread use and various single-chip microcomputer, the microprocessor systems such as ARM, DSP.Guarantee to take place under the running software situation out of control CPU to be carried out power-off reset at CPU, make program roll back under the situation that does not need manual intervention, system works is recovered.

Description of drawings:

Fig. 1: resetting system circuit structure diagram;

Fig. 2: typical reset circuit is used.

Embodiment:

As Fig. 1 the utility model resetting system circuit structure diagram.

A kind of reset circuit, be applied in the Single Chip Microcomputer (SCM) system after, between WDT and CPU, add level power supply control triode (PNP pipe), manage base input signal (reset pulse) by PNP, control the power supply of CPU.When WDT overflowed situation, the RST reset pulse of generation will produce power supply power-fail to CPU and reset by the control of PNP pipe.That is, when the base stage of the reset pulse of WDT input PNP pipe, the PNP pipe cuts off the power supply VCC of CPU, keeps certain reset time after, power on to CPU again, reach the purpose of reliable reset, the normal operation of assurance Single Chip Microcomputer (SCM) system.

Claims (1)

1. a reset circuit is characterized in that, adding level power supply control triode between WDT and CPU is the PNP pipe, controls the power supply of CPU by described PNP pipe base input signal.

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