CN201593076U - Wafer rack - Google Patents
Wafer rack Download PDFInfo
- Publication number
- CN201593076U CN201593076U CN2009203161705U CN200920316170U CN201593076U CN 201593076 U CN201593076 U CN 201593076U CN 2009203161705 U CN2009203161705 U CN 2009203161705U CN 200920316170 U CN200920316170 U CN 200920316170U CN 201593076 U CN201593076 U CN 201593076U
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- wafer
- rack
- wafer rack
- utility
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Abstract
The utility model relates to a wafer rack, particularly to an annular rack. A protruding rack head (2) is arranged on the upper outer side of the annular rack, a groove (3) is formed on the lower outer side of the annular rack, and a slope (1) is formed on the inner side of the annular rack between the upper end and the lower end of the annular rack. Compared with the traditional wafer rack, the wafer rack provided by the utility model is in circumference contact with wafers, thereby avoiding the defect of wafer dislocation due to point contact of the wafer rack and the wafers, ensuring the production quality of the wafers, improving the finished product ratio of the wafers, and reducing the manufacturing cost of the wafers.
Description
Technical field
The utility model has related to a kind of wafer rack, has particularly related to a kind of wafer rack that is used for annealing semiconductor wafer.
Background technology
In existing wafer manufacture, wafer normally flatly is placed in the annealing furnace and anneals, and wafer is supported on the wafer rack by two points.Like this, because a wafer is positioned on the different heights of annealing furnace, and annealing furnace has different temperature at various height, so the horizontal positioned of wafer makes a wafer be positioned at the differing temps zone of annealing furnace, causes the annealing of wafer inhomogeneous.In addition,, can make wafer the position skew occur, abbreviate " dislocation " as, have a strong impact on the quality of production of wafer, increase the production cost of wafer at point of suppon by 2 supporting wafers.
The utility model content
Goal of the invention of the present utility model is to solve the point of suppon that has anneal in the wafer production processes inhomogeneous and wafer now and produces the problem of " dislocation ", and a kind of wafer rack is provided.
In order to finish the technical solution of the utility model, the utility model by the following technical solutions:
A kind of wafer rack of the present utility model, wherein: it is a toroidal frame, in the outside, upper end of toroidal frame the one frame head that protrudes is arranged, and in the outside, lower end of toroidal frame one groove is arranged, there is a slope toroidal frame inboard between the toroidal frame top and bottom;
A kind of wafer rack of the present utility model, wherein: the height of described head is more than or equal to the degree of depth of groove;
A kind of wafer rack of the present utility model, wherein: the circumferential width of described head is less than the circumferential width of groove;
A kind of wafer rack of the present utility model, wherein: described slope is to the inboard inclination 25-850 of wafer rack angle;
A kind of wafer rack of the present utility model, wherein: the profile of described toroidal frame is circular;
A kind of wafer rack of the present utility model, wherein: the profile of described toroidal frame is a rectangle;
A kind of wafer rack of the present utility model, wherein: described wafer rack is made by the material of quartz or graphite.
Wafer rack of the present utility model is compared with existing wafer rack, wafer rack of the present utility model is that circumference contacts with wafer, therefore avoided existing wafer rack to contact the defective of caused wafer dislocation with the point of wafer, guaranteed the quality of production of wafer, improve the yield rate of wafer, reduced the production cost of wafer.
Description of drawings
Fig. 1 is the forward diagrammatic cross-section of the utility model wafer rack;
Fig. 2 is the vertical view of a kind of profile of the utility model wafer rack;
Fig. 3 is the vertical view of the another kind of profile of the utility model wafer rack;
Fig. 4 is the forward diagrammatic cross-section after wafer and the wafer rack assembling.
Among Fig. 1 to Fig. 4, label 1 is the slope, and label 2 is the frame head, and label 3 is a groove, and label 4 is a wafer.
Embodiment
As shown in Figure 1, wafer rack of the present utility model is a toroidal frame, as shown in Figure 2 circular of the profile of toroidal frame or be as shown in Figure 3 rectangle, and wafer rack is made by the material of quartz or graphite.There is a frame head 2 that protrudes in the outside, upper end at toroidal frame, and in the outside, lower end of toroidal frame one groove 3 is arranged, and the height of frame head 2 is more than or equal to the degree of depth of groove 3, and the circumferential width of frame head 2 is less than the circumferential width of groove 3.There is a slope 1 to the inboard inclination 25-850 of wafer rack angle toroidal frame inboard between the toroidal frame top and bottom.
In use, as shown in Figure 4, wafer 4 is lain in a horizontal plane on the slope of wafer rack, each wafer rack is only placed a wafer, frame head 2 alignment with a wafer rack are placed in the groove 3 of another wafer rack then, and like this, wafer rack just as shown in Figure 4, pile up together, the wafer rack that will pile up then together is placed on the vertical annealing that can finish wafer in the annealing furnace.Fig. 4 only schematically piles up three wafer rack together, in practice, any a plurality of wafer rack can be piled up together.
Above embodiment is not the qualification to utility model just to explanation of the present utility model, and the utility model institute restricted portion is referring to claim, and under the situation of spirit of the present utility model, the utility model can be done any type of modification.
Claims (7)
1. wafer rack, it is characterized in that: it is a toroidal frame, in the outside, upper end of toroidal frame the one frame head (2) that protrudes is arranged, and in the outside, lower end of toroidal frame one groove (3) is arranged, there is a slope (1) the toroidal frame inboard between the toroidal frame top and bottom.
2. wafer rack as claimed in claim 1 is characterized in that: the height of described head (2) is more than or equal to the degree of depth of groove (3);
3. wafer rack as claimed in claim 2 is characterized in that: the circumferential width of described head (2) is less than the circumferential width of groove (3).
4. wafer rack as claimed in claim 3 is characterized in that: described slope (1) is to 25-85 ° of angle of the inboard inclination of wafer rack.
5. wafer rack as claimed in claim 4 is characterized in that: the profile of described toroidal frame is for circular.
6. wafer rack as claimed in claim 4 is characterized in that: the profile of described toroidal frame is a rectangle.
7. as the described wafer rack of any claim of claim 1 to 6, it is characterized in that: described wafer rack is made by the material of quartz or graphite.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2009203161705U CN201593076U (en) | 2009-11-30 | 2009-11-30 | Wafer rack |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2009203161705U CN201593076U (en) | 2009-11-30 | 2009-11-30 | Wafer rack |
Publications (1)
Publication Number | Publication Date |
---|---|
CN201593076U true CN201593076U (en) | 2010-09-29 |
Family
ID=42775142
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2009203161705U Expired - Fee Related CN201593076U (en) | 2009-11-30 | 2009-11-30 | Wafer rack |
Country Status (1)
Country | Link |
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CN (1) | CN201593076U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103805950A (en) * | 2012-11-02 | 2014-05-21 | 矽品精密工业股份有限公司 | Clamp for sputtering process and method for sputtering semiconductor package |
-
2009
- 2009-11-30 CN CN2009203161705U patent/CN201593076U/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103805950A (en) * | 2012-11-02 | 2014-05-21 | 矽品精密工业股份有限公司 | Clamp for sputtering process and method for sputtering semiconductor package |
CN103805950B (en) * | 2012-11-02 | 2017-03-01 | 矽品精密工业股份有限公司 | Clamp for sputtering process and method for sputtering semiconductor package |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CP03 | Change of name, title or address | ||
CP03 | Change of name, title or address |
Address after: 100176 No. 2 South Yongchang Road, Beijing economic and Technological Development Zone Patentee after: Zhongke electric information materials (Beijing) Limited by Share Ltd Address before: 100176 No. 2 South Yongchang Road, Beijing economic and Technological Development Zone Patentee before: Zhongke electric information materials (Beijing) Co., Ltd. |
|
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100929 Termination date: 20181130 |