CN201562956U

CN201562956U - Static protective circuit and integrative circuit

Info

Publication number: CN201562956U
Application number: CN2009202061907U
Authority: CN
Inventors: 白云亮; 徐坤平; 杨云
Original assignee: BYD Co Ltd
Current assignee: BYD Co Ltd
Priority date: 2009-10-29
Filing date: 2009-10-29
Publication date: 2010-08-25
Anticipated expiration: 2019-10-29

Abstract

The utility model provides a static protective circuit and an integrative circuit, wherein the static protective circuit comprises a GGNMOS tube, a first resistance and a conducting circuit module for evenly conducting the GGNMOS tube rapidly when ESD happens; the GGNMOS tube, the first resistance and the conducting circuit module are connected in parallel; both ends of the first resistance are respectively connected with an I/O port and an internal chip; the drain of the GGNMOS tube is connected with the I/O port, and the grid is connected with the output end of the conducting circuit module; the source of the GGNMOS tube and a lining base are connected with the ground; and two input ends of the conducting circuit module are respectively connected with the I/O port and the ground. The integrative circuit comprises the static protective circuit. When the ESD happens, high voltage is added to the I/O port. As the conducting circuit module can enable the GGNMOS tube to evenly conduct rapidly, the total static protective function of the static protective circuit is strengthened.

Description

A kind of electrostatic discharge protective circuit and integrated circuit

Technical field

The utility model relates to integrated circuit and makes the field, relates in particular to a kind of electrostatic discharge protective circuit and integrated circuit.

Background technology

Usually, integrated circuit is easy to be subjected to the destruction of static, generally all can design electrostatic discharge protective circuit and be damaged because of static to prevent internal circuit in input, lead-out terminal or power protection.

GGNMOS (Gate Grounded NMOS, the N type MOS transistor of grounded-grid) is a kind of widely used electrostatic preventing structure.Be illustrated in figure 1 as prior art GGNMOS electrical block diagram; 10 are the GGNMOS pipe; wherein the drain electrode 9 of GGNMOS connects input and output terminal 7 or power supply; grid 8, source electrode 6, substrate 5 ground connection; for guaranteeing certain protection intensity; several GGNMOS are managed 10 parallel connections, be called to refer to GGNMOS in parallel more.

Fig. 2 refers to GGNMOS circuit schematic cross-section in parallel more; Be P trap 27 on the P type substrate 28, on the described P trap 27 resistance substrate 25 is arranged, the one end is connected with the base stage of triode 26, and the other end is connected with P+ diffusion region 21, the emitter and collector of triode 26 connects N+ diffusion region 22 respectively, and an isolation 23 is arranged between P+ diffusion region 21 and the N+ diffusion region 22.When static takes place, because the diverse location transistor can cause the circuit unlatching inhomogeneous to the difference of the volume resistance of P type trap control, at middle GGNMOS device, because it from the control of P type trap farthest, the resistance substrate maximum, the easiest of other GGNMOS devices unlatchings.When this when P type trap control GGNMOS device is farthest opened, other GGNMOS devices are not also opened.

GGNMOS device in the electrostatic discharge protective circuit of prior art can not be opened evenly and rapidly, has reduced the Global Macros ability of electrostatic discharge protective circuit.

The utility model content

The prior art problem that the utility model solves is that the GGNMOS device in the electrostatic discharge protective circuit can not be opened evenly and rapidly.

For solving the problems of the technologies described above, the utility model provides following technical scheme:

A kind of electrostatic discharge protective circuit comprises the turning circuit module that refers to GGNMOS pipe, first resistance in parallel more, is used for evenly quick conducting GGNMOS pipe when ESD takes place; The two ends of described first resistance connect I/O port and inside chip respectively, the drain electrode of described GGNMOS pipe connects the I/O port, its grid connects the output of turning circuit module, the source electrode of GGNMOS pipe is connected with ground with substrate, and two inputs of described turning circuit module connect I/O port and ground respectively.

Further, described turning circuit module also comprises PMOS pipe, NMOS pipe; The grid of described PMOS pipe is connected with power supply with substrate, and its drain electrode is connected with the I/O port, and its source electrode is connected with the grid of GGNMOS pipe; The grid of NMOS pipe connects power supply, and its drain electrode is connected with the grid of GGNMOS pipe, and the source electrode of NMOS pipe is connected with ground with substrate.

Further, described turning circuit module also comprises second resistance, and the two ends of described second resistance are connected with ground with the grid of GGNMOS pipe respectively.

A kind of integrated circuit comprises the electrostatic discharge protective circuit of above any described structure.

Electrostatic discharge protective circuit in a kind of integrated circuit that the utility model provides; when ESD takes place; promptly there is a very high instantaneous voltage to be added to the I/O port; because the turning circuit module can make GGNMOS conducting evenly and rapidly; thereby strengthened the whole electrostatic protection ability of electrostatic discharge protective circuit; make chip reliability higher, the possibility of inefficacy is littler.

Description of drawings

Fig. 1 is a prior art GGNMOS electrical block diagram;

Fig. 2 refers to GGNMOS circuit schematic cross-section in parallel more;

Fig. 3 is the electrostatic discharge protective circuit theory diagram of the utility model one embodiment;

Fig. 4 is the electrostatic discharge protective circuit schematic diagram of another embodiment of the utility model.

Embodiment

Clearer for technical problem, technical scheme and beneficial effect that the utility model is solved, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein only in order to explanation the utility model, and be not used in qualification the utility model.

Fig. 3 is the electrostatic discharge protective circuit theory diagram of the utility model embodiment; A kind of electrostatic discharge protective circuit comprises the turning circuit module 300 that refers to GGNMOS pipe, first resistance R 1 in parallel more, is used for evenly quick conducting GGNMOS pipe when ESD takes place; The two ends of described first resistance R 1 connect I/O port 30 and inside chip 31 respectively, the drain electrode 302 of described GGNMOS pipe connects I/O port 30, its grid 301 connects the output of turning circuit module 300, the source electrode 303 of GGNMOS pipe is connected with ground with substrate 304, and two inputs of described turning circuit module 300 connect I/O port 30 and ground respectively.

When ESD takes place; promptly there is a very high instantaneous voltage to be added to I/O port 30,, thereby strengthened the whole electrostatic protection ability of electrostatic discharge protective circuit because turning circuit module 300 can make GGNMOS conducting evenly and rapidly; make chip reliability higher, the possibility of inefficacy is littler.

Fig. 4 is the electrostatic discharge protective circuit schematic diagram of another embodiment of the utility model, is the further improvement on the basis of Fig. 3, and wherein turning circuit module 300 also comprises PMOS pipe, NMOS pipe, second resistance R 2; The grid 309 of described PMOS pipe is connected with power supply with substrate 312, and its drain electrode 310 is connected with I/O port 30, and its source electrode 311 is connected with the grid 301 of GGNMOS pipe; The grid 305 of NMOS pipe connects power supplys, and its drain electrode 306 is connected with the grid 301 of GGNMOS pipe, and the source electrode 307 of NMOS pipe is connected with ground with substrate 308; The two ends of second resistance R 2 are connected with ground with the grid 301 of GGNMOS pipe respectively.

Concrete operation principle is as follows:

When inside chip 31 normally works on power, because the grid 305 of NMOS pipe is connected with VCC, so the NMOS pipe is a pipe of often opening, it directly moves the grid 301 of GGNMOS pipe to the VSS current potential, and the GGNMOS pipe is turn-offed, and this mode has better resisting interference, when certain interference is arranged, it can make the grid 301 of GGNMOS is electronegative potential all the time, stronger than the clamping ability of resistance, makes the GGNMOS pipe that littler leakage current be arranged.

When ESD takes place; promptly there is a very high instantaneous voltage to be added to the I/O port; because the drain electrode 302 of GGNMOS pipe and the drain electrode 310 of PMOS pipe all are connected with the I/O port; make the drain potential of GGNMOS pipe and PMOS pipe raise rapidly; thereby make the drain electrode 310 of PMOS pipe; substrate 312 and source electrode 311 can form the P-N-P conducting; electric current is injected into the grid 301 of GGNMOS; because the existence of second resistance R 2 and NMOS pipe; and the resistance ratio after second resistance R 2 and the parallel connection of NMOS pipe is bigger; grid 301 current potentials of GGNMOS pipe are raised rapidly; thereby make the conducting of GGNMOS pipe; this pattern makes that the conducting of GGNMOS pipe is faster; more even; thereby strengthened the whole electrostatic protection ability of electrostatic discharge protective circuit, made chip reliability higher, the possibility of inefficacy is littler.

A kind of integrated circuit comprises the electrostatic discharge protective circuit of above any described structure.This integrated circuit equally also has the advantage of above-mentioned electrostatic discharge protective circuit.

The above only is preferred embodiment of the present utility model; not in order to restriction the utility model; all any modifications of within spirit of the present utility model and principle, being done, be equal to and replace and improvement etc., all should be included within the protection range of the present utility model.

Claims

1. electrostatic discharge protective circuit comprises referring to GGNMOS pipe in parallel, it is characterized in that more: also comprise first resistance, be used for the turning circuit module of evenly quick conducting GGNMOS pipe when ESD takes place; The two ends of described first resistance connect I/O port and inside chip respectively, the drain electrode of described GGNMOS pipe connects the I/O port, its grid connects the output of turning circuit module, the source electrode of GGNMOS pipe is connected with ground with substrate, and two inputs of described turning circuit module connect I/O port and ground respectively.

2. electrostatic discharge protective circuit according to claim 1 is characterized in that: described turning circuit module also comprises PMOS pipe, NMOS pipe; The grid of described PMOS pipe is connected with power supply with substrate, and its drain electrode is connected with the I/O port, and its source electrode is connected with the grid of GGNMOS pipe; The grid of NMOS pipe connects power supply, and its drain electrode is connected with the grid of GGNMOS pipe, and the source electrode of NMOS pipe is connected with ground with substrate.

3. electrostatic discharge protective circuit according to claim 2 is characterized in that: described turning circuit module also comprises second resistance, and the two ends of described second resistance are connected with ground with the grid of GGNMOS pipe respectively.

4. integrated circuit is characterized in that: described integrated circuit comprises the electrostatic discharge protective circuit as structure as described in any one of the claim 1 to 3.