CN204651318U

CN204651318U - A kind of new E SD protective circuit

Info

Publication number: CN204651318U
Application number: CN201520219585.6U
Authority: CN
Inventors: 何斯
Original assignee: Individual
Current assignee: Individual
Priority date: 2015-04-11
Filing date: 2015-04-11
Publication date: 2015-09-16
Anticipated expiration: 2025-04-11

Abstract

The utility model relates to protective circuit technical field, especially a kind of new E SD protective circuit.It comprises the first PMOS, the second NMOS tube, the 3rd NMOS tube, the 4th NMOS tube and the 5th NMOS tube; The source electrode of the first PMOS be connected with between grid that the first electric capacity, grid are also connected vdd voltage, the drain electrode of connection second NMOS tube that drains and the grid of the 4th NMOS tube; The grid of the second NMOS tube connects the grid of the first PMOS and the drain electrode of the 3rd NMOS tube, grid, the source ground of drain electrode connection the 4th NMOS tube; The drain electrode of the 3rd NMOS tube and the grid being connected with the first resistance between source electrode, the grid, the grid that are also connected the first PMOS of draining connects the 4th NMOS tube; The drain electrode of the 4th NMOS tube connects the grid of the 5th NMOS tube; The drain electrode of the 5th NMOS tube connects drain electrode, the source ground of the first PMOS.The utility model have employed feedback and dynamic delay structure, can effectively protect the grid of clamping device and can effectively suppress erroneous trigger and power supply noise, having the advantage that cost is low, electrostatic protection effect is good.

Description

A kind of new E SD protective circuit

Technical field

The utility model relates to protective circuit technical field, especially a kind of new E SD protective circuit.

Background technology

Day by day perfect with technology, integrity problem more and more becomes the bottleneck of restriction integrated circuit development, and in numerous failure cause, static discharge (ESD) problem is particularly important, and result shows according to statistics: the ic failure of about 40 more than ﹪ all caused because ESD loses efficacy.

The current research for new ESD circuit structure and improvement are not a lot, ubiquity clamping device let out released static electricity after can not close in time, make electrostatic potential retention time on the grid of clamping device longer, clamping device generation thermoelectricity may be caused to puncture cause not reaching good electrostatic protection effect, maybe focus on device aspect by what work, to use new device to obtain better electrostatic protection effect, but the result done so but improves the cost of circuit.

Utility model content

For above-mentioned the deficiencies in the prior art, the purpose of this utility model is to provide that a kind of cost is low, electrostatic protection effect good, effectively can suppress the new E SD protective circuit of erroneous trigger and power supply noise.

To achieve these goals, the utility model adopts following technical scheme:

A kind of new E SD protective circuit, it comprises the first PMOS, the second NMOS tube, the 3rd NMOS tube, the 4th NMOS tube and the 5th NMOS tube;

The source electrode of described first PMOS be connected with between grid that the first electric capacity, grid are also connected vdd voltage, the grid of the drain drain electrode that connects described second NMOS tube and the 4th NMOS tube;

The grid of described first PMOS of grid connection of described second NMOS tube is connected grid, the source ground of described 4th NMOS tube with the drain electrode of the 3rd NMOS tube, drain electrode;

The drain electrode of described 3rd NMOS tube and the grid being connected with the first resistance between source electrode, the grid, source ground, the grid that are also connected described first PMOS of draining connects described 4th NMOS tube;

The drain electrode of described 4th NMOS tube connects grid, the source ground of described 5th NMOS tube;

The drain electrode of described 5th NMOS tube connects drain electrode and vdd voltage, the source ground of described first PMOS.

Owing to have employed such scheme; the utility model adopts single tube MOS transistor device generation feedback that circuit can be closed in time after electrostatic leakage is complete; effectively can protect the grid of clamping device; effectively can also protect internal circuit; simultaneously owing to have employed dynamic delay circuit; circuit is made can effectively to suppress erroneous trigger and power supply noise; compared with the protective circuit of routine; there is better protected effect; in addition; what circuit adopted is commonplace components, does not use particular device and technique, greatly can save the cost of circuit.

Accompanying drawing explanation

Fig. 1 is the circuit structure diagram of the utility model embodiment.

Embodiment

Below in conjunction with accompanying drawing, embodiment of the present utility model is described in detail, but the multitude of different ways that the utility model can be defined by the claims and cover is implemented.

As shown in Figure 1, a kind of new E SD protective circuit of the present embodiment, it comprises the first PMOS M1, the second NMOS tube M2, the 3rd NMOS tube M3, the 4th NMOS tube M4 and the 5th NMOS tube M5.

The source electrode of the first PMOS M1 be connected with the first electric capacity C1 between grid, grid is also connected vdd voltage, the drain electrode of the connection second NMOS tube M2 that drains and the grid of the 4th NMOS tube M4.

The grid of the second NMOS tube M2 connects the grid of the first PMOS M1 and the drain electrode of the 3rd NMOS tube M3, grid, the source ground of drain electrode connection the 4th NMOS tube M4.

The drain electrode of the 3rd NMOS tube M3 and the grid being connected with the first resistance R1 between source electrode, the grid, source ground, the grid that are also connected the first PMOS M1 of draining connects the 4th NMOS tube M4.

The drain electrode of the 4th NMOS tube M4 connects grid, the source ground of the 5th NMOS tube M5.

The drain electrode of the 5th NMOS tube M5 connects drain electrode and vdd voltage, the source ground of the first PMOS M1.

The circuit of the present embodiment have employed feedback and dynamic delay structure, first PMOS M1 and the second NMOS tube M2 forms an inverter, the RC network that the first resistance R1 adopted in circuit and the first electric capacity C1 is formed is for detecting the change of electrostatic potential, the voltage of A point is transferred to B point by inverter, the 4th NMOS tube M4 is met again at B point, do further time delay, finally be transferred on clamping device i.e. the 5th NMOS tube M5, fallen by electrostatic leakage by the unlatching controlling clamping device, circuit can suppress erroneous trigger and power supply noise effectively.

This circuit and the maximum difference of circuit common are: on RC network testing circuit, added a feedback device i.e. the 3rd NMOS tube M3, it forms a low impedance path at electrostatic potential temporarily, also play the object of leakage current simultaneously, increase the dynamics of releasing of electric current, reduce afterbody master and to release the pressure of path.Owing to have employed feedback operation, electrostatic induced current can be released rapidly by circuit in electrostatic time of origin, in time protective circuit is closed, avoid the clamping device i.e. gate oxide of the 5th NMOS tube M5 to damage, avoid producing misoperation simultaneously.

Particularly; under circuit normal operation; the effect of the first electric capacity C1 makes the current potential of A point be ' 0 '; the effect of the inverter that the first PMOS M1 and the second NMOS tube M2 is formed makes the current potential of B point be ' 1 '; 4th NMOS tube M4 conducting, the current potential of C point reduces to ' 0 ', and clamping device the 5th NMOS tube M5 closes. thus ensure under circuit normal operation; electrostatic discharge protective circuit is closed, and can not affect the normal work of internal circuit.But when electrostatic is interim, because RC time constant is less than the time of electrostatic pulse rising, the voltage follow electrostatic potential of A point becomes ' 1 ', like this, the voltage of B point is just that the ' 0 ', four NMOS tube M4 closes, and therefore the voltage of C point is ' 1 ', afterbody clamping device the 5th NMOS tube M5 opens, and is released by static discharge current.Along with the continuous charging of the first electric capacity C1; the electromotive force of A point reduces gradually; each devices function state starts reversion; feedback device the 3rd NMOS tube is opened in time; the electromotive force of A point reduces to rapidly ' 0 '; the voltage hold-time of afterbody clamping device the 5th NMOS tube M5 gate electrodes can not be long, effectively protects the grid of clamping device.

In addition, what this circuit adopted is commonplace components, does not use particular device and technique, greatly can save the cost of circuit.

The foregoing is only preferred embodiment of the present utility model; not thereby the scope of the claims of the present utility model is limited; every utilize the utility model specification and accompanying drawing content to do equivalent structure or equivalent flow process conversion; or be directly or indirectly used in other relevant technical fields, be all in like manner included in scope of patent protection of the present utility model.

Claims

1. a new E SD protective circuit, is characterized in that: it comprises the first PMOS, the second NMOS tube, the 3rd NMOS tube, the 4th NMOS tube and the 5th NMOS tube;