CN1943029A - Semiconductor device and method for manufacturing same - Google Patents
Semiconductor device and method for manufacturing same Download PDFInfo
- Publication number
- CN1943029A CN1943029A CNA2006800001258A CN200680000125A CN1943029A CN 1943029 A CN1943029 A CN 1943029A CN A2006800001258 A CNA2006800001258 A CN A2006800001258A CN 200680000125 A CN200680000125 A CN 200680000125A CN 1943029 A CN1943029 A CN 1943029A
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- electrically insulating
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Abstract
Disclosed is a semiconductor device wherein a semiconductor chip (501) is mounted on the surface of an electrically insulating substrate (504) having a plurality of metal wires (505) and at least a part of the metal wires (505) are covered with a resin (509). Among the metal wires (505) formed in the electrically insulating substrate (504), at least the surfaces of the metal wires electrically connected with the semiconductor chip (501) are provided with a gold layer (508), and the surfaces of the metal wires in contact with the resin (509) are provided with a roughened portion (507) without being provided with a gold layer. Consequently, the semiconductor device mounted with a semiconductor chip is improved in reliability of electrical connection. Also disclosed is a method for manufacturing such a semiconductor device.
Description
Technical field
The present invention relates to semiconductor device and manufacture method thereof, particularly relate to a kind of semiconductor device and manufacture method thereof of on the electrode terminal of gold layer semiconductor chip being installed that be formed with on the electrically insulating base surface.
Background technology
Semiconductor device helps miniaturization, slimming, the high performance of commercial power subset, medical electronic equipments etc. such as information communication device, affairs electronic equipment, household electronic equipment, measurement mechanism, mounter people to a great extent.Especially, the requirement of the miniaturization in information communication device field is strong, densification, multifunction with semiconductor device are purpose, be installed on electrically insulating base and the surface on the existing two-dimensional installation method basis that electronic unit is installed at laminated semiconductor chip, constantly developing in electrically insulating base built-in electronic parts, significantly dwindling the three-dimensional installation method of erection space at electrically insulating base with the stacked semiconductor chip structure.
In the making of semiconductor device, need semiconductor chip and load its electrically insulating base.The mounting technique of loading semiconductor chip on electrically insulating base roughly is divided into wire-bonded (ヮ イ ャ ボ Application デ ィ Application グ) installation and flip-chip (Off リ ッ プ チ ッ プ) installation.As shown in Figure 9, installing as the wire-bonded of former technology is following a kind of method, it uses bonding die material 910 that semiconductor chip 901, opposite with the face that is formed with element electrode 902 facial canal core is welded on the electrically insulating base 904, with gold wire 903 from the element electrode of semiconductor chip be formed with on the surface of electrically insulating base between the electrode terminal 906 of gold 908 and be electrically connected, and with moulded resin 909 whole die casting semiconductor chips, gold wire part.
On the other hand, the installation that the erection space of semiconductor chip is reduced, becomes the flip-chip of main flow recently is, with the element electrode face of semiconductor chip towards the electrode terminal of electrically insulating base and the method that is electrically connected.As shown in figure 10, it is a kind ofly to be electrically connected the method for the electrode terminal 1006 of the element electrode 1002 of semiconductor chips 1001 and electrically insulating base 1004 by projection 1003 that flip-chip is installed, and is protecting electrical connections with sealing resin 1009.Kind, electric connection mode according to sealing resin, flip-chip is installed has following method, it is so-called ACF (anisotropic conductive film, AnisotropicCondctive Flim) connect, ACP (anisotropic conductive cream, Anisotropic Condctive Paste) connects, between the electrode terminal of the element electrode of semiconductor chip and electrical insulating property substrate, the method that electroconductive particle is connected is set; And, so-called NCF (non-conductive junction film, Non Condctive Flim) connect, NCP (non-conductive soldering paste, Non Condctive Paste) connects, ultrasonic wave engages, the element electrode of semiconductor chip and the electrode terminal of electrically insulating base are directly contacted the method that is electrically connected mutually.
Usually, wire-bonded is installed, the flip-chip installation all is in the metal line of the semiconductor chip installed surface of electrically insulating base, comprise the electrode terminal that semiconductor chip is installed, on one side, form gold on the surface by plating etc., by the spatter property on principal security surface, make between the electrode terminal of semiconductor chip and electrically insulating base to be electrically connected well.
In addition, in order further to realize densification, the multifunction of semiconductor device, develop following device: the semiconductor device (patent documentation 1,2) that stacked semiconductor chip shown in Figure 11 has been installed on electrically insulating base; And in electrically insulating base built-in electronic unit shown in Figure 12, with the layer of built-in semiconductor chip and identical electrically insulating base in, be electrically connected by the interior bone of having filled the electroconductive resin constituent, the component-containing module (patent documentation 3) that has increased substantially packing density is installed with respect to two dimension.In addition, shown in patent documentation 4, also proposed in the semiconductor device that the semiconductor chip flip-chip is installed, between semiconductor chip and electrically insulating base, formed the technical scheme of the metal line of reinforcing usefulness.
But the gold layer of the surface of metal wiring of common necessary electrically insulating base during wire-bonded installation and flip-chip are installed is to the reliability generation harmful effect that is electrically connected.The gold layer is that not oxidised is just cleaned, the projection of this external semiconductor chip when being used for gold wire that wire-bonded installs and flip-chip and installing has suitable flexibility when carrying out crimping, and carry out the electrical connection between the electrode terminal of good semiconductor chip and electrically insulating base easily, but then, there is following problem, because the gold layer is level and smooth, so it is poor with the cementability of resin, for example, be difficult to as the copper surface, handle the cementability that just can improve simply with resin by surface roughening.
Problem as this caused semiconductor device of characteristic of golden layer, first, there is such problem, connecting by ACF, ACP connects, NCF connects, NCP connects, ultrasonic wave engages such to the gold bump on the element electrode that is formed on semiconductor chip, during the flip-chip that carries out crimping with the gold layer of the metal line of electrically insulating base and be electrically connected is installed, for contacting of the gold layer of the metal line of the gold bump that physically keeps semiconductor chip and electrically insulating base, and electrical connections and be configured in sealing resin between semiconductor chip and the electrically insulating base and the cementability deterioration of electrically insulating base, for example, when in the such semiconductor packages reliability test of moisture absorption backflow test, applying thermal shock, sealing resin, peel off easily between electrically insulating base, electrical connections is expanded at the interface of peeling off to, becomes the bad reason of electrical connection that causes connecting portion.
Second; there is such problem; using gold wire to be electrically connected the gold layer of the metal line of the element electrode of semiconductor chip and electrically insulating base; during the wire-bonded that comprises semiconductor chip and gold wire and use moulded resin to carry out die casting is installed; in the moisture absorption backflow test, keep being used to; the contact portion of the gold layer of protective money lead-in wire and metal line; the shape of gold wire moulded resin when applying thermal shock; under the mode that wire-bonded is installed; resin; peel off easily between electrically insulating base; equally; become root at this interface of peeling off, just become the reason that causes that electrical connection is bad.
The 3rd, there is such problem, install or wire-bonded installation and flip-chip installation by wire-bonded, electrode terminal at electrically insulating base has been electrically connected in the mode of the stacked semiconductor chip that is laminated with a plurality of semiconductor chips, in the moisture absorption backflow test, identical with the first～the second example, can produce peeling off that the bonding force deficiency of the electrically insulating base of the sealing resin that the moulded resin installed because of wire-bonded and flip-chip install causes, it is bad to be easy to generate the electrical connection that semiconductor installs.
The 4th, under the mode of the semi-conductive component-containing module that built-in flip-chip is installed, as the installation form of common semiconductor chip, do not expose on the surface, be built in electrically insulating base.Therefore, there is such problem,, then between semiconductor chip and electrically insulating base, applies than the first～three the bigger peel stress of example if in the moisture absorption backflow test, apply thermal shock, peel off easily between sealing resin, electrically insulating base, become the reason that causes that electrical connection is bad.In addition, there is such problem, because the surface gold layer of the metal line of electrically insulating base is level and smooth and resin is very easy to slippage, so the interior bone slippage that in component-containing module, forms, filled the conductive paste that constitutes by electroconductive resin and cause offset easily.And, be difficult to obtain the heat reactive resin in the conductive paste and the sufficient cementability of gold layer, cause the broken string of peeling off of the interior bone of having filled conductive paste easily.
In addition, above-mentioned problem depends on the area of the metal line of gold layer easily, even under identical manufacturing conditions, reliability also regular meeting changes according to the design configuration of the metal line of electrically insulating base, is difficult to guarantee certain reliability.
In addition, there is such problem, shown in patent documentation 4, in the semiconductor device that the semiconductor chip flip-chip is installed, also exist in and form the method for reinforcing between semiconductor chip and electrically insulating base with metal line, but owing to need unnecessary metal line, so will reduce the degree of freedom of the design configuration of metal line.
Patent documentation 1: TOHKEMY 2000-349228 communique
Patent documentation 2: TOHKEMY 2004-228323 communique
Patent documentation 3: Japanese kokai publication hei 11-220262 communique
Patent documentation 4: TOHKEMY 2004-153210 communique
Summary of the invention
The present invention proposes in order to solve above-mentioned existing issue, and its purpose is to provide a kind of semiconductor device and manufacture method thereof that improves the reliability of electrical connection of the semiconductor device that semiconductor chip has been installed.
Semiconductor device of the present invention, at the mounted on surface semiconductor chip of the electrically insulating base with a plurality of metal lines, the part of above-mentioned at least a plurality of metal lines is covered by resin; The surface of metal line in being formed at a plurality of metal lines of above-mentioned electrically insulating base, that be electrically connected with above-mentioned semiconductor chip at least forms the gold layer; The surface of metal line in being formed at a plurality of metal lines of above-mentioned electrically insulating base, that contact with above-mentioned resin forms roughness.
The manufacture method of semiconductor device of the present invention, operation (a), prepare semiconductor chip and electrically insulating base, this electrically insulating base has the interarea that has formed metal line, and above-mentioned metal line comprises flip-chip and the electrode terminal of above-mentioned semiconductor chip has been installed and had a plurality of surfaces through roughened; Operation (b) by photoetching method, has been installed part interarea, beyond the above-mentioned electrode terminal of above-mentioned semiconductor chip at the flip-chip of above-mentioned electrically insulating base, form photoresist; Operation (c), the interarea that the flip-chip of above-mentioned electrically insulating base is installed carries out the electroless plating gold, after above-mentioned electrode terminal surface forms gold, removes photoresist; And operation (d), between the electrode terminal face of the element electrode face of above-mentioned semiconductor chip and above-mentioned electrically insulating base,, above-mentioned semiconductor chip flip-chip is installed on the above-mentioned electrically insulating base by sealing resin.
The manufacture method of another kind of semiconductor device of the present invention, comprise: operation (a), prepare semiconductor chip and electrically insulating base, this electrically insulating base has the interarea that has formed metal line, and above-mentioned metal line comprises wire-bonded and the electrode terminal of above-mentioned semiconductor chip has been installed and had a plurality of surfaces through roughened; Operation (b), part interarea, beyond the above-mentioned electrode terminal that above-mentioned semiconductor chip has been installed in the wire-bonded of above-mentioned electrically insulating base forms photoresist; Operation (c), the interarea that the wire-bonded of above-mentioned electrically insulating base is installed carries out the electroless plating gold, after above-mentioned electrode terminal surface forms gold, removes photoresist; Operation (d), the interarea that the face with being formed with element electrode of above-mentioned semiconductor chip is opposite is bonded on the above-mentioned electrically insulating base; Operation (e), wire-bonded is installed above-mentioned semiconductor chip on above-mentioned electrically insulating base; And operation (f), above-mentioned semiconductor chip and above-mentioned wire-bonded mounting portion are carried out the resin die casting.
The manufacture method of another semiconductor device of the present invention, comprise: operation (a), prepare semiconductor chip, the 1st electrically insulating base, have the 2nd electrically insulating base of the interarea that has formed a plurality of metal lines and as the plate body of the 3rd electrically insulating base that constitutes by the mixture that comprises inorganic filler and heat reactive resin, the 1st electrically insulating base has the interarea that has formed metal line, and this metal line comprises flip-chip and the electrode terminal of above-mentioned semiconductor chip has been installed and had a plurality of surfaces through roughened; Operation (b) by photoetching method, has been installed part interarea, beyond the above-mentioned electrode terminal of above-mentioned semiconductor chip at the flip-chip of above-mentioned the 1st electrically insulating base, form photoresist; Operation (c), the interarea that the flip-chip of above-mentioned the 1st electrically insulating base is installed carries out the electroless plating gold, after above-mentioned electrode terminal surface forms gold, removes photoresist; Operation (d) between the electrode terminal face of the element electrode face of above-mentioned semiconductor chip and above-mentioned electrically insulating base, by sealing resin, is installed in above-mentioned semiconductor chip flip-chip on the above-mentioned electrically insulating base; Operation (e) forms through hole in above-mentioned plate body, fill the conductive paste that is made of the electroconductive resin constituent in above-mentioned through hole; Operation (f), the the above-mentioned the 1st and the 2nd electrically insulating base and above-mentioned plate body are carried out position alignment, stacked, so that the flip-chip of above-mentioned the 1st electrically insulating base has been installed the interarea of the interarea of above-mentioned semiconductor chip towards above-mentioned plate body, make above-mentioned the 2nd electrically insulating base formation the interarea of metal line towards another interarea of above-mentioned plate body; And operation (g), pass through heating and pressurizing, the the above-mentioned the 1st and the 2nd electrically insulating base is bonded on the above-mentioned plate body, in above-mentioned plate body, bury underground above-mentioned semiconductor chip carry out integrated, and the conductive paste that solidifies above-mentioned plate body and constitute by above-mentioned electroconductive resin constituent.
Description of drawings
Fig. 1 is the profile of the semiconductor device of first execution mode of the present invention.
Fig. 2 is the profile of the semiconductor device of second execution mode of the present invention.
Fig. 3 is the profile of the semiconductor device of the 3rd execution mode of the present invention.
Fig. 4 is the profile of the semiconductor device of the 4th execution mode of the present invention.
Fig. 5 is the profile of the semiconductor device of the 5th execution mode of the present invention and first embodiment.
Fig. 6 A-6D is the process profile of manufacture method of the semiconductor device of expression the 6th execution mode of the present invention.
Fig. 7 A-7E is the process profile of manufacture method of the semiconductor device of expression the 7th execution mode of the present invention.
Fig. 8 A-8I is the process profile of manufacture method of the semiconductor device of expression the 8th execution mode of the present invention.
Fig. 9 is the profile of an example of the existing semiconductor device of expression.
Figure 10 is the profile of another example of the existing semiconductor device of expression.
Figure 11 is the profile of another example of the existing semiconductor device of expression.
Figure 12 is the profile of another example of the existing semiconductor device of expression.
Embodiment
Semiconductor device of the present invention, in the metal line of the electrically insulating base that semiconductor chip is installed, on the surface of the electrode terminal that semiconductor chip is installed, form the gold layer, on other metal line, do not form the gold layer, by rough surface, moulded resin and the adhesive strength between the electrically insulating base between the sealing resin and electrically insulating base during flip-chip is installed, in the wire-bonded installation become big.By improving adhesive strength, just can improve the reliability of the electrical connection in the reliability test of moisture absorption backflow test etc.In addition, can reduce the design configuration of metal line of electrically insulating base of the moulded resin part of sealing resin part, the wire-bonded of flip-chip in installing in installing to the influence of reliability of electrical connection.
In addition, on electrically insulating base, install or wire-bonded installation and flip-chip installation by wire-bonded, be electrically connected in the mode of the stacked stacked semiconductor chip that a plurality of semiconductor chips are arranged, between the moulded resin and electrically insulating base that wire-bonded is installed, and the adhesive strength that flip-chip is installed between sealing resin and electrically insulating base becomes big, can improve the reliability in the reliability test of moisture absorption backflow test etc.Under the mode of stacked semiconductor chip, than monolithic semiconductor chip, increase with resin bonding face number and area, and, in shape, apply big stress on the parts such as stacked interface of across corner and semiconductor chip easily.Therefore, the installation reliability of stacked semiconductor chip guarantee difficulty on the installation reliability of guaranteeing monolithic semiconductor chip usually, but the adhesive strength of the installed surface by increasing electrically insulating base also can be improved the installation reliability of stacked semiconductor chip.
In addition, under the mode of the semi-conductive component-containing module that built-in flip-chip is installed, improve the sealing resin of flip-chip installation and the adhesive strength between electrically insulating base, semiconductor chip than mounted on surface, increase the peel stress between sealing resin and electrically insulating base, can improve the reliability of electrical connection of reliability tests such as moisture absorption backflow test of semiconductor device of the mode of the component-containing module that the high electrical connection of reliability realizes difficulty.In addition, because the surface of the metal line of the electrical connection of interior bone that form, that filled the electroconductive resin constituent in the roughened component-containing module, therefore just can suppress because of smoothly making the easy slippage of resin, offset because of the gold layer interior bone that is easy to produce, in addition, because the adhesive strength of interior bone and metal line becomes big, in various reliability tests, can not produce and peel off, can guarantee highly reliable electrical connection.
Preferably forming on gold layer, the surface mode that does not form the gold layer, carries out roughened on the surface of the metal line of the part of the electrode terminal that comprises the electrically insulating base that semiconductor chip is installed at other metal line.Can select the gold layer on the surface of metal line to form.For semiconductor chip is installed, except that the gold layer forms the necessary electrode terminal, carry out the selection of the surface of metal wiring of gold layer formation, can select and to form the photoresist that the gold layer forms with simple design configuration, in addition, the area that can select not make the reliability of electrical connection of the installation of semiconductor chip to worsen.
The formation method of the gold layer on electrode terminal surface, any one in preferred electroless plating, metallide, evaporation or the sputter.Still use the formation technology of existing gold layer just can make semiconductor device of the present invention.Evaporation, sputter can form by dried especially, more preferably easy method.
Preferably by using ACF (anisotropic conductive film, Anisotropic Condctive Flim), ACP (anisotropic conductive cream, Anisotropic Condctive Paste), NCF (non-conductive junction film, Non Condctive Flim), the ultrasonic wave of the thermal pressure welding method of any one of NCP (non-conductive soldering paste, Non Condctive Paste) or the gold that forms on gold bump that forms on the element electrode of semiconductor chip and the electrode terminal surface at electrically insulating base engages and carries out flip-chip and install.Still can use existing flip-chip mounting technique.In addition; be not limited only to above-mentioned existing flip-chip mounting technique; electrode terminal at the semiconductor chip that electrically insulating base is installed uses the gold wiring, in the mounting technique of the mode by protection installation portions such as sealing resin, moulded resins, also can obtain same effect.
Preferred wiring is the copper of roughening.The copper circuit board is preferably bought can cheap make, various market sale products.In addition, carrying out surface roughening easily handles.Except copper, also can be the alloy of cupric.Can also use the Copper Foil of roughening, the processing of the milled processed of the etch processes by using corrosive liquid, plasma treatment, use grinding agent, electrolysis etc. can form level and smooth Copper Foil.
Preferred above-mentioned the 3rd electrically insulating base is formed by the mixture that contains inorganic filler and heat reactive resin.In addition, the thermoplastic resin that contains in the 1st～3 also is identical materials.Thus,, increase the adhesive strength of the bonding plane of each electrically insulating base, in the reliability test of moisture absorption backflow test etc., can improve the reliability of electrical connection by having strengthened 1,3 of electrically insulating bases and 2,3 s' resin adhesive strength each other.In addition, in addition,,, has the effect that improves reliability of electrical connection because stress diminishes than by the stacked morphotic semiconductor device of the xenogenesis of different materials.
Preferred inorganic filler content is 70 weight %～95 weight %.During more than or equal to 95 weight %, with respect to the powder amount, amount of liquid is very few, is difficult to sheet.In addition, during smaller or equal to 70 weight %,, reduce the effect of raising thermal diffusivity etc. owing to mix inorganic filler.When semiconductor chip being built in electrically insulating base by heating and pressurizing, if semiconductor chip is not caused the viscosity of damage, the more preferably fit rate height of inorganic filler.
Preferred inorganic filler is from Al
2O
3, MgO, BN, AlN and SiO
2In at least a inorganic filler selected.Use these inorganic fillers, form the semiconductor device of fine heat radiation property.In addition, as inorganic filler, use SiO
2Situation under, can reduce dielectric constant.
Preferred heat reactive resin is at least a heat reactive resin of selecting from epoxy resin, phenolic resins and hydrohalogenic acid salt resin.There are various kinds selling on these resin markets,, form thermal endurance and the good semiconductor device of electrical insulating property by using these resins.
Preferred electroconductive resin constituent comprises, and as conductive compositions, comprises at least a metallic of selecting from gold, silver, copper and nickel, comprises epoxy resin as resinous principle.Above-mentioned metal, resistance reduces, and in addition, epoxy resin thermal endurance and electrical insulating property are good.Especially, preferably apply the metallic on copper powder surface with silver on core, it has the characteristic of strong and cheap copper powder of mechanical strength and dysoxidizable silver powder two aspects.
In manufacture method of the present invention, preferably include: operation (a), prepare semiconductor chip and electrically insulating base, this electrically insulating base has formation and to comprising flip-chip the first type surface that the metal line of roughened has been carried out on a plurality of surfaces of the electrode terminal of above-mentioned semiconductor chip is installed; Operation (b) by photoetching method, is installed the first type surface and the part beyond above-mentioned electrode terminal of the above-mentioned semiconductor chip of above-mentioned electrically insulating base at flip-chip, form photoresist; Operation (c), the first type surface that the flip-chip of above-mentioned electrically insulating base is installed carries out the electroless plating gold, forms on above-mentioned electrode terminal surface after the gold, removes photoresist; Operation (d) between the electrode terminal face of the element electrode face of above-mentioned semiconductor chip and above-mentioned electrically insulating base, by sealing resin, is installed in above-mentioned semiconductor chip flip-chip on the above-mentioned electrically insulating base.Still can use existing flip-chip mounting technique and photoetching process, can make the semiconductor device of high reliability of the present invention.
In addition, preferably include: operation (a), prepare semiconductor chip and electrically insulating base, this electrically insulating base has to form and comprises wire-bonded the first type surface that the metal line of roughened has been carried out on a plurality of surfaces of the electrode terminal of above-mentioned semiconductor chip is installed; Operation (b) by photoetching method, is installed the first type surface and the part beyond above-mentioned electrode terminal of the above-mentioned semiconductor chip of above-mentioned electrically insulating base in wire-bonded, form photoresist; Operation (c), the first type surface that the wire-bonded of above-mentioned electrically insulating base is installed carries out the electroless plating gold, forms on above-mentioned electrode terminal surface after the gold, removes photoresist; Operation (d) is bonded on the above-mentioned electrically insulating base the opposite first type surface of the face of the element electrode that is formed with above-mentioned semiconductor chip; Operation (e), wire-bonded is installed above-mentioned semiconductor chip on above-mentioned electrically insulating base; Operation (f) above-mentioned semiconductor chip of resin die casting and above-mentioned wire-bonded mounting portion.Still can use existing flip-chip mounting technique and photoetching process, can make the semiconductor device of high reliability of the present invention.
In addition, on above-mentioned electrically insulating base, install or wire-bonded installation and flip-chip installation, the stacked semiconductor chip that is laminated with a plurality of semiconductor chips is installed by wire-bonded.The making of stacked semiconductor chip mode is installed, carrying out the different wire-bonded of height of two steps on the one hand installs, carry out wire-bonded installation and flip-chip on the one hand two kinds of installations are installed, therefore just become very complicated production process, and use prior art just can make the semiconductor device of high reliability.
In addition and since coarse with filled the metal line that the conductive paste interior bone is electrically connected, in the heating and pressurizing operation, when in plate body, burying semiconductor chip underground, stop heat reactive resin mobile of formation plate body, be difficult to cause the skew of the position of interior bone.Thus, in semiconductor chip, can either form interior bone in nearer zone, again can be with narrower spacing configuration interior bone.
The formation method of the gold layer on the electrode terminal surface of electrically insulating base, any one formation of preferred metallide, evaporation or sputter.Still use existing technology just can carry out the work that on the electrode terminal surface, forms gold.In addition, utilize evaporation, sputter,, need not carry out the processing of soup, can carry out with simple drying process owing to as electroplating, do not use medicine to forming gold on the electrode terminal surface.
In the present invention, do not form the roughness of the surface of metal wiring of above-mentioned gold, 10 scopes that mean roughness Rz is 1～10 μ m of regulation, the more preferably scope of 3～6 μ m among the preferred JIS B 0601.If above-mentioned scope just can be kept the high adhesiveness with resin.At this, 10 mean roughness (10 average heights of regulation among the JIS B 0601, peak value is average to peak valley, ten point averageheight, peak to valley average), in the roughness curve of any datum length, the difference of the distance between at the bottom of 5 of 5 peaks of the high part by average its average line and low part is calculated (the μ m of unit).
According to the present invention, in the semiconductor device that semiconductor chip is installed, on the surface of the electrode terminal of the semiconductor chip of the metal line that electrically insulating base is installed, form the gold layer, by other the surface of metal line of roughened, the moulded resin adhesive strength of installing with wire-bonded becomes big, just can improve the reliability of the electrical connection of semiconductor chip installation.
Below, referring to figs. 1 through Fig. 8 embodiments of the present invention are described.Have again, the invention is not restricted to following execution mode.
(first execution mode)
With reference to the representative section figure of Fig. 1, an execution mode of semiconductor device of the present invention is described.The 101st, semiconductor chip, the 102nd, the element electrode of semiconductor chip, the 103rd, projection, the 104th, electrically insulating base, the 105th, metal line, the 106th, the electrode terminal of installation semiconductor chip, the 107th, the coarse part of metal line, the 108th, the gold layer of electrode terminal, the 109th, sealing resin.
In the metal line 105 of electrically insulating base 104, form the gold 108 of thickness 0.01～3 μ m on the surface of the electrode terminal 106 that semiconductor chip 101 is carried out the flip-chip installation, do not form gold on other the surface of metal line 105 and carry out coarse (107) and handle, thus, strengthen the adhesive strength of sealing resin 109 and electrically insulating base 104, improved the reliability of electrical connection of the flip-chip installation of the semiconductor chip 101 that keeps by sealing resin 109.In the semiconductor device of reality, because the area of the metal line 105 of contact seal resin 109, make reliability of electrical connection be subjected to its influence easily, but the surface of the metal line beyond electrode terminal 106 does not form gold and carries out roughened, the influence of the area of metal line 105 can be reduced, the reliability of electrical connection can be improved.
In embodiments of the present invention, can be gold-plated by the original coarse copper circuit board of market sale is selectively implemented, form roughness and level and smooth golden watch face, also can use the gloss Copper Foil to carry out roughened afterwards.As after carry out the method for roughened, can adopt surperficial little roughened by chemical etching etc.
Do not form the roughness of the surface of metal wiring of above-mentioned gold, among 10 mean roughness Rz that in JIS B 0601, stipulate, the scope of preferred 1～10 μ m, the more preferably scope of 3～6 μ m.If above-mentioned scope, just can keep cementability with resin than the highland.
(second execution mode)
With reference to the representative section figure of Fig. 2, another execution mode of semiconductor device of the present invention is described.The 201st, semiconductor chip, the 202nd, the element electrode of semiconductor chip, the 203rd, gold wire, the 204th, electrically insulating base, the 205th, metal line, the 206th, the electrode terminal of installation semiconductor chip, the 207th, the coarse part of metal line, the 208th, the gold layer of electrode terminal, the 209th, moulded resin, the 210th, the bonding die material of semiconductor chip.
In the metal line of electrically insulating base 204, the surface that the electrode terminal 206 of semiconductor chip 201 is installed in wire-bonded forms gold, do not form gold on the surface of other metal line 205 and carry out roughening (207) processing, increase the adhesive strength of moulded resin 209 and electrically insulating base 204 thus, improved the reliability of electrical connection of the wire-bonded installation of the semiconductor chip 201 that keeps by moulded resin 209.The preferred roughness and the first execution mode same degree.
(the 3rd execution mode)
With reference to the representative section figure of Fig. 3, another execution mode of semiconductor device of the present invention is described.The 301st, the stacked semiconductor chip, the 302nd, the element electrode of stacked semiconductor chip, the 303rd, gold wire, the 304th, electrically insulating base, the 305th, metal line, the 306th, the electrode terminal of the stacked semiconductor chip of installation, the 307th, the coarse part of metal line, the 308th, the gold layer of electrode terminal, the 309th, moulded resin, the 310th, the bonding die material of semiconductor chip.
Installed in the semiconductor device of stacked semiconductor chip 301 of stacked 2 semiconductor chips in wire-bonded, identical with first execution mode～second execution mode, in the metal line of electrically insulating base 304, the surface that the electrode terminal 306 of stacked semiconductor chip 301 has been installed in wire-bonded forms gold, do not form golden youngster carries out coarse (307) and handles on other the surface of metal line 305, thus, increase the adhesive strength of moulded resin 309 and electrically insulating base 304, improved the reliability of electrical connection of the wire-bonded installation of the stacked semiconductor chip 301 that keeps by moulded resin 309.Even the sheet number of stacked semiconductor chip is increased to 3, also can obtain identical effect.The preferred roughness and the first execution mode same degree.
(the 4th execution mode)
With reference to the representative section figure of Fig. 4, another execution mode of semiconductor device of the present invention is described.The 401st, the stacked semiconductor chip, the 402nd, the element electrode of stacked semiconductor chip, the 403rd, gold wire, the 404th, projection, the 405th, electrically insulating base, the 406th, metal line, the 407th, the electrode terminal of the stacked semiconductor chip of installation, the 408th, the coarse part of metal line, the 409th, the gold layer of electrode terminal, the 410th, moulded resin, the 411st, sealing resin, the 412nd, the bonding die material of stacked semiconductor chip.
Installing by flip-chip and wire-bonded is installed in the semiconductor device with stacked semiconductor chip 401 electrical connections of stacked 2 semiconductor chips, with first execution mode～the 3rd execution mode in the same manner, in the metal line of electrically insulating base 405, form gold on the surface that the electrode terminal 407 that makes 401 electrical connections of stacked semiconductor chip is installed by flip-chip installation and wire-bonded, do not form gold on other metal line 406 surfaces and carry out coarse (408) processing, increase the adhesive strength of moulded resin 410 and sealing resin 411 and electrically insulating base 405 thus, improved the reliability of electrical connection that wire-bonded is installed and flip-chip is installed of the stacked semiconductor chip 401 that keeps by moulded resin 410 and sealing resin 411.In addition, the sheet number of stacked semiconductor chip also can be increased to 3, and the semiconductor chip by will hypomere carries out flip-chip to be installed, and last two sections semiconductor chip is carried out wire-bonded install, and also can make semiconductor device.The preferred roughness and the first execution mode same degree.
(the 5th execution mode)
With reference to the representative section figure of Fig. 5, another execution mode of semiconductor device of the present invention is described.
The 501st, semiconductor chip, the 502nd, the element electrode of semiconductor chip, the 503rd, projection, the 504th, electrically insulating base, the 505th, metal line, the 506th, the electrode terminal of installation semiconductor chip, the 507th, the coarse part of metal line, the 508th, the gold layer of electrode terminal, the 509th, sealing resin, the 510th, the electrically insulating base that constitutes by the mixture that contains inorganic filler and heat reactive resin, the 511st, filled the interior bone of electroconductive resin constituent.
Be built in the semiconductor device of component-containing module form of electrically insulating base at the semiconductor that flip-chip is installed, in the metal line of electrically insulating base 504, surface at the electrode terminal 506 that semiconductor chip 501 flip-chips are installed forms gold, do not form gold on other the surface of metal line 505 and carry out coarse (507) and handle, can increase the adhesive strength of sealing resin 509 and electrically insulating base 504, and the electrically insulating base 510 that constitutes by the mixture that comprises inorganic filler and heat reactive resin and the adhesive strength of electrically insulating base 504.In addition, can improve the reliability of electrical connection of installing by sealing resin 509 flip-chips that keep, that be built in the semiconductor chip 501 in the electrically insulating base 510.Be built in the mode of electrically insulating base 510 at the such semiconductor chip 501 of the 5th execution mode, though compare with the semiconductor core sheet mode of mounted on surface, it is big that the peel stress that sealing resin 509, electrically insulating base are 504 becomes, be difficult to realize the electrical connection of high reliability, but, can improve the reliability of electrical connection of semiconductor chip greatly according to the semiconductor device of present embodiment.In addition, the surface of having filled the metal line that the interior bone 511 of electroconductive resin constituent is electrically connected is applied in roughened, under level and smooth gold layer situation, the interior bone 511 of having filled electroconductive resin constituent slippage and cause offset easily on the gold layer, but in the semiconductor device of present embodiment, can suppress offset.In addition, it is big that the adhesive strength of the metal line of interior bone and electrically insulating base becomes, and can realize that the interior bone of the high reliability in the semiconductor device of component-containing module mode connects.The preferred roughness and the first execution mode same degree.
(the 6th execution mode)
With reference to the typical process profile of Fig. 6 A-6D, an execution mode of the manufacture method of semiconductor device of the present invention is described.The 601st, semiconductor chip, the 602nd, the element electrode of semiconductor chip, the 603rd, projection, the 604th, electrically insulating base, the 605th, metal line, the 606th, the electrode terminal of installation semiconductor chip, the 607th, the coarse part of metal line, the 608th, the gold layer of electrode terminal, the 609th, sealing resin, the 610th, photoresist.
At first, prepare the electrically insulating base 604 (Fig. 6 A) of the surface of metal line 605 through roughened.
Then, form photoresist 610 (Fig. 6 B) by photoetching process in the part except the electrode terminal 606 that semiconductor chip 601 (Fig. 6 D) flip-chip is installed.Then, form gold 608 on the surface of electrode terminal 606.By gold-plated formation gold layer 608.After this, remove photoresist 610 (Fig. 6 C).Then, on electrically insulating base 604, semiconductor chip 601 flip-chips are installed, made the semiconductor device (Fig. 6 D) of present embodiment by sealing resin 609.According to the method described above, can directly use existing flip-chip mounting technique and photoetching process, can the high semiconductor device of fabrication reliability.
(the 7th execution mode)
With reference to the typical process profile of Fig. 7 A-7E, another execution mode of the manufacture method of semiconductor device of the present invention is described.The 701st, semiconductor chip, the 702nd, the element electrode of semiconductor chip, the 703rd, gold wire, the 704th, electrically insulating base, the 705th, metal line, the 706th, the electrode terminal of installation semiconductor chip, the 707th, the coarse part of metal line, the 708th, the gold layer of electrode terminal, the 709th, moulded resin, the 710th, the bonding die material of semiconductor chip, the 711st, photoresist.
At first, prepare the electrically insulating base 704 (Fig. 7 A) of the surface of metal line 705 through roughened.Then, form photoresist 711 (Fig. 7 B) by photoetching process in the part except the electrode terminal 706 that the semiconductor chip wire-bonded is installed.Then, form gold, remove photoresist 710 (Fig. 7 C) on the surface of electrode terminal 706.Then, the face of the element electrode 702 that does not form semiconductor chip 701 is engaged with insulated substrate 704, use gold wire 703 that semiconductor chip 701 wire-bonded are installed (Fig. 7 D).After this, the wire-bonded installation portion that utilizes 709 pairs of moulded resins to comprise semiconductor chip 701 and gold wire 703 carries out die casting, makes the semiconductor device of present embodiment.(Fig. 7 E).As mentioned above, existing wire-bonded mounting technique and photoetching process can be directly used, the semiconductor device of high reliability can be made.
(the 8th execution mode)
With reference to the typical process profile of Fig. 8 A-8I, another execution mode of the manufacture method of semiconductor device of the present invention is described.The 801st, semiconductor chip, the 802nd, the element electrode of semiconductor chip, the 803rd, projection, the 804th, the electrically insulating base of electrical connection semiconductor chip, the 805th, electrically insulating base, the 806th, the plate body that constitutes by the mixture that contains inorganic filler and heat reactive resin, the 807th, through hole, the 808th, filled the interior bone of the conductive paste that forms by the electroconductive resin constituent, the 809th, metal line, the 810th, the electrode terminal of semiconductor chip is installed, the 811st, the coarse part of metal line, the 812nd, the gold layer of electrode terminal, the 813rd, sealing resin, the 814th, photoresist.
At first, prepare the electrically insulating base 804 (Fig. 8 A) of the surface of metal line 809 through roughened.Then, form photoresist 814 (Fig. 8 B) by photoetching process in the part except the electrode terminal 810 that the semiconductor chip flip-chip is installed.Then, form gold layer 812 on the surface of electrode terminal 810, remove photoresist 814 (Fig. 8 C).Then, by sealing resin 813 semiconductor chip 801 flip-chips are installed in (Fig. 8 D) on the electrically insulating base 804.On the other hand, prepare the plate body 806 (Fig. 8 E) that constitutes by the mixture that contains inorganic filler and heat reactive resin.Then, form the through hole 807 (Fig. 8 F) of having filled conductive paste and having become interior bone.Then, filled conductive cream (Fig. 8 G) in through hole 807.Then, by interior bone 808 with flip-chip the electrically insulating base 804 of semiconductor chip 801 has been installed, the electrically insulating base 805 of metal line that is formed with the plate body 806 of the interior bone 808 of having filled conductive paste and is used to form the opposing party of plate body 806 is electrically connected, and makes their position alignment (Fig. 8 H).Then, pass through heating and pressurizing, bonding electrically insulating base 804, plate body 806 and electrically insulating base 805, in plate body 806, bury semiconductor chip 801 underground and carry out integrated, solidify the conductive paste that is filled in plate body 806 and the interior bone 808, make the semiconductor device (Fig. 8 I) of present embodiment.As mentioned above, existing flip-chip mounting technique and photoetching process can be directly used, the semiconductor device of high reliability can be made.In addition, by the heating and pressurizing operation when plate body is buried semiconductor chip underground, the metal line that is electrically connected with the interior bone of having filled conductive paste is applied in roughened, the offset of interior bone is provided with difficulty, even the close clearance development of the path clearance of the miniaturization of metal line, interior bone, in this semiconductor device, can form the interior bone of having filled the conductive paste that constitutes by the electroconductive resin constituent with good positional precision.
Embodiment
Below, be described more specifically the present invention according to embodiment.
(first embodiment)
In first embodiment,, make the semiconductor device of the component-containing module mode of above-mentioned the 5th execution mode according to the step of following (i)～(iv).
(i) the gold layer of the electrode terminal in the formation electrically insulating base
As the electrically insulating base that semiconductor chip is installed, prepare glass epoxy substrate.The thick 200 μ m of glass epoxy substrate are formed with the electrode terminal that semiconductor chip is installed, the passage region that connects the interior bone of having filled the conductive paste that is made of the electroconductive resin constituent, and are electrically connected their metal line; The thick 18 μ m of these metal lines, the roughening degree on surface is undertaken coarse by average 10 roughness Rz, 5 μ m.Use photoetching process to form photoresist in the part except the electrode terminal of semiconductor chip that glass epoxy substrate is installed.Photoresist uses the system AQ-1558 of society of Asahi Chemical Industry.Then, on this glass epoxy substrate, form the non-electrolytic nickel coating of 1 μ m, then form the non-electrolysis gold plate of 0.04 μ m.In electroplate liquid, use the ニ system デ Application NPR-M of the international Singapore of ゥ ェ system ラ society system, ォ one リ カ Le, TKK51M20.The surface that makes the electrode terminal that semiconductor chip only is installed according to above-mentioned operation forms golden glass epoxy substrate.
Semiconductor chip (ii) is installed
Preparation 10mm is square, the semiconductor chip of thick 0.3mm, utilizes the gold wire welding to form the gold bump of high 70 μ m in advance as the overshooting shape electrode on 100 element electrodes of semiconductor chip.In the sealing resin that in flip-chip is installed, uses, use Hitachi to change into the laminar sealing resin UF-511 of the thick 40 μ m of society's system.Processing this laminar sealing resin, to make its area be 100mm
2After, it is sticked on the zone of the semiconductor chip that glass epoxy substrate is installed.Then, heating and pressurizing is carried out to semiconductor chip in the back side that never forms element electrode, and its flip-chip is installed on the glass epoxy substrate.If heating-up temperature is 200 ℃, pressure is 3MPa, and the heating and pressurizing time is 15 seconds.Its result is electrically connected the electrode terminal of the electroless plating gold of the element electrode of semiconductor chip and glass epoxy substrate by gold bump, makes the sealing resin sclerosis.
(iii) prepare the plate body that forms by the mixture that comprises inorganic filler and heat reactive resin
At first, as requested, drop into the trace solvent that is used for the viscosity adjustment, use mixing and blending machine to mix the material that the mixing of adjusting inorganic filler and heat reactive resin promptly constitutes plate body.In the present embodiment, 10 minutes stirring adjustment are contained the mixture of epoxy resin 10 weight %, silica-filled dose 90 weight %.Then, by the doctor blade method, make the plate body of thick 100 μ m of these mixtures.Then, overlapping 4 these plate bodys roll, form the plate body of thick 400 μ m after, use punch to form through hole as the diameter 160 μ m of interior bone, use silk screen print method filled conductive cream in this through hole.Conductive paste as used herein, use the copper particle 85 weight % of three mixing adjustment ball shapes of cylinder machine, bisphenol A type epoxy resin (oiling shell epoxy society system " Ai Bikete 828 ") 3 weight % as resinous principle, ethylene oxidic ester based epoxy resin (Dongdu changes into society's system " YD-171 ") 9 weight % are as ammino adduct curing agent (monosodium glutamate Co., Ltd. system " MY-24 ") the 3 weight % of curing agent.
(iv) semiconductor chip is built-in, integrated
Then, the glass epoxy substrate of semiconductor chip is installed in preparation by the flip-chip that (ii) obtains, by the plate body that is formed with the interior bone of having filled conductive paste that (iii) obtains, and be used to form the opposing party's of plate body the glass epoxy substrate of the metal line of living the surface; Semiconductor chip is built in the plate body, interior bone by plate body is electrically connected 2 glass epoxy resin substrates and plate body, after making their position alignment, carry out integrated processing, obtain the semiconductor device with the built-in module of parts of present embodiment by heating and pressurizing.Heating and pressurizing is used hot press, and establishing heating-up temperature is 200 ℃, and pressure is 3MPa, and the heating and pressurizing time is 2 hours.The epoxy resin that plate body contained, viscosity is in case after descending, harden bonding plate body combined glass glass epoxy resin base plate.Filled the epoxy resin that contained in the interior bone of conductive paste also through overcure, be electrically connected 2 glass epoxy substrates by plate body.
Just produced the semiconductor device of present embodiment thus.
As a comparative example, identical with conventional example, in the operation of above-mentioned (i), be produced on the surface of all metal lines of the face that contains the electrode terminal that semiconductor chip is installed, form the semiconductor device of gold layer by same method.
Carry out the evaluation of the reliability of electrical connection of 2 semiconductor device by the moisture absorption backflow test.Concrete condition is under 85 ℃, 85%RH condition, keeps after 168 hours, uses the belt backflow test machine of 260 ℃ of maximum temperatures to apply thermal shock.As the reliability of semiconductor device, estimate according to the connection resistance value (hereinafter to be referred as protruding resistance) between the electrode terminal of the element electrode combined glass glass epoxy resin base plate of flip-chip mounted semiconductor chip.Metewand, it is bad more than 10% that protruding resistance changes before and after the moisture absorption backflow test, uses the result who estimates with respect to the fraction defective of 100 electric connection points, in the conventional semiconductor device, produce 60% badly, but in the semiconductor device of the present invention, do not produce bad.
So, the semiconductor device of present embodiment forms the gold layer on the surface of the electrode terminal that semiconductor chip is installed, by to carrying out roughened, just can improve the reliability of electrical connection of the installation of semiconductor chip with other the surface of metal line of resin bonding.
Utilizability on the industry
According to the present invention, can make with the electrical connection of high reliability the semiconductor device of mounting semiconductor chip Part.
Claims
(according to the modification of the 19th of treaty)
1, (after revising) a kind of semiconductor device is characterized in that,
At the mounted on surface semiconductor chip of the electrically insulating base with a plurality of metal lines, a part that is positioned at above-mentioned at least many strip metal wirings of the face that above-mentioned semiconductor chip has been installed is covered by resin;
Surface in a plurality of metal lines that form on above-mentioned electrically insulating base, that be positioned at the metal line that is electrically connected with above-mentioned semiconductor chip at least of the face that above-mentioned semiconductor chip has been installed forms the gold layer;
Be arranged in the surface that is formed on the face on the above-mentioned electrically insulating base and is formed on the metal line a plurality of metal lines, that contact with above-mentioned resin on the above-mentioned electrically insulating base, forming roughness.
2, (revise back) semiconductor device according to claim 1, the installation of above-mentioned semiconductor chip are that flip-chip is installed, and sealing resin is between the electrode terminal face of the element electrode face of above-mentioned semiconductor chip and above-mentioned electrically insulating base;
By having used anisotropic conductive film, anisotropic conductive cream, the ultrasonic wave of a certain thermal pressure welding method in non-conductive junction film, the non-conductive soldering paste or the gold bump that forms on the element electrode of above-mentioned semiconductor chip and the gold that forms on the electrode terminal of electrically insulating base surface engages, and carries out the flip-chip of above-mentioned semiconductor chip and installs.
3, semiconductor device according to claim 1,
The installation of above-mentioned semiconductor chip is that wire-bonded is installed;
The interarea opposite of above-mentioned semiconductor chip with the element electrode face, the interarea of installing with the wire-bonded of above-mentioned electrically insulating base engages, and the resin die casting is carried out in above-mentioned semiconductor chip, above-mentioned wire-bonded mounting portion.
4, semiconductor device according to claim 1,
Above-mentioned semiconductor chip the has been stacked stacked semiconductor chip of a plurality of semiconductor chips;
This semiconductor device comprises the electrically insulating base with the interarea that has formed a plurality of metal lines, and these a plurality of metal lines comprise the electrode terminal that wire-bonded has been installed above-mentioned stacked semiconductor chip;
The interarea opposite of a semiconductor chip in the above-mentioned stacked semiconductor chip with the element electrode face, the interarea of installing with the wire-bonded of above-mentioned electrically insulating base engages, and the resin die casting is carried out in above-mentioned stacked semiconductor chip, above-mentioned wire-bonded mounting portion.
5, according to the semiconductor device described in the claim 1,
Above-mentioned semiconductor chip the has been stacked stacked semiconductor chip of a plurality of semiconductor chips;
This semiconductor device comprises electrically insulating base, and this electrically insulating base has the interarea that has formed a plurality of metal lines, and these a plurality of metal lines comprise that wire-bonded is installed and flip-chip has been installed the electrode terminal of above-mentioned stacked semiconductor chip;
Sealing resin has been installed at flip-chip between the electrode terminal face of the element electrode face of semiconductor chip of above-mentioned stacked semiconductor chip and above-mentioned electrically insulating base;
The resin die casting is carried out in above-mentioned stacked semiconductor chip, above-mentioned wire-bonded mounting portion.
6, according to the semiconductor device described in the claim 1,
The installation of above-mentioned semiconductor chip is that flip-chip is installed,
This semiconductor device comprises:
Flip-chip has been installed the 1st electrically insulating base of above-mentioned semiconductor chip;
The 2nd electrically insulating base with the interarea that has formed a plurality of metal lines;
Configuration and have interarea that has formed a plurality of metal lines and the 3rd electrically insulating base that constitutes by the mixture that comprises inorganic filler and heat reactive resin between above-mentioned the 1st electrically insulating base and above-mentioned the 2nd electrically insulating base; And
The filling that in above-mentioned the 3rd electrically insulating base, forms the interior bone of electroconductive resin constituent;
Sealing resin is between the electrode surface of the element electrode face of above-mentioned semiconductor chip and above-mentioned the 1st electrically insulating base;
The the above-mentioned the 1st and the 2nd electrically insulating base becomes one by above-mentioned the 3rd electrically insulating base;
At least a portion metal line of above-mentioned the 1st～the 3rd electrically insulating base is electrically connected by above-mentioned interior bone.
7, according to each described semiconductor device in the claim 1 to 6, in the metal line of the interarea that above-mentioned semiconductor chip has been installed, be formed with the gold layer on a part of surface of the above-mentioned metal line that comprises above-mentioned electrode terminal surface, roughened is carried out on the surface of other metal line.
8,, utilize at least a method of from plated by electroless plating, metallide, evaporation or sputter, selecting to form above-mentioned gold layer according to each described semiconductor device in the claim 1 to 7.
9, (deletion)
10, (revise the back) according to each described semiconductor device in the claim 1 to 8, above-mentioned metal line comprises the copper of surface through roughening.
11, (revise the back) according to each described semiconductor device in the claim 1 to 8,10, the roughness of above-mentioned surface of metal wiring is, in 10 scopes that mean roughness Rz is 1～10 μ m of JIS B 0601 record.
12, semiconductor device according to claim 6, the inorganic filler content of above-mentioned the 3rd electrically insulating base are the scope of 70 weight %～95 weight %.
13, according to claim 6 or 12 described semiconductor device, above-mentioned inorganic filler comprises from Al
2O
3, MgO, BN, AlN and SiO
2The middle at least a inorganic filler of selecting.
14, according to claim 6 or 12 described semiconductor device, above-mentioned heat reactive resin comprises at least a heat reactive resin of selecting from epoxy resin, phenolic resins and hydrogen acid ether (hydrogen acid ester) resin.
15, semiconductor device according to claim 6, above-mentioned electroconductive resin constituent comprises the metallic that contains at least a metal of selecting as conductive compositions from gold, silver, copper and nickel, and comprises epoxy resin as resinous principle.
16, the manufacture method of (after revising) a kind of semiconductor device is made each described semiconductor device in the claim 1 to 8,10 to 15, and this manufacture method comprises:
Operation (a) is prepared semiconductor chip and electrically insulating base, and this electrically insulating base has the interarea that has formed metal line, and above-mentioned metal line comprises flip-chip and the electrode terminal of above-mentioned semiconductor chip has been installed and had a plurality of surfaces through roughened;
Operation (b) by photoetching method, has been installed part interarea, beyond the above-mentioned electrode terminal of above-mentioned semiconductor chip at the flip-chip of above-mentioned electrically insulating base, form photoresist;
Operation (c), the interarea that the flip-chip of above-mentioned electrically insulating base is installed carries out the electroless plating gold, after above-mentioned electrode terminal surface forms gold, removes photoresist; And
Operation (d) between the electrode terminal face of the element electrode face of above-mentioned semiconductor chip and above-mentioned electrically insulating base, by sealing resin, is installed in above-mentioned semiconductor chip flip-chip on the above-mentioned electrically insulating base.
17, the manufacture method of (after revising) a kind of semiconductor device, the method for each described semiconductor device in the manufacturing claim 1 to 8,10 to 15, this manufacture method comprises:
Operation (a) is prepared semiconductor chip and electrically insulating base, and this electrically insulating base has the interarea that has formed metal line, and above-mentioned metal line comprises wire-bonded and the electrode terminal of above-mentioned semiconductor chip has been installed and had a plurality of surfaces through roughened;
Operation (b), part interarea, beyond the above-mentioned electrode terminal that above-mentioned semiconductor chip has been installed in the wire-bonded of above-mentioned electrically insulating base forms photoresist;
Operation (c), the interarea that the wire-bonded of above-mentioned electrically insulating base is installed carries out the electroless plating gold, after above-mentioned electrode terminal surface forms gold, removes photoresist;
Operation (d), the interarea that the face with being formed with element electrode of above-mentioned semiconductor chip is opposite is bonded on the above-mentioned electrically insulating base;
Operation (e), wire-bonded is installed above-mentioned semiconductor chip on above-mentioned electrically insulating base; And
Operation (f) is carried out the resin die casting to above-mentioned semiconductor chip and above-mentioned wire-bonded mounting portion.
18, according to the manufacture method of claim 16 or 17 described semiconductor device, install or flip-chip is installed and wire-bonded is installed by wire-bonded, on above-mentioned electrically insulating base, installed the stacked semiconductor chip of a plurality of semiconductor chips stacked.
19, the manufacture method of (after revising) a kind of semiconductor device, the method for each described semiconductor device in the manufacturing claim 1 to 8,10 to 15, this manufacture method comprises:
Operation (a), prepare semiconductor chip, the 1st electrically insulating base, have the 2nd electrically insulating base of the interarea that has formed a plurality of metal lines and the plate body of conduct the 3rd electrically insulating base that constitutes by the mixture that comprises inorganic filler and heat reactive resin, the 1st electrically insulating base has the interarea that has formed metal line, and this metal line comprises flip-chip and the electrode terminal of above-mentioned semiconductor chip has been installed and had a plurality of surfaces through roughened;
Operation (b) by photoetching method, has been installed part interarea, beyond the above-mentioned electrode terminal of above-mentioned semiconductor chip at the flip-chip of above-mentioned the 1st electrically insulating base, form photoresist;
Operation (c), the interarea that the flip-chip of above-mentioned the 1st electrically insulating base is installed carries out the electroless plating gold, after above-mentioned electrode terminal surface forms gold, removes photoresist;
Operation (d) between the electrode terminal face of the element electrode face of above-mentioned semiconductor chip and above-mentioned electrically insulating base, by sealing resin, is installed in above-mentioned semiconductor chip flip-chip on the above-mentioned electrically insulating base;
Operation (e) forms through hole in above-mentioned plate body, fill the conductive paste that is made of the electroconductive resin constituent in above-mentioned through hole;
Operation (f), the the above-mentioned the 1st and the 2nd electrically insulating base and above-mentioned plate body are carried out position alignment, stacked, so that the flip-chip of above-mentioned the 1st electrically insulating base has been installed the interarea of the interarea of above-mentioned semiconductor chip towards above-mentioned plate body, make above-mentioned the 2nd electrically insulating base formation the interarea of metal line towards another interarea of above-mentioned plate body; And
Operation (g), pass through heating and pressurizing, the the above-mentioned the 1st and the 2nd electrically insulating base is bonded on the above-mentioned plate body, in above-mentioned plate body, bury underground above-mentioned semiconductor chip carry out integrated, and the conductive paste that solidifies above-mentioned plate body and constitute by above-mentioned electroconductive resin constituent.
20, according to each the described semiconductor device in the claim 16 to 19, the formation method of the gold on above-mentioned electrode terminal surface is metallide, evaporation or sputter.
21, semiconductor device according to claim 19, above-mentioned the 3rd electrically insulating base is made of the mixture that comprises above-mentioned inorganic filler and heat reactive resin.
Claims (21)
1, a kind of semiconductor device is characterized in that,
At the mounted on surface semiconductor chip of the electrically insulating base with a plurality of metal lines, the part of above-mentioned at least a plurality of metal lines is covered by resin;
The surface of metal line in being formed at a plurality of metal lines of above-mentioned electrically insulating base, that be electrically connected with above-mentioned semiconductor chip at least forms the gold layer;
The surface of metal line in being formed at a plurality of metal lines of above-mentioned electrically insulating base, that contact with above-mentioned resin forms roughness.
2, semiconductor device according to claim 1, the installation of above-mentioned semiconductor chip are that flip-chip is installed, and sealing resin is between the electrode terminal face of the element electrode face of above-mentioned semiconductor chip and above-mentioned electrically insulating base.
3, semiconductor device according to claim 1,
The installation of above-mentioned semiconductor chip is that wire-bonded is installed;
The interarea opposite of above-mentioned semiconductor chip with the element electrode face, the interarea of installing with the wire-bonded of above-mentioned electrically insulating base engages, and the resin die casting is carried out in above-mentioned semiconductor chip, above-mentioned wire-bonded mounting portion.
4, semiconductor device according to claim 1,
Above-mentioned semiconductor chip the has been stacked stacked semiconductor chip of a plurality of semiconductor chips;
This semiconductor device comprises the electrically insulating base with the interarea that has formed a plurality of metal lines, and these a plurality of metal lines comprise the electrode terminal that wire-bonded has been installed above-mentioned stacked semiconductor chip;
The interarea opposite of a semiconductor chip in the above-mentioned stacked semiconductor chip with the element electrode face, the interarea of installing with the wire-bonded of above-mentioned electrically insulating base engages, and the resin die casting is carried out in above-mentioned stacked semiconductor chip, above-mentioned wire-bonded mounting portion.
5, according to the semiconductor device described in the claim 1,
Above-mentioned semiconductor chip the has been stacked stacked semiconductor chip of a plurality of semiconductor chips;
This semiconductor device comprises electrically insulating base, and this electrically insulating base has the interarea that has formed a plurality of metal lines, and these a plurality of metal lines comprise that wire-bonded is installed and flip-chip has been installed the electrode terminal of above-mentioned stacked semiconductor chip;
Sealing resin has been installed at flip-chip between the electrode terminal face of the element electrode face of semiconductor chip of above-mentioned stacked semiconductor chip and above-mentioned electrically insulating base;
The resin die casting is carried out in above-mentioned stacked semiconductor chip, above-mentioned wire-bonded mounting portion.
6, according to the semiconductor device described in the claim 1,
The installation of above-mentioned semiconductor chip is that flip-chip is installed,
This semiconductor device comprises:
Flip-chip has been installed the 1st electrically insulating base of above-mentioned semiconductor chip;
The 2nd electrically insulating base with the interarea that has formed a plurality of metal lines;
Configuration and have interarea that has formed a plurality of metal lines and the 3rd electrically insulating base that constitutes by the mixture that comprises inorganic filler and heat reactive resin between above-mentioned the 1st electrically insulating base and above-mentioned the 2nd electrically insulating base; And
The filling that in above-mentioned the 3rd electrically insulating base, forms the interior bone of electroconductive resin constituent;
Sealing resin is between the electrode surface of the element electrode face of above-mentioned semiconductor chip and above-mentioned the 1st electrically insulating base;
The the above-mentioned the 1st and the 2nd electrically insulating base becomes one by above-mentioned the 3rd electrically insulating base;
At least a portion metal line of above-mentioned the 1st～the 3rd electrically insulating base is electrically connected by above-mentioned interior bone.
7, according to each described semiconductor device in the claim 1 to 6, in the metal line of the interarea that above-mentioned semiconductor chip has been installed, be formed with the gold layer on a part of surface of the above-mentioned metal line that comprises above-mentioned electrode terminal surface, roughened is carried out on the surface of other metal line.
8,, utilize at least a method of from plated by electroless plating, metallide, evaporation or sputter, selecting to form above-mentioned gold layer according to each described semiconductor device in the claim 1 to 7.
9, according to claim 2,5 or 6 described semiconductor device, by using the some thermal pressure welding methods in anisotropic conductive film, anisotropic conductive cream, non-conductive junction film, the non-conductive soldering paste, perhaps utilize the ultrasonic wave of gold bump that on the element electrode of above-mentioned semiconductor chip, forms and the gold that forms on the electrode terminal surface of electrically insulating base to engage, carry out the flip-chip of above-mentioned semiconductor chip and install.
10, according to each described semiconductor device in the claim 1 to 9, above-mentioned metal line comprises the copper of surface roughening.
11, according to each described semiconductor device in the claim 1 to 10, above-mentioned surface of metal wiring roughness is, in 10 scopes that mean roughness Rz is 1～10 μ m of JIS B 0601 record.
12, semiconductor device according to claim 6, the inorganic filler content of above-mentioned the 3rd electrically insulating base are the scope of 70 weight %～95 weight %.
13, according to claim 6 or 12 described semiconductor device, above-mentioned inorganic filler comprises from Al
2O
3, MgO, BN, AlN and SiO
2The middle at least a inorganic filler of selecting.
14, according to claim 6 or 12 described semiconductor device, above-mentioned heat reactive resin comprises at least a heat reactive resin of selecting from epoxy resin, phenolic resins and hydrogen acid ether (hydrogen acid ester) resin.
15, semiconductor device according to claim 6, above-mentioned electroconductive resin constituent comprises the metallic that contains at least a metal of selecting as conductive compositions from gold, silver, copper and nickel, and comprises epoxy resin as resinous principle.
16, a kind of manufacture method of semiconductor device comprises:
Operation (a) is prepared semiconductor chip and electrically insulating base, and this electrically insulating base has the interarea that has formed metal line, and above-mentioned metal line comprises flip-chip and the electrode terminal of above-mentioned semiconductor chip has been installed and had a plurality of surfaces through roughened;
Operation (b) by photoetching method, has been installed part interarea, beyond the above-mentioned electrode terminal of above-mentioned semiconductor chip at the flip-chip of above-mentioned electrically insulating base, form photoresist;
Operation (c), the interarea that the flip-chip of above-mentioned electrically insulating base is installed carries out the electroless plating gold, after above-mentioned electrode terminal surface forms gold, removes photoresist; And
Operation (d) between the electrode terminal face of the element electrode face of above-mentioned semiconductor chip and above-mentioned electrically insulating base, by sealing resin, is installed in above-mentioned semiconductor chip flip-chip on the above-mentioned electrically insulating base.
17, a kind of manufacture method of semiconductor device comprises:
Operation (a) is prepared semiconductor chip and electrically insulating base, and this electrically insulating base has the interarea that has formed metal line, and above-mentioned metal line comprises wire-bonded and the electrode terminal of above-mentioned semiconductor chip has been installed and had a plurality of surfaces through roughened;
Operation (b), part interarea, beyond the above-mentioned electrode terminal that above-mentioned semiconductor chip has been installed in the wire-bonded of above-mentioned electrically insulating base forms photoresist;
Operation (c), the interarea that the wire-bonded of above-mentioned electrically insulating base is installed carries out the electroless plating gold, after above-mentioned electrode terminal surface forms gold, removes photoresist;
Operation (d), the interarea that the face with being formed with element electrode of above-mentioned semiconductor chip is opposite is bonded on the above-mentioned electrically insulating base;
Operation (e), wire-bonded is installed above-mentioned semiconductor chip on above-mentioned electrically insulating base; And
Operation (f) is carried out the resin die casting to above-mentioned semiconductor chip and above-mentioned wire-bonded mounting portion.
18, according to the manufacture method of claim 16 or 17 described semiconductor device, install or flip-chip is installed and wire-bonded is installed by wire-bonded, on above-mentioned electrically insulating base, installed the stacked semiconductor chip of a plurality of semiconductor chips stacked.
19, a kind of manufacture method of semiconductor device comprises:
Operation (a), prepare semiconductor chip, the 1st electrically insulating base, have the 2nd electrically insulating base of the interarea that has formed a plurality of metal lines and as the plate body of the 3rd electrically insulating base that constitutes by the mixture that comprises inorganic filler and heat reactive resin, the 1st electrically insulating base has the interarea that has formed metal line, and this metal line comprises flip-chip and the electrode terminal of above-mentioned semiconductor chip has been installed and had a plurality of surfaces through roughened;
Operation (b) by photoetching method, has been installed part interarea, beyond the above-mentioned electrode terminal of above-mentioned semiconductor chip at the flip-chip of above-mentioned the 1st electrically insulating base, form photoresist;
Operation (c), the interarea that the flip-chip of above-mentioned the 1st electrically insulating base is installed carries out the electroless plating gold, after above-mentioned electrode terminal surface forms gold, removes photoresist;
Operation (d) between the electrode terminal face of the element electrode face of above-mentioned semiconductor chip and above-mentioned electrically insulating base, by sealing resin, is installed in above-mentioned semiconductor chip flip-chip on the above-mentioned electrically insulating base;
Operation (e) forms through hole in above-mentioned plate body, fill the conductive paste that is made of the electroconductive resin constituent in above-mentioned through hole;
Operation (f), the the above-mentioned the 1st and the 2nd electrically insulating base and above-mentioned plate body are carried out position alignment, stacked, so that the flip-chip of above-mentioned the 1st electrically insulating base has been installed the interarea of the interarea of above-mentioned semiconductor chip towards above-mentioned plate body, make above-mentioned the 2nd electrically insulating base formation the interarea of metal line towards another interarea of above-mentioned plate body; And
Operation (g), pass through heating and pressurizing, the the above-mentioned the 1st and the 2nd electrically insulating base is bonded on the above-mentioned plate body, in above-mentioned plate body, bury underground above-mentioned semiconductor chip carry out integrated, and the conductive paste that solidifies above-mentioned plate body and constitute by above-mentioned electroconductive resin constituent.
20, according to each the described semiconductor device in the claim 16 to 19, the formation method of the gold on above-mentioned electrode terminal surface is metallide, evaporation or sputter.
21, semiconductor device according to claim 19, above-mentioned the 3rd electrically insulating base is made of the mixture that comprises above-mentioned inorganic filler and heat reactive resin.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP084656/2005 | 2005-03-23 | ||
| JP2005084656 | 2005-03-23 |
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|---|---|
| CN1943029A true CN1943029A (en) | 2007-04-04 |
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ID=37023583
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA2006800001258A Pending CN1943029A (en) | 2005-03-23 | 2006-03-08 | Semiconductor device and method for manufacturing same |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JPWO2006100909A1 (en) |
| KR (1) | KR20070117991A (en) |
| CN (1) | CN1943029A (en) |
| WO (1) | WO2006100909A1 (en) |
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| JP3381602B2 (en) * | 1998-01-27 | 2003-03-04 | 松下電器産業株式会社 | Electronic component manufacturing method |
| JP2000236037A (en) * | 1999-02-15 | 2000-08-29 | Sumitomo Metal Mining Co Ltd | Solder resist forming method |
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| JP2002184811A (en) * | 2000-12-11 | 2002-06-28 | Sony Corp | Electronic circuit device and its manufacturing method |
| JP3547423B2 (en) * | 2000-12-27 | 2004-07-28 | 松下電器産業株式会社 | Component built-in module and manufacturing method thereof |
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- 2006-03-08 KR KR1020067019136A patent/KR20070117991A/en not_active Application Discontinuation
- 2006-03-08 WO PCT/JP2006/304443 patent/WO2006100909A1/en active Application Filing
- 2006-03-08 JP JP2006526475A patent/JPWO2006100909A1/en active Pending
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Also Published As
| Publication number | Publication date |
|---|---|
| WO2006100909A1 (en) | 2006-09-28 |
| JPWO2006100909A1 (en) | 2008-09-04 |
| KR20070117991A (en) | 2007-12-13 |
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