CN1921578B - Storage space extending circuit and television within this extending circuit - Google Patents
Storage space extending circuit and television within this extending circuit Download PDFInfo
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- CN1921578B CN1921578B CN200610068651XA CN200610068651A CN1921578B CN 1921578 B CN1921578 B CN 1921578B CN 200610068651X A CN200610068651X A CN 200610068651XA CN 200610068651 A CN200610068651 A CN 200610068651A CN 1921578 B CN1921578 B CN 1921578B
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Abstract
The invention relates to a memory space expanding circuit and a relative television. Wherein, it comprises a main chip via two I/O ports connected to the data input and output of serial FLASH chip; the main chip via its address signal end and data signal end is connected to the address end and data end of expanding memory. The invention uses serial flash connection to replace parallel flash connection, to save the port resource, used to other memory chips to effectively expand the memory space of television. And it has simple circuit.
Description
Technical field
The present invention relates to a kind of expanded circuit of memory space, specifically, relate to a kind of interface circuit that TV set circuit is expanded the memory space of system that is used for.
Background technology
Along with the continuous maturation of liquid crystal technology, the improving constantly of quality, the continuous reduction of cost, liquid crystal TV set has been come into average family gradually, becomes the main flow in panel TV market.Continuous aggravation along with market competition, LCD TV not only is confined to realize the aspect such as attractive in appearance of raising, the appearance and modeling of reception, the image audio quality of TV programme, and its cost performance has been proposed renewal, higher requirement, the product of high performance-price ratio often has more competitiveness on market.Selection for storage size in the liquid crystal TV set, different markets have different demands with the client, such as: domestic machine appellative function is less, only need to realize basic function, as video standard PAL and sound accompaniment D/K etc., at this moment only need to adopt the memory space of master chip inside just can meet the demands.But,, need the function of realization more, as video standard: PAL, SECAM etc. for the television set that exports to areas such as Europe; Sound accompaniment standard: D/K, B/G, M/N, I, L/L ' etc.; And function information such as picture and text, beautiful sound all needs memory space to store, and this just needs television set to have bigger memory space, at this moment just need expand the memory space of master chip.
For existing television set memory circuit, generally all be to connect the storage that EEPROM and parallel FLASH chip come realization program and data, as shown in Figure 1 by periphery at master chip.Master chip is example with FLI8125, multiple functions such as microcontroller, video processor, Video Decoder and ADC transducer that the FLI8125 chip internal is integrated.TV, AV and high-definition image signal are input among the master chip FLI8125, through exporting after ADC, video decode, the Video processing.Wherein, EEPROM links to each other with master chip FLI8125 by iic bus, is used for memory system data.The FLASH memory adopts parallel FLASH chip to realize, is used for storing the working procedure of master chip FLI8125 microcontroller.Flash chip MX29LV040 with the 4M bit of MXIC company is an example, and master chip FLI8125 carries out communication by address wire OCMADDR0~OCMADDR18 and data wire OCMDATA0~OCMDATA7 and parallel FLASH.In addition, master chip FL18125 also connects the corresponding control pin of parallel FLASH chip by chip selection signal line ROM_CSN, enable signal line ROM_OEN and write signal line ROM_WEN, to realize the reliable communicating of two chip chamber data.
Can expand the memory space of television set inside though the circuit design mode of EEPROM and parallel FLASH chip is set up in employing in the master chip periphery, some export to the call data storage of the multi-function TV set in areas such as Europe to satisfy at present.But, continuous development along with tv product, realize the diversification day by day of function, the inner data of storage and the program of needing of television set also gets more and more, and for existing memory circuit, parallel FLASH chip has taken a large amount of port resources of master chip, master chip has not had unnecessary port to connect other storage chip, therefore, this memory circuit structure can't satisfy the storage to the data that expand day by day gradually, this also to tv product in the future function expansion played serious restriction.The method of present head it off: the one, realize the saving of memory space by software algorithm; The 2nd, realize itself and being connected of multi-memory more by the master chip that adopts more port resource.All there is drawback to a certain degree in these two kinds of implementation methods, adopt software algorithm, its programming complexity, and system's operation stability is poor; Employing has the master chip of more port resource, and its cost raises significantly, is unfavorable for improving the market competitiveness of household appliances.
Summary of the invention
Thereby the present invention takies the problem that the expansions that make memory space of master chip port resource are restricted more in order to solve in the prior art parallel FLASH chip, a kind of novel TV machine memory space expanded circuit is provided, adopt simple circuit configuration to realize the further expansion of television set memory space, for television set in the future function expansion hardware supports is provided.
For solving the problems of the technologies described above, the present invention is achieved by the following technical solutions:
A kind of memory space expanded circuit and have the television set of described expanded circuit comprises master chip, and described master chip is by data input pin with data output end corresponding be connected of two I/O mouth with a serial FLASH chip; Master chip is by its address signal end and address end with data terminal corresponding be connected of data-signal end with extended menory.
In addition, the clock signal output terminal of described master chip connects the clock end of serial FLASH chip, and master chip utilizes an one I/O mouth output chip selection signal to connect the sheet choosing end of described serial FLASH chip.Described master chip is exported chip selection signal, enable signal and write signal respectively by its 3 different I/O mouths, selects end, Enable Pin with the sheet of described extended menory respectively and writes that control end is corresponding to be connected.
In order to save the I/O mouth resource of master chip as much as possible, one of them address end of the data input pin of described serial FLASH chip and extended menory is an I/O mouth of multiplexing master chip simultaneously; The sheet choosing end of the sheet choosing end of serial FLASH chip and extended menory is an I/O mouth one by one of multiplexing master chip simultaneously; An I/O mouth writing multiplexing master chip of control end while of the data output end of serial FLASH chip and extended menory; Described master chip is by internal processes control serial FLASH chip and extended menory time-sharing work.
Port resource according to master chip utilizes situation and needs data quantity stored size, described extended menory can be selected one or more, according to the different mining of extended menory the type connected mode of parallel or serial and the corresponding connection of I/O mouth of master chip, finish the data communication between master chip and the extended menory.
Compared with prior art, advantage of the present invention and good effect are: the present invention passes through the parallel FLASH connected mode of abandoning tradition, and adopts the serial FLASH connected mode, thereby has effectively saved the port resource of master chip.On the basis that does not change original low-cost master chip, be used for connecting other memory chip with saving the port resource that comes out in the master chip, not only realized effective expansion of television set memory space, provide the necessary hardware support the enhancing of television set function; And described memory space expanded circuit is simple in structure, is convenient to be transplanted in the high-end television sets, has helped to improve the cost performance and the market competitiveness of tv product.
Description of drawings
Fig. 1 is existing memory space expanded circuit block diagram;
Fig. 2 is a memory space expanded circuit theory diagram proposed by the invention;
Fig. 3 is the pin connection layout between serial FLASH chip and the master chip;
Fig. 4 is the pin connection layout between extended menory and the master chip;
Fig. 5 is the pin connection layout of master chip.
Embodiment
Below in conjunction with the drawings and specific embodiments the present invention is done explanation in further detail.
Along with the continuous development of electronic technology, at present the development rate of tv product is also more and more faster, and except guaranteeing product quality, product cost and speed to introduce have often also become to judge the key factor that product is whether successful.Therefore, just must consider compatible design, reduce product cost, improve development efficiency at different functions at the initial stage of product design planning.
It is that basic engineering forms that memory space extended mode proposed by the invention is based on the low-cost Video processing master chip that generally adopts in the existing television set, and its circuit theory diagrams are referring to shown in Figure 2.The low-cost video frequency processing chip FLI8125 that produces with GENESIS company is that example is specifically addressed.FLI8125 video frequency processing chip N8 has that cost is low, integrated level is high, the congruent characteristics of function, can be widely used in the various Core of TV set circuit, it is a kind of vision signal processing main chip that extensively adopts in the present TV set circuit, its shortcoming is exactly that port resource is limited, is unfavorable for the expansion of peripheral circuit.The present invention is in order to save circuit cost, make full use of the limited port resource of existing Video processing master chip N8, abandoned traditional parallel FLASH connected mode, and the serial FLASH connected mode that work proposes among employing the present invention, utilize two I/O mouth 96 pin of master chip N8,97 pin are connected with data output end SO is corresponding with the data input pin SI of serial FLASH chip N12 respectively with data input pin as data output end, the 4M bit flash chip that serial FLASH chip N12 of the present invention is SST25VF040 with the model is that example is realized, the concrete annexation of itself and master chip N8 is referring to Fig. 3, shown in Figure 5.Master chip N8 is by its 95 pin clock signal, the clock end SCK that connects serial FLASH chip N12, master chip N8 utilizes one I/O mouth 94 a pin output chip selection signal to connect the sheet choosing end CE of described serial FLASH chip N12, under the control action of chip selection signal and clock signal, finish the reliable communicating of data between master chip N8 and the serial FLASH chip N12.
In order to realize further expanding of memory space, the I/O mouth of the master chip N8 that utilization saves out connects the SRAM memory N11 of a 4M bit.The present invention is that example is set forth with the K6X4008T1F storage chip COMS SRAM of Samsung, and the physical circuit annexation between itself and the master chip N8 is referring to Fig. 4, shown in Figure 5.Master chip N8 connects 8 road I/O mouth I/O0~I/O7 of SRAM memory N11 respectively as 8 circuit-switched data signal end OCMDATA0~OCMDATA7 by its 8 road I/O mouth, 123~132 pin, 17 tunnel address end A0~A16 of SRAM memory N11 respectively with the corresponding connection of 17 road address signal output OCMADDR0~OCMADDR16 of master chip N8, sheet choosing end CE1, the Enable Pin OE of SRAM memory N11 with write control end WE respectively with master chip N8 94,118,97 pin is corresponding is connected.Under the control action of chip selection signal, enable signal and write control signal, by the data communication between address signal end and data-signal end realization master chip N8 and the SRAM memory N11.
In order to save the I/O mouth resource of master chip N8 as much as possible, one of them address end A16 of the data input pin SI of described serial FLASH chip N12 and SRAM memory N11 is I/O mouth 96 pin of multiplexing master chip N8 simultaneously; The sheet choosing end CE1 of the sheet choosing end CE of serial FLASH chip N12 and SRAM memory N11 is I/O mouth 94 pin of multiplexing master chip N8 simultaneously; I/O mouth 97 pin writing multiplexing master chip N8 of control end WE while of the data output end SO of serial FLASH chip N12 and SRAM memory N11; Described master chip N8 is by internal processes control serial FLASH chip N12 and SRAM memory N11 time-sharing work.
Port resource according to master chip N8 utilizes situation and needs data quantity stored size, described extended menory can be selected one or more, according to the different mining of extended menory the type connected mode of parallel or serial and the corresponding connection of I/O mouth of master chip N8, finish the data communication between master chip N8 and the extended menory.
The present invention is by adopting above-mentioned interface circuit mode, realized the memory space expansion on low side TV scheme, can make the low side TV adapt to the bigger market demand on the one hand, can promote this interface mode on the other hand to high-end TV, thereby reduced the complete machine cost, improved the market competitiveness of tv product.
Certainly; above-mentioned explanation is not to be limitation of the present invention; the present invention also is not limited in above-mentioned giving an example, and variation, remodeling, interpolation or replacement that those skilled in the art are made in essential scope of the present invention also should belong to protection scope of the present invention.
Claims (4)
1. memory space expanded circuit, comprise master chip, described master chip is by data input pin with data output end corresponding be connected of two I/O mouth with a serial FLASH chip, the clock signal output terminal of described master chip connects the clock end of described serial FLASH chip, and described master chip utilizes an one I/O mouth output chip selection signal to connect the sheet choosing end of described serial FLASH chip; Described master chip is also by its address signal end and address end with data terminal corresponding be connected of data-signal end with an extended menory; It is characterized in that: one of them address end of the data input pin of described serial FLASH chip and described extended menory is an I/O mouth of multiplexing master chip simultaneously; The sheet choosing end of the sheet choosing end of described serial FLASH chip and extended menory is an I/O mouth of multiplexing master chip simultaneously; An I/O mouth writing multiplexing master chip of control end while of the data output end of described serial FLASH chip and extended menory; Described master chip is controlled described serial FLASH chip and described extended menory time-sharing work by internal processes.
2. memory space expanded circuit according to claim 1, it is characterized in that: described extended menory comprises one or more, according to the different mining of extended menory the type connected mode of parallel or serial and the corresponding connection of I/O mouth of master chip, finish the data communication between master chip and the extended menory.
3. television set with the described memory space expanded circuit of claim 1, comprise master chip, described master chip is by data input pin with data output end corresponding be connected of two I/O mouth with a serial FLASH chip, the clock signal output terminal of described master chip connects the clock end of described serial FLASH chip, and described master chip utilizes an one I/O mouth output chip selection signal to connect the sheet choosing end of described serial FLASH chip; Described master chip is also by its address signal end and address end with data terminal corresponding be connected of data-signal end with an extended menory; It is characterized in that: one of them address end of the data input pin of described serial FLASH chip and described extended menory is an I/O mouth of multiplexing master chip simultaneously; The sheet choosing end of the sheet choosing end of described serial FLASH chip and extended menory is an I/O mouth of multiplexing master chip simultaneously; An I/O mouth writing multiplexing master chip of control end while of the data output end of described serial FLASH chip and extended menory; Described master chip is controlled described serial FLASH chip and described extended menory time-sharing work by internal processes.
4. television set according to claim 3, it is characterized in that: described extended menory comprises one or more, according to the different mining of extended menory the type connected mode of parallel or serial and the corresponding connection of I/O mouth of master chip, finish the data communication between master chip and the extended menory.
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CN200610068651XA CN1921578B (en) | 2006-09-01 | 2006-09-01 | Storage space extending circuit and television within this extending circuit |
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CN104363448A (en) * | 2014-12-01 | 2015-02-18 | 重庆洪深现代视声技术有限公司 | Television signal generator |
CN110083557B (en) * | 2019-05-05 | 2023-07-14 | 南京沁恒微电子股份有限公司 | Method for accessing FLASH at high speed and SOC system |
Citations (5)
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CN2438175Y (en) * | 2000-03-29 | 2001-07-04 | 王卫海 | Miniature imbedded web server |
CN1437113A (en) * | 2002-02-08 | 2003-08-20 | 华为技术有限公司 | Guide memory and its construction method and usage |
CN1477519A (en) * | 2002-08-20 | 2004-02-25 | 深圳市中兴通讯股份有限公司上海第二 | Address space optimization method of processor |
CN2730053Y (en) * | 2004-07-21 | 2005-09-28 | 烟台视话宝软件科技有限公司 | Video telephone set combined with TV |
CN1725849A (en) * | 2004-07-21 | 2006-01-25 | 烟台视话宝软件科技有限公司 | TV. picturephone |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN2438175Y (en) * | 2000-03-29 | 2001-07-04 | 王卫海 | Miniature imbedded web server |
CN1437113A (en) * | 2002-02-08 | 2003-08-20 | 华为技术有限公司 | Guide memory and its construction method and usage |
CN1477519A (en) * | 2002-08-20 | 2004-02-25 | 深圳市中兴通讯股份有限公司上海第二 | Address space optimization method of processor |
CN2730053Y (en) * | 2004-07-21 | 2005-09-28 | 烟台视话宝软件科技有限公司 | Video telephone set combined with TV |
CN1725849A (en) * | 2004-07-21 | 2006-01-25 | 烟台视话宝软件科技有限公司 | TV. picturephone |
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Address after: 266071 Shandong city of Qingdao province Jiangxi City Road No. 11 Patentee after: HISENSE Co.,Ltd. Patentee after: Hisense Visual Technology Co., Ltd. Address before: 266071 Shandong city of Qingdao province Jiangxi City Road No. 11 Patentee before: HISENSE Co.,Ltd. Patentee before: QINGDAO HISENSE ELECTRONICS Co.,Ltd. |