CN1909255A - 多向性发光二极管 - Google Patents
多向性发光二极管 Download PDFInfo
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- CN1909255A CN1909255A CNA200510089384XA CN200510089384A CN1909255A CN 1909255 A CN1909255 A CN 1909255A CN A200510089384X A CNA200510089384X A CN A200510089384XA CN 200510089384 A CN200510089384 A CN 200510089384A CN 1909255 A CN1909255 A CN 1909255A
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
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- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/32257—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic the layer connector connecting to a bonding area disposed in a recess of the surface of the item
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49107—Connecting at different heights on the semiconductor or solid-state body
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- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
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Abstract
本发明涉及一种多向性发光二极管,包括:一支架、至少一芯片、至少二连结导线,以及一将上述各元件包覆成型的透光物质,其中该芯片通过连结导线与支架连结,令芯片呈悬空状,再借助透光物质将连结成一体的芯片、连结导线以及支架局部包覆起;由此,以完成一可发出360度全方位光线的发光二极管。
Description
技术领域
本发明涉及一种可发出360度全方位光线的多向性发光二极管,适用于发光二极管或类似结构。
背景技术
由于发光二极管具有耗电量低、寿命长等优点,故发光二极管多半用于电子产品指示用途。
一般而言,现有发光二极管结构,请参图7,主要设有一具凹槽A1的基座A,该凹槽A1内结合有一芯片B,该芯片B再通过一连结线C与另一支架D连结,最后再借助一透光层E的注塑成型,将基座A、芯片B、连结线C及另一支架D结合为一体,完成发光二极管的制作。
然而,上述传统的发光二极管接通电源时,由于芯片被结合于基座的凹杯中,该芯片周缘及底面所发射的光均被凹杯阻挡、反射,故该芯片仅发出正向光,于该发光二极管的背侧无法看到其所发出的光。
亦或借助表面黏着技术(Surface Mount,SMT)直接将芯片电性连接于印刷电路板上,如日本公开特许公报特开平5-327026、特开2000-223752,如图8、9所示,该电路板通电后,该芯片虽可达五面(前、后、左、右、上)发光,但其底面仍无法发光。
发明内容
本发明的主要目的在于克服现有技术的不足与缺陷,提出一种可360度发光、无论以何种角度均可视其所发出的光的多向性发光二极管。
为达上述目的,本发明提供一种多向性发光二极管,包括:
至少一支架;
至少一发光芯片,该芯片的正、负极设于顶面,而其底部基板为透明的;
至少二供连结发光芯片及支架的连结导线;以及
一将上述各元件包覆成型的透光物质,使芯片仅通过透光物质的包覆而呈悬空状,由此令芯片360度全方位发光。以完成一可发出360度全方位光线的发光二极管。
本发明的其它特点及具体实施例可于以下配合附图的详细说明中,进一步了解。
附图说明
图1为本发明实施例的剖视图;
图2为本发明芯片的立体外观图;
图3为本发明实施例的使用示意剖视图;
图4为本发明实施例的使用示意俯视图;
图5为本发明另一实施例的立体外观图;
图6为图5的剖视图;
图7为现有发光二极管的侧视图;
图8为日本特开平5-327026号发光二极管的侧视图;
图9为日本特开2000-223752号发光二极管的侧视图。
图中符号说明
1 发光二极管
10 电路板
11 导电物质 12 穿孔
20 芯片 21 发光层
30 连结导线
40 透光物质
A 基座 A1 凹杯
B 芯片 C 连接线
D 支架 E 透光层
具体实施方式
请参图1,为本发明的第一实施例,该发光二极管1主要设有二可导电的支架、一发光芯片20、二连结导线30以及一透光物质40,该二支架结构相同,仅以一支架说明,该支架由一小型电路板10构成,该电路板10外覆有导电物质11,该导电物质选自金、银、锡、铬、镍和合金中的任一组群,而将该二支架相对置放,并将芯片20置于二相对置设的支架之间,该芯片20的正极与负极需设于同一面,如图2所示,而该芯片20的发光层21设于中间,且底部基板(substrate)需为透明的,同时通过二连结导线30连结芯片20及二支架的导电物质11,最后再借助一透光物质40一并将二支架局部(结合有连结导线30的部位)、芯片20及二连结导线30包覆成型,令该芯片20呈悬空设置,以完成本发明的组装。
使用时,将本发明发光二极管1的二支架一侧连接正电,另一侧连接负电,令芯片20受电流激发而发光,由于该芯片20呈悬空状,其周围未设有阻挡芯片20光线的阻挡物,故该芯片20所发出的光可360度发射,请同时参附图3~4,因此,该发光二极管1无论由何种角度观之,其所发射的光均可清楚视之,如此即可达一般钨丝灯泡的功效,而可进一步取代钨丝灯泡。
请参图5~6,为本发明的第二实施例,设有一支架,该支架由一电路板10所构成,该电路板10的底缘左右二侧设有穿孔12,该二穿孔12内可供焊锡点设,方便借助表面黏着技术(Surface Mount,SMT)直接将电路板10电性连接,而该电路板10前端面的相对二侧各设有一导电物质11,二导电物质11之间设为绝缘,且该芯片20以倒置的方式,悬空置设于电路板10上方,此时,该芯片20的电极与电路板10的二导电物质11置于相同侧,通过二连结导线30将芯片20与二导电物质11连接,最后再以一透光物质40将芯片20、二连结导线30及支架上段局部包覆成型,以完成组装。
由上可知,本发明的装置具有如下实用优点:
1、令发光芯片呈悬空状设置,使发光芯片周缘无阻挡物阻挡、限制其发光范围,进一步令发光二极管可全向发光。
2、该发光芯片借助透光物质直接包覆成型,有别于现有结构将芯片借助黏合胶剂结合于基座上或其上的凹杯中,令现有的发光二极管仅能发出正向光的缺陷。
3、通过芯片的悬空设置,令该发光二极管不论以何种角度观之,该芯片所发射出的光均可视之。
4、并无借助任何黏着胶剂将芯片黏结于导电支架上,使芯片上没有任何一面受黏着胶剂阻挡发光。
以上所述,仅为本发明的较佳实施例,当不能用以限定本发明可实施的范围,凡本领域技术人员所明显可作变化与修饰,皆应视为不悖离本发明的实质内容。
Claims (5)
1.一种多向性发光二极管,其特征在于,包括:
至少一支架;
至少一发光芯片,该芯片的正、负极设于顶面,而其底部基板为透明的;
至少二供连结发光芯片及支架的连结导线;以及
一将上述各元件包覆成型的透光物质,使芯片仅通过透光物质的包覆而呈悬空状,由此令芯片360度全方位发光。
2.如权利要求1所述的多向性发光二极管,其中,该支架的数量设为二,由二电路板外覆导电物质所形成,且该二支架呈相对设置。
3.如权利要求1所述的多向性发光二极管,其中,该支架由一电路板构成,该电路板前端面的相对二侧各设有一导电物质,该二导电物质之间呈绝缘。
4.如权利要求2或3所述的多向性发光二极管,其中,该导电物质选自金、银、锡、铬、镍和合金中的任一组群。
5.如权利要求1所述的多向性发光二极管,其中,该透光物质将芯片、连结导线完全包覆,而对支架则为局部包覆。
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103453357A (zh) * | 2012-05-29 | 2013-12-18 | 璨圆光电股份有限公司 | 发光组件 |
US9261242B2 (en) | 2010-09-08 | 2016-02-16 | Zhejiang Ledison Optoelectronics Co., Ltd. | LED light bulb and LED light-emitting strip being capable of emitting 4TT light |
-
2005
- 2005-08-05 CN CNA200510089384XA patent/CN1909255A/zh active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9261242B2 (en) | 2010-09-08 | 2016-02-16 | Zhejiang Ledison Optoelectronics Co., Ltd. | LED light bulb and LED light-emitting strip being capable of emitting 4TT light |
DE202011110805U1 (de) | 2010-09-08 | 2016-07-14 | Zhejiang Ledison Optoelectronics Co., Ltd. | Led-glühbirne |
CN103453357A (zh) * | 2012-05-29 | 2013-12-18 | 璨圆光电股份有限公司 | 发光组件 |
CN103453357B (zh) * | 2012-05-29 | 2017-04-12 | 晶元光电股份有限公司 | 发光组件 |
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