CN1815724A - 一种使对焊料凸点的电迁移损坏最小化的布线设计 - Google Patents

一种使对焊料凸点的电迁移损坏最小化的布线设计 Download PDF

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CN1815724A
CN1815724A CNA200510132261XA CN200510132261A CN1815724A CN 1815724 A CN1815724 A CN 1815724A CN A200510132261X A CNA200510132261X A CN A200510132261XA CN 200510132261 A CN200510132261 A CN 200510132261A CN 1815724 A CN1815724 A CN 1815724A
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韦恩·帕特里克·里克林
沃尔特·约翰·道克沙尔
威廉·S·格劳普
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Abstract

本发明提出了一种用于集成电路元件的新型焊盘结构，其利用用于连接到其它集成电路元件的凸点互连，该凸点互连在其凸点内产生较为均匀的电流分布。所述焊盘结构包括实现在集成电路元件的内导电层上的内焊盘，实现在集成电路元件的外导电层上的外焊盘，以及连接内外焊盘的多个通孔。优选地用钝化层沿外焊盘的边缘将其密封，所述钝化层包括露出外焊盘一部分的开口。连接内外焊盘的通孔优选地被实现为位于焊盘开口投影内的通孔区中。

Description

一种使对焊料凸点的电迁移损坏最小化的布线设计
技术领域
本发明一般涉及用于集成电路的倒装式封装技术，尤其涉及一种用于使对诸如倒装式封装中的焊料凸点之类的集成电路连接结点的电迁移损坏最小化的方法和导电线设计。
背景技术
电迁移是导体内材料的移动，它是由电流的流动引起的。电迁移可能引起导体内材料的完全耗尽，从而导致失去连续性。此现象在诸如连接倒装式管芯和衬底的焊料凸点这样的互连结点处更加明显，并且取决于电流密度(与电流密度较低时相比，电流密度较高时此现象更严重)、材料(某些材料比起其他材料更能抵抗电迁移现象)以及结构的几何形状。
电迁移是倒装式组件的高电流凸点中常见的问题，倒装式组件之所以被如此命名是因为在形成期间，管芯焊盘被形成在集成电路管芯的顶层，凸点被添加，然后管芯被“倒转”过来，并经由凸点直接连接到芯片衬底。更具体而言，参见图1和2，电路元件是利用标准制造技术形成在半导体晶片上的，并且局部互连层(由交替的金属和电介质层形成)位于离功能电路较近处，而全局互连层形成在这一系列层之上。管芯焊盘22被形成在最上方的金属层中。然后凸点被添加，并且晶片被切割成单独的集成电路管芯14，以便封装。然后单个管芯14被“倒转”过来，并通过凸点16直接附接到衬底12或板上，如图1所示。
凸点16是利用现有技术公知的工艺过程，通过包括焊料起凸(bumping)在内的几种不同工艺过程之一来形成的。图2示出了利用焊料凸点16的倒装式组件10的一部分。在焊料起凸工艺过程中，凸点下金属层(UBM)26通过溅射、镀膜或其他方式而被施加到芯片接合焊盘，以取代通常施加在顶部金属层上的绝缘钝化层24(其通常包括聚合物，例如苯并环丁烯或“BCB”)，并且规定和限制焊料浸润区域。焊料是通过蒸发、电镀、丝网印刷焊剂或浅淀积(needle-depositing)来淀积在UBM26上的。
图1示出倒装式组件10中的电流18的典型路径的示例，该倒装式组件10利用了导电凸点16，来将集成电路管芯14的焊盘(不可见)与芯片衬底12上的焊盘(不可见)互连。如图所示，典型电流路径18从衬底12上的电路(不可见)，经过凸点16a，经过管芯14上的电路(不可见)，并且最后从管芯14经过另一个凸点16b，流动到衬底12上的其他电路(不可见)中。凸点16是电流路径18中通常最易受电迁移损坏所影响的要素，这是因为其材料(通常是焊料)以及电流必须改变方向这一事实。
如图2中更详细所示，流经管芯14内的导电线20和焊盘22的电流必须改变方向，以便经过开口25，经过导电的衬底到凸点接口(以下称为UBM)26，经过凸点16自身，最后流进衬底焊盘28中。如图2中虚线箭头15所示，这一转弯使得电流“拥挤”在凸点16的上游侧，从而导致了拥挤位置处较高的电流密度J。电迁移条件下的平均无故障时间(MTTF)一般近似为
MTTF ∝ A J n
其中A包含了温度和其他因素的影响，对于铅焊料，幂n处于1至2的范围中。与电流均匀分布在凸点16中时发生的故障相比，电流密度J的高局部值可能导致的故障从时间上来说过早。
改善凸点互连中的电迁移是许多研究的主题。一种现有技术方案包括对高电流凸点使用“总线”结构，以便限制用于总线的一个或多个金属层内的可布线区域。
凸点的截面积影响凸点中的电迁移速率。凸点截面积部分地是由凸点与凸点之间的间距所规定的，较高的间距通常允许较大的凸点截面积。但是，随着对于更小且更快的封装的竞争，趋势已经开始朝向缩小凸点与凸点之间的间距了。从而，未来的凸点可能具有更小的截面，导致了凸点中电流密度更高的问题。
对用于实现凸点的材料的选择也可成为凸点的电迁移属性中的重大因素。目前，凸点材料通常是由已知表现出某种电迁移抵抗性的90％Pb(铅)焊料或者对于电迁移损坏的抵抗性小得多的铅锡共晶焊料来制成的。未来的设计可能使用无铅材料，这种材料具有未知的电迁移问题。去除材料变化之时电迁移设计限制的能力可能是重要的设计资源。
目前的设计对于高电流电路采用多个凸点。更多的抗电迁移设计可以通过在更少的凸点中承载这些高电流以降低芯片尺寸和成本，或通过释放凸点以用于其他功能，从而增强目前的构造。未来的设计也可享受这些益处。这些优点也可为较低电流信号凸点所共享，在这种凸点中，例如，导电线可被做得更窄，从而使得布线增强。
由于以上问题，需要有一种技术，用于使经过BGA或倒装式封装的凸点的电流分布均衡，以便减小由拥挤在凸点的一个区域中的电流所引起的电迁移，还需要一种产生这种效果的新型焊盘结构。
发明内容
在下文中详细描述了一种用于集成电路元件的焊盘的新型焊盘结构和电流选路设计。本发明的焊盘结构包括实现在集成电路元件的内导电层上的第一焊盘，实现在集成电路的外导电层上的第二焊盘，以及多个通孔，每个通孔将内焊盘直接连接到外焊盘。电流输送导电线连接到第一焊盘。第二焊盘或“外”焊盘被用钝化层沿其边缘密封，所述钝化层包括露出导电外焊盘的开口。导电外焊盘的露出区域在下文中称为“焊盘开口”。将内焊盘连接到外焊盘的通孔位于焊盘开口的投影(footprint)之内。这样，当电流从导电线输送到内焊盘时，每个都高于电流输送导电线阻抗的通孔阻抗使得电流分开经多个通孔流到外焊盘，从而分布了电流并降低了内焊盘处的电流拥挤。这至少导致外焊盘上观测到的最大电流密度的降低，因而降低了焊料凸点中由电流拥挤引起的电迁移损坏。利用少量另外的规划，对位于焊盘开口的投影之内的连接内焊盘和外焊盘的通孔的数目和布局进行选择，就可以优化流到外焊盘的电流，以产生较为均匀的电流密度。
更一般地说，本发明的焊盘结构可以实现在采用焊盘来连接到其它电路元件并利用交替的导电层和电介质层来加工的任何集成电路元件中。可以使用本发明的焊盘结构和布线设计的集成电路元件包括集成电路管芯、集成电路衬底、集成电路封装和印刷电路板(PCB)。
附图说明
在联系附图进行考虑的情况下参考以下详细描述，将会更充分地理解并且更完整地意识到本发明及其许多附带的优点，附图中类似的标号表示相同或类似的元件，其中：
图1是倒装式组件的截面侧视图；
图2是倒装式组件的一部分的截面侧视图，其示出了单个焊料凸点结点；
图3A是图1的倒装式组件的单个凸点结点中包含的元件的截面侧视图；
图3B是图3A的凸点结点的截面正视图；
图3C是图3A的凸点结点的等距视图；
图3D是图3A的凸点结点的俯视图；
图3E是图3A-3D的导电线和焊盘的透视图；
图4A是实现了本发明的焊盘结构的倒装式组件的一部分的截面侧视图；
图4B是图4A的焊盘结构的俯视图，其示出了在通孔区中排成示例性分布构造的多个通孔；
图5的曲线图示出了对于包含多个通孔的区域的不同直径的最大凸点电流密度；
图6的曲线图示出了受到以下因素影响的连接到本发明的焊盘结构的凸点的相对电迁移寿命的反映：包含多个通孔的区域的各种直径，以及描述电迁移寿命与最大电流密度的相关性的指数。
具体实施方式
以下详细描述一种用于集成电路元件焊盘的新设计，它试图在外部焊盘接口上实现合理地均匀的电流分布，以帮助降低连接到焊盘的结点(例如倒装式凸点)中的电迁移损坏。为了比较目的，倒装式组件中的传统现有技术焊料凸点的构造在图3A、3B、3C、3D和3E中示出。更具体而言，图3A是图1的倒装式组件10的单个凸点结点中包含的元件的截面侧视图，图3B是其截面正视图，图3C是等距视图，图3D是其俯视图。图3E是图3A-3D的导电线20和焊盘22的透视图。如图3A、3B、3C和3D所示，导电线20导电地连接到(图1的)集成电路14的最外导电线层上的焊盘22。焊盘22被覆盖上了钝化层24，该钝化层通常包括氮化物或聚合物。开口25被刻蚀到钝化层24中，UBM 26被镀在开口25以及钝化层24的一部分之上。在起凸工艺过程中，焊料附着到UBM 26上，以形成凸点16，该凸点在管芯被倒转并附接到衬底12上时，导电地连接UBM 26和衬底焊盘28。衬底焊盘28连接到衬底通孔30，以便经一定路线到达实现在衬底12上或者连接到衬底12的电路。金属层M1、...、Mn，通孔和UBM优选地是用高导电性材料实现的，层D1、...、Dn-1和48优选地是用电介质材料实现的。
在传统构造中，如图3D所示，电流沿路径18从导电线20进入焊盘22，并且如图2所示，在对焊盘22的开口附近最靠近导电线20处的表示为15的区域中，引起焊料凸点16中的最大电流密度。
在根据本发明实现的设计中，如图4A和4B所示，导电线20导电地连接到第一(或“内”)焊盘42，该内焊盘实现在管芯的内部金属层Mn上。内焊盘42导电地连接到第二(或“外”)焊盘46，该外焊盘通过通孔区44内的多个导电通孔44a-44i实现在管芯的外金属层M1上。通孔区44中的每个通孔44a-44i穿过居间的金属层Mn-1和电介质层D1、...、Dn中的每一个。外焊盘46覆盖有钝化层48。对焊盘的开口25被刻蚀在钝化层48中，并且UBM 26被镀在焊盘开口25和钝化层48的一部分之上。在起凸工艺过程中，焊料附着到UBM 26上，以形成凸点16，该凸点在管芯被倒转并附接到衬底12上时，导电地连接UBM 26和衬底焊盘28。衬底焊盘28连接到衬底通孔30，以便经一定路线到达实现在衬底12上或者连接到衬底12的电路。
实现在给定焊盘结构中的通孔44a-44i的数目将取决于特定集成电路设计的要求，焊盘中用于降低凸点16中电迁移损坏的电流分布的折衷是焊盘中的电阻更大，因而芯片的功耗更大。图4B示出了具有排成示例性均匀分布构造的多个通孔44a-44i的焊盘结构的示例性俯视图。如图所示，通孔到外焊盘46的连接位于通孔区44中，所述通孔区位于焊盘开口25的投影之内。这里所定义的“投影”与焊盘开口25同轴，并且其形状和朝向都与焊盘开口25相同，但位于外焊盘46的相反一面上。对通孔区44内的通孔44a-44i数目的选择以及相对于开口25面积的通孔区44相对面积的选择决定了凸点16内的最大电流密度。
通孔44a-44i提供了两个优点。第一是通孔44a-44i的阻抗可在设计阶段调节以获得希望的电流分布，这使得电流在直接连接到导电线20的内焊盘42内更均匀地分布，从而降低焊盘结构上游位置的电流拥挤。通孔44a-44i的第二个优点是当通孔44a-44i被布置为在焊盘开口25的投影(即外焊盘到UBM的接口的投影)内进行连接时，使不利的电流集中效应最小化，所述电流集中效应是在电流从焊盘开口25投影之外的径向位置进入对UBM 26的外焊盘开口25时产生的。
使用三维有限元模型对图3A-3E的传统焊盘结构和图4A和4B的基于本发明的焊盘结构进行了样本分析，在所述三维有限元模型中确定了凸点内(尤其是与UBM的接口处)的电流密度分布，分析表明，本发明的焊盘结构40在关键的焊盘到UBM的接口位置具有比传统焊盘结构10低得多的最大电流密度。最大电流密度被视为可以指示出每种构造中的凸点16的电迁移寿命。
分析中所使用的物理尺寸选择如下：焊盘22、42和46的平面尺寸是80μm×80μm。BCB开口的直径是60μm。金属层M1、...、Mn中每一个的厚度都是0.9μm。UBM 26的直径是110μm。导电线20的宽度是20μm。通孔44a-44i中每一个的高度都是0.65μm。由于通孔44a-44i分立的特点，通过通孔44a-44i到焊盘42、46的连接而形成的焊盘42、46上的金属面积覆盖率约为12％(这一通孔金属的部分覆盖产生了帮助电流在内导电线42中传播的电阻)。在分析中，包含通孔44a-44i的区域的直径在10到70μm之间变化。包含通孔的圆形区域以开口25的中心为圆心。
图5的曲线图示出了分析所产生的凸点UBM侧(其是所考虑的构造的关键位置)的最大电流密度。如图5所示，在通孔直径为70μm的情况下，在内载流金属层Mn与外焊盘层M1之间使用多个通孔44a-44i，对于现有技术焊盘结构产生约1.2的电流密度值，而对于图4A和4B的焊盘结构则产生0.9的电流密度值，这相当于在此情况下本发明的焊盘结构的最大电流密度下降了大约25％。
图5还示出，将用于连接到外焊盘46的每个通孔44a-44i置于焊盘开口25的投影之内，可以产生更大的最大电流密度下降。这可以从含通孔区直径为30～40μm的情况中看出，其中本发明的焊盘结构40的最大电流密度与传统设计的焊盘结构10相比大约是其一半。
图6的曲线图示出了对于幂指数n的多个值，使用本发明的焊盘结构40的凸点16的相对电迁移寿命与包含通孔44a-44i的区域的直径间的关系，从而示出了与上述分析结果相关联的可能的电迁移寿命增加。指数n从1到2变化，这是与铅焊料的已知数据一致的。对于所考察的设计条件，本发明的焊盘结构40可以将电迁移寿命改善到传统设计的焊盘结构10的二到四倍。
本领域技术人员将会意识到，基于同样的发明的设计思想例如可应用于衬底中的焊盘/通孔/导电线设计。
为确定凸点，尤其是在焊盘到UBM的接口处的电流密度分布而对传统的和基于本发明的焊盘构造的分析和比较表明，根据本发明的原理实现的设计在关键的焊盘到UBM的接口位置具有比传统设计低得多的最大电流密度。最大电流密度被视为每种构造中的凸点的电迁移寿命的衡量标准。
综上，本发明的新型焊盘结构和布线设计用于对从电流输送导电线流入，通过内焊盘流到将内焊盘与外焊盘连接起来的多个通孔当中的电流进行分布，以实现外焊盘上较为均匀的电流分布，从而改进连接到外焊盘的集成电路结点(例如倒装式凸点)中由于电流拥挤而引起的电迁移。
虽然这里所说明的本发明的实施例针对的是管芯内的金属导电线，但本发明一般地适用于任何包括交替的金属层和电介质层的集成电路元件，例如集成电路管芯、集成电路衬底、集成电路芯片封装、印刷电路板等等，并且适用于任何利用了到另一相同或不同的这种集成电路元件的诸如凸点之类的结点的集成电路元件。例如，本发明的焊盘结构可以实现在集成电路衬底、PCB和/或芯片封装的互连层内各衬底、PCB和/或封装的焊盘处，在这样的地方，电流大小、电流方向的改变和材料敏感性联合起来导致电迁移问题。
虽然已为说明性目的而公开了本发明的这一优选实施例，但是本领域的技术人员应该认识到，在不脱离所附权利要求书所公开的本发明的范围和精神的情况下，各种修改、添加和替换是可能的。目前公开的发明的其他益处和用途随着时间而显现出来也是可能的。

Claims (14)

1.一种集成电路元件的焊盘结构，包括：
内焊盘，其实现在所述集成电路元件的内导电层上；
外焊盘，其实现在所述集成电路元件的外导电层上；以及
多个通孔，其将所述内焊盘与所述外焊盘相连。
2.如权利要求1所述的焊盘结构，还包括：
层叠于所述外焊盘之上的钝化层，该钝化层具有焊盘开口，从该焊盘开口中露出所述外焊盘的一部分。
3.如权利要求2所述的焊盘结构，其中：
所述将内焊盘与外焊盘相连的多个通孔位于所述焊盘开口的投影内的通孔区中。
4.如权利要求3所述的焊盘结构，其中：
所述多个通孔在所述通孔区内均匀分布。
5.如权利要求2所述的焊盘结构，还包括：
凸点下金属层，其导电地层叠于所述焊盘开口的露出部分之上；以及
附接到所述凸点下金属层的导电凸点。
6.如权利要求5所述的焊盘结构，其中：
所述将内焊盘与外焊盘相连的多个通孔位于所述焊盘开口的投影内的通孔区中。
7.如权利要求6所述的焊盘结构，其中：
所述多个通孔在所述通孔区内均匀分布。
8.一种用于实现集成电路元件的方法，所述集成电路元件包括用于连接到外部集成电路元件结点的外焊盘，以及用于向所述外焊盘输送电流的导电线，所述方法包括如下步骤：
将所述导电线连接到实现在所述集成电路元件的内导电层上的内焊盘；以及
将多个导电通孔连接在所述内焊盘和所述外焊盘之间。
9.如权利要求8所述的方法，还包括以下步骤：
在所述外焊盘之上实现钝化层；以及
露出通过所述钝化层到所述外焊盘的焊盘开口。
10.如权利要求9所述的方法，还包括以下步骤：
将所述多个通孔连接在所述焊盘开口的投影内的通孔区中。
11.如权利要求10所述的方法，还包括以下步骤：
在所述通孔区内均匀分布所述多个通孔。
12.如权利要求9所述的方法，还包括以下步骤：
将凸点下金属层施加在所述焊盘开口处所述外焊盘的露出部分之上；以及
将导电凸点附接到所述凸点下金属层。
13.如权利要求12所述的方法，还包括以下步骤：
将所述多个通孔连接在所述焊盘开口的投影内的通孔区中。
14.如权利要求13所述的方法，还包括以下步骤：
在所述通孔区内均匀分布所述多个通孔。
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