CN1805890A - Wafer box with radially pivoting latch elements - Google Patents
Wafer box with radially pivoting latch elements Download PDFInfo
- Publication number
- CN1805890A CN1805890A CNA2004800169264A CN200480016926A CN1805890A CN 1805890 A CN1805890 A CN 1805890A CN A2004800169264 A CNA2004800169264 A CN A2004800169264A CN 200480016926 A CN200480016926 A CN 200480016926A CN 1805890 A CN1805890 A CN 1805890A
- Authority
- CN
- China
- Prior art keywords
- latch elements
- semiconductor wafer
- cylindrical wall
- lid
- preservation equipment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
- H01L21/6735—Closed carriers
- H01L21/67369—Closed carriers characterised by shock absorbing elements, e.g. retainers or cushions
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Packaging Frangible Articles (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
The semiconductor wafer containment device or wafer box includes a base with a planar floor and a double concentric cylindrical wall structure arising therefrom. The double concentric cylindrical wall structure includes slots through which latch elements pivot radially. The latch elements include an inward padded spacer element. The latch elements pivot between an outward position wherein the padded spacer elements are relatively away from the wafer containment space and an inward upright position wherein the padded spacer elements impinge into the wafer containment space and are urged against the semiconductor wafers therein. Ramps on the lid capture the latch elements in the outward position and urge the latch elements to pivot to the inward upright position and be detent engaged in this position by slots formed on the lid.
Description
Background of invention
The application is the part continuation application of the 10/787th, No. 489 application of submission on February 25th, 2004, and the 60/479th, No. 086 temporary patent application that the 10/787th, No. 489 application requires to submit to on June 17th, 2003 is as preceence.
Technical field
The application relates to a kind of preservation equipment or wafer case that is used for semiconductor wafer.Specifically, this preservation equipment has latch elements, and it radially rotates by the groove in the cylindrical wall.Latch elements comprises the isolated component that is positioned on its inside face, when latch elements be in vertical position, when engaging with cap member, isolated component engages the semiconductor wafer in the cylindrical wall.When latch elements did not engage with lid, latch elements can freedom radially outward rotate together with isolated component, with the free contact semiconductor wafer of energy.
The description of prior art
Prior art comprises the multiple design of the preservation equipment and the transportation device of semiconductor wafer.These designs must provide the protection of static with this two aspect of machinery to the wafer that is contained in wherein, and preferred this preservation equipment should easily be applicable to the automation equipment of various loading or unloading semiconductor wafers.This preservation equipment should have simple design, can be reliable and batch manufacturing economically.
The example of some prior aries is US Patent 6,193,068 of Lewis, and name is called " the preservation equipment that keeps semiconductor wafer ", and open day is February 27 calendar year 2001; The US Patent 6,286,684 of Brooks, name are called " protection system that remains on integrated circuit (IC) wafer that is used for the container that stores and transport ", and open day is September 11 calendar year 2001; The US Patent 6,003,674 of Brooks, name are called " packing is to the method and apparatus and the gained packing of the goods of pollutants sensitivity ", and open day is on December 21st, 1999; The US Patent 5,724,748 of Brooks, name are called " packing is to the device and the gained packing of the goods of pollutants sensitivity ", and open day is on March 10th, 1998.
Goal of the invention and summary
In order to reach above-mentioned and other purpose, semiconductor wafer preservation equipment is provided with at least one cylindrical wall that forms the wafer shelf space.Cylindrical wall comprises that latch elements radially rotates the groove that passes through.Latch elements comprises the lip-deep isolated component that sets within it.When latch elements engaged with lid, latch elements was in vertical position, and isolated component stretches into and is formed on cylindrical wall in-to-in wafer shelf space.Isolated component pushes the semiconductor wafer in the wafer shelf space thus.When latch elements did not engage with lid, latch elements can free rotation be radially outward removed and the engaging of semiconductor wafer, and was for further processing by manual or automated process taking-up semiconductor wafer allowing.Usually, be positioned at latch elements in-to-in isolated component and make, can not damage wafer when the bond semiconductor wafer by soft or spongy material.
Description of drawings
Further purpose of the present invention and advantage will become very obvious from following explanation and accompanying drawing.Wherein:
Fig. 1 is the top view that semiconductor wafer of the present invention is preserved the pedestal of equipment.
Fig. 2 is the lateral plan that semiconductor wafer of the present invention is preserved the pedestal of equipment.
Fig. 3 is the section drawing along Fig. 1 midplane 3-3.
Fig. 4 is the backplan that semiconductor wafer of the present invention is preserved the pedestal of equipment.
Fig. 5 is the section drawing along Fig. 1 midplane 5-5.
Fig. 6 is the section drawing of the part of further enlarged drawing 3.
Fig. 7 is the top view that semiconductor wafer of the present invention is preserved the lid of equipment.
Fig. 8 is the section drawing of Fig. 7 midplane 8-8.
Fig. 9 is the backplan of lid shown in Figure 7.
Figure 10 is the front elevation of lid shown in Figure 7.
Figure 11 is the lateral plan of lid shown in Figure 7.
Figure 12 is the section drawing of Fig. 7 midplane 12-12.
Figure 13 is the section drawing of the part of further enlarged drawing 8.
Figure 14 is the transparent view of pivoting latch elements of the present invention, is in vertical position so that isolated component and semiconductor die chip bonding.
Figure 15 is the transparent view of the bottom surface portions of pedestal of the present invention, shows the rotating mechanism of pivoting latch elements.
Figure 16 is the transparent view of pivoting latch elements of the present invention, is in outside position of rotation, so that isolated component is basic and semiconductor wafer is disengaged.
Figure 17 is the transparent view of pivoting latch elements of the present invention, has wherein removed isolated component, and rotating mechanism is shown thus.
Figure 18 is that the part of the semiconductor wafer that engages with the pedestal lid of preserving equipment disconnects transparent view, and when lid engaged with pedestal, to vertical position was pushed pivoting latch elements from outside position of rotation in lid in-to-in inclined-plane thus.
Figure 19 is that the part that the semiconductor wafer that further engages with pedestal is preserved the lid of equipment disconnects transparent view, and pivoting latch elements is positioned at vertical position substantially thus, and engages with groove in the lid.
Figure 20 is that the part of the semiconductor wafer that engages with the pivoting latch elements lid of preserving equipment disconnects transparent view, and pivoting latch elements is at its vertical position, and isolated component pushing semiconductor wafer.
Figure 21 is that the part of the semiconductor wafer that do not engage with the pivoting latch elements lid of preserving equipment disconnects transparent view, makes pivoting latch elements to inner rotary, therefore isolated component is removed from semiconductor wafer.
The transparent view of Figure 22 isolated component.
Figure 23 is the transparent view that the semiconductor wafer of selectivity embodiment of the present invention is preserved the pedestal of equipment, is configured to use four pivoting latch elements.
Figure 24 is the backplan that the semiconductor wafer of selectivity embodiment of the present invention is preserved the pedestal of equipment, is configured to use four pivoting latch elements.
Description of Preferred Embodiments
Referring now to accompanying drawing, identical parts are represented with identical Reference numeral in whole a few width of cloth accompanying drawings, and Fig. 1 is the top view that semiconductor wafer of the present invention is preserved the pedestal 10 of equipment or wafer case.Pedestal 10 comprises the square floor 12 on basic plane, and this base plate is by side 14,16, and 18,20 form.Inside and outside concentric cylindrical wall 22,24 rises from the plane base plate. Positive positioning element 15,19 is formed at the midway location of outer concentric cylindrical wall 24 exterior sides 14,18.Inside and outside concentric cylindrical wall 22,24 comprises groove 26,28 that is positioned at the place, diagonal angle and the locating notch that forms opening 34,36, and opening is 180 degree relatively each other.Shown in segment part among Fig. 3, the part of next-door neighbour's opening 34,36 of interior concentric cylindrical wall 22 comprises partial notch 38.The inside of concentric cylindrical wall 22 in wafer shelf space 40 is formed on.Wafer shelf space 40 is applicable to the wafer of eight inch diameters, but other range of sizes can certainly.The pivoting latch elements 44,46 that ends at inverted ledges 48,50 is positioned at the relative turning, diagonal angle of base plate 12, and passes groove 26,28 and radially rotate. Pivoting latch elements 44,46 has outstanding liner isolated component 52,53, on the surface that sets within it, is used for bond semiconductor wafer 100 (see Figure 14,16 and 18-21).Shown in Figure 16 and 17, pivoting latch elements 44 and 46 comprises T type groove 54,55, is used to receive be positioned at the exterior complementary T type flange 56,58 of outstanding liner isolated component 52,53 (seeing Figure 22).
Outstanding liner isolated component 52,53 need be soft with buffering semiconductor wafer 100, but also will have enough rigidity to prevent to move, and promotes the lamination of semiconductor wafer 100 gently as spring.The typical material of the liner isolated component 52,53 that is used to give prominence to can be that (Kraton) rises in section, but those skilled in the art can discern many equivalent material after studying the present invention carefully.
Fig. 4 illustrates the backplan of pedestal 10, comprises peripheral base structure 60, and the periphery that centers on base plate 12 stretches out, and is used for affording redress between the surperficial (not shown) of base plate 12 and placement pedestal 10.In addition, lattice work 62 is formed on the bottom of base plate 12.In addition, Fig. 4 shows the bottom surface of the pivot 64,66 of pivoting latch elements 44,46.
The alternative embodiment of Figure 23 and 14 expression pedestals 10 has four grooves 26,27,28,29, is used for receiving four pivots 64,65,66,67 of pivoting latch elements.This structure is applicable to the wafer of large-size usually.
Fig. 5 has shown the cross-sectional detail of the pivot 64 (being equally applicable to pivot 66) of pivoting latch elements 44.Pivoting latch elements 44 comprises principal arm 57, and principal arm links to each other with auxiliary 59.Auxiliary 59 is arranged in the groove 61 of pedestal 10, and ends at pivot 64.Principal arm 57 links to each other with the obtuse angle angle of being a bit larger tham 90 degree with auxiliary 59.When auxiliary 59 is still in the bottom of groove 61, cause pivoting latch elements 44 to present thus as Figure 14, during external position shown in 16,18 and 21, this obtuse angle is with other size, and the principal arm 57 of decision or restriction pivoting latch elements 44 can outward extending angle.As described later, must limit export-oriented angle or external position and guarantee externally position seizure pivoting latch elements 44,46 of lid 70, and they are pushed vertical latched position.
Fig. 6 represents some details of inside and outside concentric cylindrical wall 22,24.
Fig. 7-10 provides the lid 70 that the application's semiconductor wafer is preserved equipment or wafer case.Lid 70 comprises top planar rectangular surface 72, this surface by around upwardly extending flange 74 around and define by square substantially outer skirt wall 82 and to form.Cylindrical wall 80 is formed in the outer skirt wall 82.Groove 76,78 is formed at the relative turning of top planar rectangular surface 72.Groove is formed at each angle of lid 70 in the embodiment of the pedestal 10 shown in Figure 23 and 24.Inclined- plane 77,79 is formed between groove 76,78 and the outer skirt wall 82.When arriving installation site shown in Figure 20, inclined- plane 77,79 from the pivoting latch elements 44 of position of rotation (seeing Figure 21) seizure radially outward, 46 (seeing Figure 18), and pivoting latch elements 44,46 pushed away (seeing Figure 19) to vertical position, with by groove 76,78 receptions form latching structure (seeing Figure 20), promote outstanding liner isolated component 52,53 thus and contact the semiconductor wafer 100 that is arranged in wafer shelf space 40.
Refer to that gripping elements 81,83 radially inwardly forms from groove 76,78, in the time will removing lid 70, allow that the user is manual inwardly to promote pivoting latch elements 44, thereby 46 discharge lid from groove 76,78.Outer cylindrical wall 80 is arranged on the downside of top planar rectangular surface 72.Outer cylindrical wall 80 also comprises with 180 degree negative setting element 85,87 separately.In this installation site, the outer cylindrical wall 80 export-oriented cylindrical walls 24 of next-door neighbour with one heart, and negative setting element 85,87 engages with positive setting element 15,19.
When using wafer case of the present invention, the user usually will from sky pedestal 10 (that is, in wafer shelf space 40, not placing semiconductor wafer 100), its external position has pivoting latch elements 44,46.The user wants manually or with automatic equipment semiconductor wafer 100 to be put into wafer shelf space 40 then, and on pedestal 10, place lid 70, to catch pivoting latch elements 44,46, and it is pushed into vertical position, make outstanding liner isolated component 52,53 contact semiconductor wafers 100, as Figure 18-20 successively shown in and noted earlier.Wafer case is transported by routine then.By with pivoting latch elements 44,46 push refer to gripping elements 81 to, 83 with pivoting latch elements 44,46 discharge from lid 70, can remove lid 70 by hand, therefore allow pivoting latch elements 44,46 to rotate to external position (as shown in figure 21) thus, contact semiconductor wafer 100 easily.
Therefore, several above-mentioned targets and advantage are obtained most effectively.Although the preferred embodiments of the present invention are open and in this detailed description, should be appreciated that the present invention is in no way limited to this, and its scope is defined by the following claims.
Claims (20)
1. the preservation equipment of a semiconductor wafer comprises:
Pedestal comprises at least one from its cylindrical wall that stretches out, and described at least one cylindrical wall forms the wafer shelf space therein, and described at least one cylindrical wall comprises latch elements and radially rotates the groove that passes through; With
Lid, comprise described latch elements is caught position of rotation externally and described latch elements is pushed into radially inside position is positioned at the semiconductor wafer of described wafer storage area with joint device, when described pedestal and described lid are fastened togather, described latch elements engages described lid thus, and described lid constitutes the top of preservation equipment.
2. the preservation equipment of the semiconductor wafer of claim 1, wherein, described at least one cylindrical wall vertically stretches out from described pedestal.
3. the preservation equipment of the semiconductor wafer of claim 2, wherein, described latch elements is in the external position of leaving described wafer shelf space substantially and contact between the inside vertical position of described wafer shelf space and rotate.
4. the preservation equipment of the semiconductor wafer of claim 3, wherein, described seizure and thrust unit comprise the formed inclined-plane of described exterior groove from described lid outside to interior neighbour, wherein said inclined-plane catches described latch elements in described external position, and described groove is fastened on described vertical position with described latch elements.
5. the preservation equipment of the semiconductor wafer of claim 4, wherein, described latch elements comprises outside relative rigidity partial sum internal insulation element, described internal insulation element is used to enter described wafer shelf space.
6. the preservation equipment of the semiconductor wafer of claim 5, wherein, described relative rigidity partly comprises groove, and described internal insulation element comprises the flange that engages described groove.
7. the preservation equipment of the semiconductor wafer of claim 6, wherein, described pivoting latch elements comprises the first arm and second arm that is mutually the obtuse angle, wherein said the first arm comprises the element that engages described lid, and described second arm comprises pivot.
8. the preservation equipment of the semiconductor wafer of claim 7 wherein, moves in the groove of described second arm in described pedestal.
9. the preservation equipment of the semiconductor wafer of claim 1, wherein, described lid comprises and covers cylindrical wall, when described pedestal and described lid are fastened togather, described at least one cylindrical wall of the described pedestal of the export-oriented next-door neighbour of this cylindrical wall.
10. the preservation equipment of the semiconductor wafer of claim 9, wherein, positive setting element is formed on the outside of described at least one cylindrical wall, negative setting element is formed on the described lid cylindrical wall, thus, when described pedestal and described lid were fastened togather, described positive setting element engaged described negative setting element.
11. the preservation equipment of a semiconductor wafer comprises:
Pedestal comprises from its interior concentric cylindrical wall of stretching out and outer concentric cylindrical wall, described in the wafer of the formation within it shelf space of concentric cylindrical wall, described inside and outside concentric cylindrical wall comprise latch elements and radially rotate the groove that passes through; With
Lid, comprise described latch elements is caught position of rotation externally and described latch elements is pushed into radially inside position is positioned at the semiconductor wafer of described wafer storage area with joint device, when described pedestal and described lid are fastened togather, described latch elements engages described lid thus, and described lid constitutes the top of preservation equipment.
12. the preservation equipment of the semiconductor wafer of claim 11, wherein, described inside and outside concentric cylindrical wall is vertically stretched out from described pedestal.
13. the preservation equipment of the semiconductor wafer of claim 12, wherein, described latch elements is in the external position of leaving described wafer shelf space substantially and contact between the inside vertical position of described wafer shelf space and rotate.
14. the preservation equipment of the semiconductor wafer of claim 13, wherein, described seizure and thrust unit comprise the formed inclined-plane of described exterior groove from described lid outside to interior neighbour, wherein said inclined-plane catches described latch elements in described external position, and described groove is fastened on described vertical position with described latch elements.
15. the preservation equipment of the semiconductor wafer of claim 14, wherein, described latch elements comprises outside relative rigidity partial sum internal insulation element, and described internal insulation element is used to enter described wafer shelf space.
16. the preservation equipment of the semiconductor wafer of claim 15, wherein, described relative rigidity partly comprises groove, and described internal insulation element comprises the flange that engages described groove.
17. the preservation equipment of the semiconductor wafer of claim 16, wherein, described pivoting latch elements comprises the first arm and second arm that is mutually the obtuse angle, and wherein said the first arm comprises the element that engages described lid, and described second arm comprises pivot.
18. the preservation equipment of the semiconductor wafer of claim 17 wherein, moves in the groove of described second arm in described pedestal.
19. the preservation equipment of the semiconductor wafer of claim 11, wherein, described lid comprises and covers cylindrical wall, when described pedestal and described lid are fastened togather, and the described outer concentric cylindrical wall of the described pedestal of the export-oriented next-door neighbour of this cylindrical wall.
20. the preservation equipment of the semiconductor wafer of claim 19, wherein, positive setting element is formed on the outside of described outer concentric cylindrical wall, negative setting element is formed on the described lid cylindrical wall, thus, when described pedestal and described lid were fastened togather, described positive setting element engaged described negative setting element.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US47908603P | 2003-06-17 | 2003-06-17 | |
| US60/479,086 | 2003-06-17 | ||
| US10/787,489 | 2004-02-25 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1805890A true CN1805890A (en) | 2006-07-19 |
| CN100361879C CN100361879C (en) | 2008-01-16 |
Family
ID=34061926
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB200480016925XA Expired - Fee Related CN100363243C (en) | 2003-06-17 | 2004-02-25 | Reduced movement wafer box |
| CNB2004800169264A Expired - Fee Related CN100361879C (en) | 2003-06-17 | 2004-05-11 | Wafer box with radially pivoting latch elements |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB200480016925XA Expired - Fee Related CN100363243C (en) | 2003-06-17 | 2004-02-25 | Reduced movement wafer box |
Country Status (5)
| Country | Link |
|---|---|
| EP (1) | EP1633660A4 (en) |
| JP (1) | JP4499718B2 (en) |
| KR (1) | KR101150405B1 (en) |
| CN (2) | CN100363243C (en) |
| WO (1) | WO2005006405A2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102569138A (en) * | 2010-12-10 | 2012-07-11 | 台湾积体电路制造股份有限公司 | Wafer box |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6988621B2 (en) * | 2003-06-17 | 2006-01-24 | Illinois Tool Works Inc. | Reduced movement wafer box |
| JP5091321B2 (en) * | 2007-10-12 | 2012-12-05 | デウォン セミコンダクター パッケージング インダストリアル シーオー．，エルティーディー | Wafer container with staggered wall structure |
| US8556079B2 (en) * | 2009-08-26 | 2013-10-15 | Texchem Advanced Products Incorporated Sdn Bhd | Wafer container with adjustable inside diameter |
| JP5749002B2 (en) * | 2010-12-28 | 2015-07-15 | 芝浦メカトロニクス株式会社 | Load lock device and vacuum processing device |
| CN106742730B (en) * | 2016-12-01 | 2018-12-07 | 海麟文博（厦门）文物预防性保护技术有限公司 | A kind of historical relic box of buffer structure and level 2 buffering |
| KR102595523B1 (en) * | 2021-09-07 | 2023-10-30 | 주식회사 삼에스코리아 | Waper shipping box |
| KR102595526B1 (en) | 2021-09-07 | 2023-10-30 | 주식회사 삼에스코리아 | Waper shipping box |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2941125B2 (en) * | 1992-08-15 | 1999-08-25 | アキレス株式会社 | Semiconductor wafer storage container |
| US5366079A (en) * | 1993-08-19 | 1994-11-22 | Taiwan Semiconductor Manufacturing Company | Integrated circuit wafer and retainer element combination |
| US5816410A (en) * | 1994-07-15 | 1998-10-06 | Fluoroware, Inc. | Wafer cushions for wafer shipper |
| JPH08236605A (en) * | 1995-02-28 | 1996-09-13 | Komatsu Electron Metals Co Ltd | Semiconductor wafer case |
| US5553711A (en) * | 1995-07-03 | 1996-09-10 | Taiwan Semiconductor Manufacturing Company | Storage container for integrated circuit semiconductor wafers |
| US5611448A (en) * | 1995-09-25 | 1997-03-18 | United Microelectronics Corporation | Wafer container |
| JPH09205136A (en) * | 1996-01-25 | 1997-08-05 | Sony Corp | Wafer case |
| JP3472685B2 (en) * | 1997-05-28 | 2003-12-02 | アキレス株式会社 | Semiconductor wafer storage container |
| CN2308571Y (en) * | 1997-08-04 | 1999-02-24 | 财团法人工业技术研究院 | Bottom disk locking device of crystal chip box |
| US6341695B1 (en) * | 1998-05-07 | 2002-01-29 | Texas Instruments Incorporated | Containment device for retaining semiconductor wafers |
| US6193090B1 (en) * | 1999-04-06 | 2001-02-27 | 3M Innovative Properties Company | Reusable container |
| JP4028984B2 (en) * | 1999-07-23 | 2008-01-09 | ブルックス、レイ ジー． | Integrated circuit (IC) wafer protection system held in a container designed for storage and shipping |
| JP4480296B2 (en) * | 2001-05-09 | 2010-06-16 | アキレス株式会社 | Electronic material storage container |
| CN2492943Y (en) * | 2001-09-12 | 2002-05-22 | 财团法人工业技术研究院 | Chip holder |
| JP4577603B2 (en) * | 2001-09-20 | 2010-11-10 | 株式会社安川電機 | Container for thin objects |
| JP2004266181A (en) | 2003-03-04 | 2004-09-24 | Nec Electronics Corp | Semiconductor substrate storage container |
-
2004
- 2004-02-25 JP JP2006517075A patent/JP4499718B2/en not_active Expired - Fee Related
- 2004-02-25 CN CNB200480016925XA patent/CN100363243C/en not_active Expired - Fee Related
- 2004-02-25 KR KR1020057024092A patent/KR101150405B1/en not_active IP Right Cessation
- 2004-02-25 EP EP04714663A patent/EP1633660A4/en not_active Withdrawn
- 2004-02-25 WO PCT/US2004/005725 patent/WO2005006405A2/en active Application Filing
- 2004-05-11 CN CNB2004800169264A patent/CN100361879C/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102569138A (en) * | 2010-12-10 | 2012-07-11 | 台湾积体电路制造股份有限公司 | Wafer box |
| CN102569138B (en) * | 2010-12-10 | 2016-05-11 | 台湾积体电路制造股份有限公司 | Wafer case |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2005006405A3 (en) | 2005-06-09 |
| KR20060017647A (en) | 2006-02-24 |
| JP2006527919A (en) | 2006-12-07 |
| EP1633660A4 (en) | 2008-07-23 |
| CN1805889A (en) | 2006-07-19 |
| KR101150405B1 (en) | 2012-06-01 |
| CN100361879C (en) | 2008-01-16 |
| WO2005006405A2 (en) | 2005-01-20 |
| EP1633660A2 (en) | 2006-03-15 |
| CN100363243C (en) | 2008-01-23 |
| JP4499718B2 (en) | 2010-07-07 |
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| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20080116 Termination date: 20150511 |
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| EXPY | Termination of patent right or utility model |