CN1790626A - 在蚀刻浅沟槽之前预锥形硅或硅-锗的工艺 - Google Patents
在蚀刻浅沟槽之前预锥形硅或硅-锗的工艺 Download PDFInfo
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Abstract
在材料(例如硅)中蚀刻浅沟槽之前,在材料中形成预锥形部件的工艺,包括在材料上的硬掩模中形成开口,从而在材料中形成第一预锥形部件。工艺可以包括硬掩模过蚀刻步骤,该步骤修正第一预锥形部件的剖面,以在材料中形成第二预锥形部件。在预锥形材料中形成浅沟槽隔离部件。
Description
背景技术
在制造基于半导体的产品(例如集成电路)期间,采用蚀刻和/或淀积步骤在半导体衬底上形成或除去材料层。常规蚀刻过程使用激发为等离子态的工艺气体以进行等离子体蚀刻材料层。
采用等离子体蚀刻在集成电路中提供单个晶体管的浅沟槽隔离(“STI”)。STI可用于形成,例如,能够在集成电路中电隔离单个晶体管的沟槽。电隔离防止两个相邻器件(例如,晶体管)之间的电流漏泄。
发明内容
提供了在硅或硅-锗中形成预锥形(pre-tapered)部件的工艺。工艺的优选实施方案包括在等离子体处理室中提供半导体结构,其中半导体结构包括硅或硅-锗层、在硅或硅-锗层上的硬掩模以及在硬掩模上的构图的软掩模。向等离子体处理室中供应第一蚀刻气体混合物并激发产生第一等离子体,该第一等离子体蚀刻透过硬掩模的开口并蚀刻硅或硅-锗层中的第一预锥形部件。
根据另一个优选实施方案的工艺包括:向等离子体处理室中供应第二蚀刻气体混合物,并由第二蚀刻气体混合物形成第二等离子体。第二等离子体过蚀刻(overetch)硬掩模,修正和/或扩大第一部件,以在硅或硅-锗层中形成第二预锥形部件。
在硅或硅-锗层中形成浅沟槽工艺的优选实施方案包括,在等离子体处理室中提供半导体结构,该半导体结构包括硅或硅-锗层、在硅或硅-锗层上的硬掩模以及在硬掩模上的构图的软掩模。向等离子体处理室中提供第一蚀刻气体混合物并激发产生第一等离子体。第一等离子体蚀刻透过硬掩模开口和在硅或硅-锗层中的第一预锥形部件。向等离子体处理室中供应第二蚀刻气体混合物并激发产生第二等离子体。第二等离子体过蚀刻硬掩模,修正和/或扩大第一部件,以在硅或硅-锗层中形成第二预锥形部件。工艺包括停止向等离子体处理室中供应第二蚀刻气体混合物,向等离子体处理室中供应第三工艺气体,并激发第三工艺气体混合物形成第三等离子体。第三等离子体在硅或硅-锗层中蚀刻浅沟槽。
附图说明
图1表明了在使用根据优选实施方案的工艺蚀刻之前的半导体结构。
图2表明了在开口硬掩模并通过根据优选实施方案的工艺在下面的层中形成预锥形部件之后的图1所示的半导体结构。
图3表明了在下面的层中蚀刻浅沟槽部件之后的半导体结构。
图4表明了能够用于实施该工艺的优选实施方案的示例性等离子体处理室。
图5是通过根据优选实施方案的工艺在硅片中形成的预锥形结构的扫描电子(SEM)显微照片。
图6是在图5所示硅片的另一个区中形成的预锥形结构的SEM显微照片。
具体实施方式
在硅中产生浅沟槽隔离(STI)部件的工艺包括下面的步骤:在硅上形成硬掩模,在硬掩模上构图软掩模,通过软掩模构图硬掩模,然后在硅中蚀刻浅沟槽。在除去软掩模之后,用介电材料回填在硅中的浅沟槽。在共同转让的美国专利Nos.6,218,309和6,287,974中公开了示例性浅沟槽等离子体蚀刻工艺,在此作为参考全部引入。
如在此所用的,术语“凹陷的”是指在材料中形成的具有大约85°到大约90°的侧壁剖面的蚀刻部件(即,基本上垂直或垂直的,90°,的侧壁剖面)。如在此所用的,术语“锥形的”是指在材料中的具有小于大约85°的侧壁剖面的蚀刻部件。在某些硬掩模浅沟槽隔离工艺中,在浅沟槽蚀刻步骤开始时,在硅中具有顶部倒角(top rounding)和/或没有凹陷是恰当的。例如,美国专利No.5,807,789公开了具有锥形剖面和圆角的浅沟槽结构。在美国专利Nos.6,218,309和6,287,974中也公开了浅沟槽隔离部件的顶部倒角。
在硅中蚀刻沟槽之前,通过进行与硬掩模开口步骤分开的顶部倒角步骤能够实现硬掩模STI顶部倒角。然而已经确定,在这种工艺中,在硬掩模开口步骤和/或STI的大致最初几秒期间,在硅中能够蚀刻具有基本上垂直或垂直的侧壁的部件(即,凹陷部件)。这种凹陷部件是不希望有的,因为它们对建立在衬底止的器件的电气性能产生不利影响。
从硬掩模开口到浅沟槽隔离的过渡存在可能降低顶部倒角和/或沟槽蚀刻步骤的效果的问题,例如由于存在稳定化步骤引起的自身氧化物和/或聚合物残余物和/或不一致的钝化产生。此外,后掩模开口和光致抗蚀剂条顶部倒角工艺能够在硅中产生不希望有的效应,例如子沟槽、双斜率(double slopes)、差的掩模选择性、垂直硅凹陷和/或微掩模(micromask),并且这些效应能够传递到沟槽蚀刻步骤。
已经确定,在浅沟槽隔离步骤的开始,优选的是,其中要形成浅沟槽的材料处于预锥形条件下;即,在开始沟槽蚀刻步骤以前在该材料中已经形成了锥形部件。
还已经确定,为了在进行浅沟槽隔离之前产生这种预锥形部件,当蚀刻前缘到达衬垫氧化物/衬底界面时,不停止硬掩模开口步骤。相反地,继续蚀刻经过该界面,并进入其中要形成浅沟槽的材料之内。硬掩模开口步骤优选在该材料中产生锥形剖面。锥形剖面在此称作“预锥形的”,因为它是在浅沟槽隔离以前形成的。硬掩模开口步骤优选除去其中要形成沟槽的材料的仅大约几纳米的深度,但是不使该材料凹陷。硬掩模开口步骤在预锥形工艺中提供初始步骤。
预锥形工艺继硬掩模开口步骤之后还优选包括硬掩模过蚀刻步骤。在硅或硅-锗中蚀刻沟槽之前,硬掩模过蚀刻步骤实现在硅或硅-锗中所要求的预锥形剖面。
通过对钝化物质和硅或硅-锗蚀刻选择性的适当选择,实现在硅或硅-锗中形成的预锥形部件的剖面。具体地,在硬掩模开口步骤期间,碳基聚合物淀积物提供引导所形成的预锥形部件剖面的钝化。在硬掩模开口终点,即在蚀刻已经打开硬掩模并且在下面的硅或硅-锗中蚀刻预锥形部件之后,继续蚀刻,但是用不同的钝化物质,优选硅基玻璃聚合物。通过可以包括但是不局限于蚀刻气体混合物组成和流量、蚀刻室压力、施加到电极的功率水平以及蚀刻时间的工艺参数确定硬掩模和硅或硅-锗侧壁剖面。
相对于硬掩模蚀刻速度,降低的硅或硅-锗蚀刻速度是恰当的。通过增强在蚀刻前缘的钝化形成,能够实现减低硅或硅-锗的蚀刻速度。具体地,对于产生轻微的硅或硅-锗锥形,在蚀刻前缘角相对更重的钝化形成是更恰当的。
参考图1和2,介绍在浅沟槽隔离之前预锥形硅或硅-锗的工艺的优选实施方案。图1表明在进行预锥形和浅沟槽隔离工艺之前的示例性半导体结构。半导体结构包括衬底10和覆盖叠层。图1所示示例性叠层包括在衬底10上的衬垫氧化物层12、在衬垫氧化物层12上的硬掩模14、在硬掩模14上的可选的底部防反射涂层(BARC)16和在BARC 16上的光致抗蚀剂层18。BARC 16和可选的光致抗蚀剂层18在此一起称作“软掩模”。
如图1所示,光致抗蚀剂层18包括所要求的开口构图(仅示出了一个这种开口20)。为了在衬底10中蚀刻浅沟槽结构,在光致抗蚀剂层18中对应于预定位置的位置形成开口20,该位置用于在衬底10中形成各浅沟槽。通过等离子体蚀刻在开口20的位置打开硬掩模14和衬垫氧化物层12,以构图硬掩模。
衬底10优选单晶硅的,例如,单晶硅晶片。或者,衬底10可以是多晶硅或硅-锗合金。根据另一个实施方案,衬底10可以包括形成衬底10的上表面的单晶硅、多晶硅或硅-锗层。例如,衬底10可以包括在绝缘体材料上形成的硅层,即,绝缘体上硅(SOI)结构。衬底10的硅或硅-锗材料可以是掺杂或未掺杂的材料。
衬垫氧化物层12优选是SiO2的。衬垫氧化物层12优选具有最多大约30nm(300_)的厚度,例如,从大约10nm(100_)到大约20nm(200_)。通过任何合适的工艺,例如,通过在含氧的气氛中热氧化衬底10,或通过任何合适的淀积工艺,例如,化学气相淀积(CVD)在衬底10上形成衬垫氧化物层12。衬垫氧化物层12作为缓冲层。
硬掩模14优选是SixNy的,例如,Si3N4。硬掩模14可以具有从大约40nm(400_)到大约200nm(2000_)的厚度,例如,从大约80nm(800_)到大约120nm(1200_)。可以通过任何合适的淀积工艺,例如,低压化学气相淀积(LPCVD)、等离子体增强化学气相淀积(PECVD)等,以在衬垫氧化物层12上形成硬掩模14。在随后的工艺中除去衬垫氧化物层12和硬掩模14。
BARC 16可以由任何合适的有机或无机材料构成。
光致抗蚀剂层18可以由任何合适的抗蚀剂材料组成。光致抗蚀剂层18优选由可以通过在含氧的气氛中剥离除去的碳基聚合物构成。还优选在光致抗蚀剂剥离工艺期间除去BARC。在剥离软掩模期间,氧原子团和离子物质与光致抗蚀剂层18和BARC 16反应。用于剥离软掩模的工艺气体可以具有任何合适的组成,例如,O2/N2、O2/H2O、O2/N2/CF4或O2/N2/H2O气体混合物。
图2示出了在BARC 16、硬掩模14和衬垫氧化物层12已经开口并且在衬底10中已经蚀刻预锥形部件之后(为简单起见仅示出了一个这种预锥形部件22)的半导体结构。在优选实施方案中,预锥形工艺的步骤通过使用合适的蚀刻化学试剂的等离子体蚀刻来开口BARC 16、硬掩模14和衬垫氧化物层12。对于该步骤,蚀刻气体混合物优选包括至少一种具有式CxHyFz的气体,其中x、y和z都>0;含氧气体和惰性气体。优选的,蚀刻气体混合物包含CHF3、惰性气体和O2。例如,惰性气体可以是氩、氦或其混合物。在蚀刻气体混合物中包括惰性气体,以在等离子体蚀刻期间除去在硬掩模14和衬垫氧化物层12的侧壁上的聚合物淀积物,从而优选的为硬掩模和衬垫氧化物开口实现基本上垂直或垂直的侧壁结构,如图2所示。气体混合物可选地包含例如HBr的气体,以在硬掩模开口步骤期间用于保护光致抗蚀剂层18不变形。
用来开口硬掩模的蚀刻气体混合物的组分可以具有任何合适的比值,优选地当在硅或硅-锗中形成所要求的预锥形部件时,能够对硬掩模和衬垫氧化物实现凹陷的结构的。用于开口硬掩模的蚀刻气体混合物成分的气体流量大概的优选范围是:CHF3:大约50到大约300sccm;惰性气体:最多大约750sccm;O2:最多大约40sccm;HBr:0到大约40sccm。
最好,硬掩模开口步骤在硅或硅-锗中产生具有从大约3nm到大约20nm深度的锥形部件。最好采用蚀刻终点检测来确定衬垫氧化物层12何时被打开,以减少用气体混合物过蚀刻硬掩模。例如,光学发射光谱学可用于确定SiO2的终点。
硬掩模开口步骤最好仅开始预锥形工艺。即,图2所示的预锥形部件最好不全部通过掩模开口步骤形成。最好,不同的蚀刻气体混合物也用于过蚀刻硬掩模,以产生图2所示的预锥形部件。
最好,一旦终点检测确定衬垫氧化物层12已经开口,用来开口硬掩模的蚀刻气体混合物变为用于过蚀刻硬掩模的不同蚀刻气体混合物,并且实现所要求的预锥形硅或硅-锗结构。硬掩模过蚀刻气体混合物最好不含氧,并且最好是至少一种具有式CxHyFz的气体与惰性气体的混合物,其中x、y和z都>0。最好,过蚀刻硬掩模的蚀刻气体混合物包含CHF3和氩或氦。过蚀刻气体混合物组分的气体流量大概的优选范围是:CHF3:从大约50到大约300sccm,惰性气体:最多大约750sccm。过蚀刻步骤最好进行大约5秒到大约45秒,更优选从大约5秒到大约15秒,以在硅或硅-锗中实现所要求的部件。增加蚀刻时间增加预锥形部件的锥度。
如图2所示,由硬掩模过蚀刻步骤产生的预锥形部件22由侧壁24限定,侧壁24优选具有从大约30°到大约85°的锥度。侧壁24可以是完全平坦的,如图所示。可以在衬垫氧化物层12与衬底10之间的界面26处倒角侧壁24。预锥形部件22最好具有从大约1nm(10_)到大约50nm(500_)的深度,更优选从大约1nm到大约15nm(150_)。如图2所示,预锥形部件22的侧壁24最好从衬底10/衬垫氧化物12的界面26延伸到底部28。
图3示出了在继硬掩模过蚀刻之后,衬底10中已经蚀刻浅沟槽之后的半导体结构(为简单起见仅示出了一个这种浅沟槽30)。例如,硅或硅-锗的浅沟槽蚀刻气体混合物可以是,例如HBr/O2蚀刻气体混合物、Cl2/O2蚀刻气体混合物。浅沟槽30可以一般具有从大约50nm(500_)到大约500nm(5000_)的深度,并且包括从衬垫氧化物12/衬底10界面34到浅沟槽底部36的具有从大约60°到大约90°的锥度的侧壁32。
可以在各种类型的等离子体反应器中通过优选实施方案的工艺加工半导体结构,例如,图1-3所示的半导体结构。这种等离子体反应器一般具有例如使用RF能量、微波能量或磁场的能量源,以产生中-高密度等离子体。可以在感应耦合等离子体反应器中进行预锥形硅和蚀刻浅沟槽的工艺的优选实施方案。可以在高密度等离子体反应器,例如,可以从位于California Fremont的LamResearch Corporation得到的感应耦合TCP_2300等离子体反应器中实行工艺的实施方案。
图4说明了包括具有室壁103的感应耦合等离子体处理室102的示例性等离子体处理装置100。为提供通向地的电路径,室壁103可以由金属构成并且接地。等离子体处理装置包括感应电极104,最好是线圈,例如,平面螺旋形线圈。由RF电源106通过匹配网络为感应电极104提供能量。介电窗口108布置在感应电极104下面。
在等离子体处理室102中提供进气口110,用于供应工艺气体(例如蚀刻气体混合物)到介电窗口108与支撑在衬底支撑上的衬底112之间的RF感应的等离子体区中。衬底支撑包括卡盘114,最好是在等离子体处理期间适合通过静电夹紧力固定衬底112的静电卡盘(ESC)。或者,工艺气体也可以从在室壁中的通道提供,或通过注入器排列。ESC可选地起底部电极的作用,并且最好通过RF电源116(一般也通过匹配网络)偏置。如果需要,ESC可以支撑在RF供电的底部电极上。卡盘114可以可选地包括围绕底部电极设置的聚焦环。
等离子体处理室102可以包括与位于室102外部的泵(未示出)流体连通的排气口118。泵保持等离子体处理室102内部所要求的真空压。
根据包括等离子体反应器类型、功率设置、反应器中的真空压以及等离子源的离解率等各种因素选择用于硬掩模开口和硬掩模过蚀刻步骤的蚀刻气体混合物的恰当的流量。对于感应耦合等离子体反应器,对于硬掩模开口步骤,等离子体处理室最好在从大约5mT到大约100mT的压力下操作,并且在硬掩模过蚀刻步骤期间在从大约1mT到大约50mT的压力下操作。
支撑经受蚀刻的半导体结构的衬底支撑最好适于冷却衬底。在高和中密度等离子体反应器中,将衬底支撑冷却到从大约-10到大约+80℃的温度是足够的。例如,可以通过在晶片与BSC的顶面之间供应在所要求的压力下的热传导流体(例如氦)以静电夹紧和冷却半导体晶片。
可以用于使用感应耦合等离子体处理室形成预锥形硅或硅-锗结构(例如图2所示)的示例性工艺条件如下:
硬掩模开口:90mT的处理室压力/500瓦的线圈功率/400伏的底部电极电压/100sccm的CHF3/500sccm的氦或氩/15sccm的O2/20sccm的HBr/大约60℃的衬底支撑温度。
硬掩模过蚀刻:5mT的等离子体处理室压力/500瓦的线圈功率/400伏的底部电极电压/100sccm的CHF3/100sccm的氦成氩/60℃的衬底支撑温度/10秒的蚀刻时间。
图5和6是示出使用上述用于在感应耦合等离子体处理室中硬掩模开口和过蚀刻步骤的各自示例性工艺条件,在硅片的两个不同区中形成的预锥形部件(如圆圈围绕的)的SEM显微照片。在图5和6中所示的结构分别具有大约85nm和67nm的中间临尺寸(MCD)。
在另一个优选实施方案中,在中密度平行板等离子体反应器中进行预锥形硅或硅-锗的工艺。可以使用的合适的示例性平行板等离子体反应器是在共同转让的美国专利No.6,090,304中介绍的双频等离子体蚀刻反应器,在此作为参考全部引入。在这种反应器中,可以从气体源向莲蓬头电极提供蚀刻气体,并且可以通过从一个或多个RF源向莲蓬头电极和/或底部电极供应RF能量,或者莲蓬头电极可以电接地,并且可以向底部电极提供两个不同频率的RF能量,以在反应器中产生容性耦合的等离子体。
除了高密度感应耦合等离子体反应器或中密度容性耦合等离子体反应器之外,任何其它合适的等离子体反应器可用于实施用于锥形硅的工艺的优选实施方案,例如,波激励反应器,例如,ECR(微波)或helicon谐振器。
上文介绍了本发明的原理、优选实施方案和工作方式。然而,不应该认为本发明限于所论述的特定实施方案。因此,应该认为上述实施方案是说明性的而不是限制性的,并且应当理解本领域的技术人员可以在那些实施方案中进行变化而不脱离正如以下权利要求书所定义的本发明的范围。
Claims (20)
1.预锥形半导体结构的硅层或硅-锗层的工艺,包括:
在等离子体处理室中提供半导体结构,该半导体结构包括硅层或硅-锗层、在硅层或硅-锗层上的硬掩模以及在硬掩模上的构图的软掩模;
供应蚀刻气体混合物到等离子体处理室中;以及
由蚀刻气体混合物形成等离子体,并且用等离子体(i)蚀刻透过硬掩模的开口以及(ii)在硅层或硅-锗层中蚀刻预锥形部件。
2.权利要求1的工艺,其中预锥形部件具有大约1nm到大约20nm的深度。
3.权利要求1的工艺,其中蚀刻气体混合物包括CxHyFz、含氧气体和惰性气体,其中x、y和z的每一个>0。
4.权利要求3的工艺,其中蚀刻气体混合物包括CHF3、惰性气体、O2和可选的HBr。
5.权利要求4的工艺,其中向处理室中以CHF3从大约50sccm到大约300sccm、惰性气体最多大约750sccm、O2最多大约40sccm和HBr从大约0到大约40sccm的气体流速供应蚀刻气体混合物。
6.权利要求5的工艺,其中通过将RF能量感应耦合到压力在从大约5mT到大约100mT的等离子体处理室中形成等离子体。
7.权利要求1的工艺,其中半导体结构包括在硅或硅-锗层与硬掩模之间的衬垫氧化物层,并且等离子体在硬掩模和衬垫氧化物层中形成由基本上垂直或垂直的侧壁限定的开口。
8.权利要求7的工艺,其中半导体结构包括在氮化硅层与单晶硅层之间的衬垫氧化物层。
9.预锥形半导体结构的硅层或硅-锗层的工艺,包括:
在等离子体处理室中提供半导体结构,该半导体结构包括硅层或硅-锗层、在硅层或硅-锗层上的硬掩模以及在硬掩模上的构图的软掩模;
供应第一蚀刻气体混合物到等离子体处理室中;以及
由第一蚀刻气体混合物形成第一等离子体,并且用第一等离子体(i)蚀刻透过硬掩模的开口以及(ii)在硅层或硅-锗层中蚀刻预锥形部件;
供应不同于第一蚀刻气体混合物的第二蚀刻气体混合物到等离子体处理室中;以及
由第二蚀刻气体混合物形成第二等离子体,并用第二等离子体过蚀刻硬掩模,以便修正和/或扩大第一预锥形部件,以在硅或硅-锗层中形成第二预锥形部件。
10.权利要求9的工艺,其中:
第一预锥形部件具有从大约1nm到大约20nm的深度;以及
第二预锥形部件(i)具有从大约1nm到大约50nm的深度,以及(ii)包括具有从大约30°到大约85°锥度的侧壁。
11.权利要求9的工艺,其中:
第一蚀刻气体混合物包括CxHyFz、含氧气体和惰性气体,其中x、y和z的每一个>0;以及
第二蚀刻气体混合物是不含氧的,并且包括CxHyFz和惰性气体,其中x、y和z的每一个>0。
12.权利要求11的工艺,其中:
以CHF3从大约50sccm到大约300sccm、惰性气体最多大约750sccm、O2最多大约40sccm和HBr从大约0到大约40sccm的气体流速供应第一蚀刻气体混合物到处理室中;以及
以CHF3从大约50sccm到大约300sccm和惰性气体最多大约750sccm的气体流速供应第二蚀刻气体混合物到等离子体处理室中。
13.权利要求12的工艺,其中:
在从大约5mT到大约100mT的室压力下,通过将RF能量感应耦合到等离子体处理室中形成第一等离子体;以及
在从大约1mT到大约50mT的室压力下,通过将RF能量感应耦合到等离子体处理室中形成第二等离子体。
14.权利要求9的工艺,其中:
半导体衬底包括在硅或硅-锗层与硬掩模之间的衬垫氧化物层;
第一等离子体在硬掩模与衬垫氧化物层中形成由基本上垂直或垂直的侧壁限定的开口;以及
第二预锥形部件具有从衬垫氧化物层延伸到各第二预锥形部件底部的侧壁。
15.权利要求9的工艺,其中半导体结构包括在氮化硅层与单晶硅层之间的衬垫氧化物层。
16.在半导体结构的硅或硅-锗层中形成浅沟槽的工艺,包括:
在等离子体处理室中提供半导体结构,该半导体结构包括硅层或硅-锗层、在硅或硅-锗层上的硬掩模以及在硬掩模上的构图的软掩模;
供应第一蚀刻气体混合物到等离子体处理室中;
由第一蚀刻气体混合物形成第一等离子体,并且用第一等离子体(i)蚀刻透过硬掩模的开口以及(ii)在硅层或硅-锗层中蚀刻第一预锥形部件;
供应不同于第一蚀刻气体混合物的第二蚀刻气体混合物到等离子体处理室中;以及
由第二蚀刻气体混合物形成第二等离子体,并用第二等离子体过蚀刻硬掩模,以便修正和/或扩大第一预锥形部件,以在硅或硅-锗层中形成第二预锥形部件;
从半导体结构中除去软掩模;以及
蚀刻硅或硅-锗层,以在其中形成浅沟槽。
17.权利要求16的工艺,其中:
第一预锥形部件具有从大约1nm到大约20nm的深度;
第一蚀刻气体混合物包括CxHyFz、含氧气体和惰性气体,其中x、y和z的每一个>0;以及
在从大约5mT到大约100mT的室压力下,通过将RF能量感应耦合到等离子体处理室中形成第一等离子体。
18.权利要求16的工艺,其中半导体结构包括在硅或硅-锗层与硬掩模之间的衬垫氧化物层,第一等离子体在硬掩模和衬垫氧化物层中形成由基本上垂直或垂直的侧壁限定的开口。
19.权利要求16的工艺,其中:
半导体结构包括在硅或硅-锗层与硬掩模之间的衬垫氧化物层;
第二预锥形部件(i)具有从大约1nm到大约50nm的深度,以及(ii)包括具有从大约30°到大约85°锥度的锥形侧壁,并且测壁从衬垫氧化物层延伸到各第二预锥形部件的底部;
第二蚀刻气体混合物是不含氧的,并且包括CxHyFz和惰性气体,其中x、y和z的每一个>0;以及
在从大约5mT到大约50mT的室压力下,通过将RF能量感应耦合到等离子体处理室中形成第二等离子体。
20.权利要求16的工艺,其中半导体结构包括硅层、在硅层上的衬垫氧化物层以及在衬垫氧化物层上的硬掩模。
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102148184A (zh) * | 2011-03-15 | 2011-08-10 | 上海宏力半导体制造有限公司 | 改善浅沟槽隔离侧壁粗糙度的方法 |
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Families Citing this family (132)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7517804B2 (en) * | 2006-08-31 | 2009-04-14 | Micron Technologies, Inc. | Selective etch chemistries for forming high aspect ratio features and associated structures |
US20080102553A1 (en) * | 2006-10-31 | 2008-05-01 | Applied Materials, Inc. | Stabilizing an opened carbon hardmask |
KR100864932B1 (ko) * | 2007-07-23 | 2008-10-22 | 주식회사 동부하이텍 | 반도체 기판의 세정방법 |
JP5264383B2 (ja) * | 2008-09-17 | 2013-08-14 | 東京エレクトロン株式会社 | ドライエッチング方法 |
US9324576B2 (en) | 2010-05-27 | 2016-04-26 | Applied Materials, Inc. | Selective etch for silicon films |
US10283321B2 (en) | 2011-01-18 | 2019-05-07 | Applied Materials, Inc. | Semiconductor processing system and methods using capacitively coupled plasma |
US9064815B2 (en) | 2011-03-14 | 2015-06-23 | Applied Materials, Inc. | Methods for etch of metal and metal-oxide films |
US8999856B2 (en) | 2011-03-14 | 2015-04-07 | Applied Materials, Inc. | Methods for etch of sin films |
US8808563B2 (en) | 2011-10-07 | 2014-08-19 | Applied Materials, Inc. | Selective etch of silicon by way of metastable hydrogen termination |
US9267739B2 (en) | 2012-07-18 | 2016-02-23 | Applied Materials, Inc. | Pedestal with multi-zone temperature control and multiple purge capabilities |
US9373517B2 (en) | 2012-08-02 | 2016-06-21 | Applied Materials, Inc. | Semiconductor processing with DC assisted RF power for improved control |
US9034770B2 (en) | 2012-09-17 | 2015-05-19 | Applied Materials, Inc. | Differential silicon oxide etch |
US9023734B2 (en) | 2012-09-18 | 2015-05-05 | Applied Materials, Inc. | Radical-component oxide etch |
US9390937B2 (en) | 2012-09-20 | 2016-07-12 | Applied Materials, Inc. | Silicon-carbon-nitride selective etch |
US9132436B2 (en) | 2012-09-21 | 2015-09-15 | Applied Materials, Inc. | Chemical control features in wafer process equipment |
US8969212B2 (en) | 2012-11-20 | 2015-03-03 | Applied Materials, Inc. | Dry-etch selectivity |
US8980763B2 (en) | 2012-11-30 | 2015-03-17 | Applied Materials, Inc. | Dry-etch for selective tungsten removal |
US9111877B2 (en) | 2012-12-18 | 2015-08-18 | Applied Materials, Inc. | Non-local plasma oxide etch |
US8921234B2 (en) | 2012-12-21 | 2014-12-30 | Applied Materials, Inc. | Selective titanium nitride etching |
US10256079B2 (en) | 2013-02-08 | 2019-04-09 | Applied Materials, Inc. | Semiconductor processing systems having multiple plasma configurations |
US9236240B2 (en) * | 2013-02-28 | 2016-01-12 | Globalfoundries Singapore Pte. Ltd. | Wafer edge protection |
US9362130B2 (en) | 2013-03-01 | 2016-06-07 | Applied Materials, Inc. | Enhanced etching processes using remote plasma sources |
US9040422B2 (en) | 2013-03-05 | 2015-05-26 | Applied Materials, Inc. | Selective titanium nitride removal |
US20140271097A1 (en) | 2013-03-15 | 2014-09-18 | Applied Materials, Inc. | Processing systems and methods for halide scavenging |
US9493879B2 (en) | 2013-07-12 | 2016-11-15 | Applied Materials, Inc. | Selective sputtering for pattern transfer |
US9773648B2 (en) | 2013-08-30 | 2017-09-26 | Applied Materials, Inc. | Dual discharge modes operation for remote plasma |
US9576809B2 (en) | 2013-11-04 | 2017-02-21 | Applied Materials, Inc. | Etch suppression with germanium |
US9236265B2 (en) * | 2013-11-04 | 2016-01-12 | Applied Materials, Inc. | Silicon germanium processing |
US9520303B2 (en) | 2013-11-12 | 2016-12-13 | Applied Materials, Inc. | Aluminum selective etch |
US9245762B2 (en) | 2013-12-02 | 2016-01-26 | Applied Materials, Inc. | Procedure for etch rate consistency |
US9287095B2 (en) | 2013-12-17 | 2016-03-15 | Applied Materials, Inc. | Semiconductor system assemblies and methods of operation |
US9287134B2 (en) | 2014-01-17 | 2016-03-15 | Applied Materials, Inc. | Titanium oxide etch |
US9293568B2 (en) | 2014-01-27 | 2016-03-22 | Applied Materials, Inc. | Method of fin patterning |
US9396989B2 (en) | 2014-01-27 | 2016-07-19 | Applied Materials, Inc. | Air gaps between copper lines |
US9385028B2 (en) | 2014-02-03 | 2016-07-05 | Applied Materials, Inc. | Air gap process |
US9499898B2 (en) | 2014-03-03 | 2016-11-22 | Applied Materials, Inc. | Layered thin film heater and method of fabrication |
US9299575B2 (en) | 2014-03-17 | 2016-03-29 | Applied Materials, Inc. | Gas-phase tungsten etch |
US9299537B2 (en) | 2014-03-20 | 2016-03-29 | Applied Materials, Inc. | Radial waveguide systems and methods for post-match control of microwaves |
US9903020B2 (en) | 2014-03-31 | 2018-02-27 | Applied Materials, Inc. | Generation of compact alumina passivation layers on aluminum plasma equipment components |
US9269590B2 (en) | 2014-04-07 | 2016-02-23 | Applied Materials, Inc. | Spacer formation |
US9309598B2 (en) | 2014-05-28 | 2016-04-12 | Applied Materials, Inc. | Oxide and metal removal |
US9378969B2 (en) | 2014-06-19 | 2016-06-28 | Applied Materials, Inc. | Low temperature gas-phase carbon removal |
US9406523B2 (en) | 2014-06-19 | 2016-08-02 | Applied Materials, Inc. | Highly selective doped oxide removal method |
US9425058B2 (en) | 2014-07-24 | 2016-08-23 | Applied Materials, Inc. | Simplified litho-etch-litho-etch process |
US9496167B2 (en) | 2014-07-31 | 2016-11-15 | Applied Materials, Inc. | Integrated bit-line airgap formation and gate stack post clean |
US9378978B2 (en) | 2014-07-31 | 2016-06-28 | Applied Materials, Inc. | Integrated oxide recess and floating gate fin trimming |
US9659753B2 (en) | 2014-08-07 | 2017-05-23 | Applied Materials, Inc. | Grooved insulator to reduce leakage current |
US9553102B2 (en) | 2014-08-19 | 2017-01-24 | Applied Materials, Inc. | Tungsten separation |
US9355856B2 (en) | 2014-09-12 | 2016-05-31 | Applied Materials, Inc. | V trench dry etch |
US9368364B2 (en) | 2014-09-24 | 2016-06-14 | Applied Materials, Inc. | Silicon etch process with tunable selectivity to SiO2 and other materials |
US9478434B2 (en) | 2014-09-24 | 2016-10-25 | Applied Materials, Inc. | Chlorine-based hardmask removal |
US9613822B2 (en) | 2014-09-25 | 2017-04-04 | Applied Materials, Inc. | Oxide etch selectivity enhancement |
US9966240B2 (en) | 2014-10-14 | 2018-05-08 | Applied Materials, Inc. | Systems and methods for internal surface conditioning assessment in plasma processing equipment |
US9355922B2 (en) | 2014-10-14 | 2016-05-31 | Applied Materials, Inc. | Systems and methods for internal surface conditioning in plasma processing equipment |
US11637002B2 (en) | 2014-11-26 | 2023-04-25 | Applied Materials, Inc. | Methods and systems to enhance process uniformity |
US9299583B1 (en) | 2014-12-05 | 2016-03-29 | Applied Materials, Inc. | Aluminum oxide selective etch |
US10573496B2 (en) | 2014-12-09 | 2020-02-25 | Applied Materials, Inc. | Direct outlet toroidal plasma source |
US10224210B2 (en) | 2014-12-09 | 2019-03-05 | Applied Materials, Inc. | Plasma processing system with direct outlet toroidal plasma source |
US9502258B2 (en) | 2014-12-23 | 2016-11-22 | Applied Materials, Inc. | Anisotropic gap etch |
US9343272B1 (en) | 2015-01-08 | 2016-05-17 | Applied Materials, Inc. | Self-aligned process |
US11257693B2 (en) | 2015-01-09 | 2022-02-22 | Applied Materials, Inc. | Methods and systems to improve pedestal temperature control |
US9373522B1 (en) | 2015-01-22 | 2016-06-21 | Applied Mateials, Inc. | Titanium nitride removal |
US9449846B2 (en) | 2015-01-28 | 2016-09-20 | Applied Materials, Inc. | Vertical gate separation |
US9728437B2 (en) | 2015-02-03 | 2017-08-08 | Applied Materials, Inc. | High temperature chuck for plasma processing systems |
US20160225652A1 (en) | 2015-02-03 | 2016-08-04 | Applied Materials, Inc. | Low temperature chuck for plasma processing systems |
US9881805B2 (en) | 2015-03-02 | 2018-01-30 | Applied Materials, Inc. | Silicon selective removal |
US9741593B2 (en) | 2015-08-06 | 2017-08-22 | Applied Materials, Inc. | Thermal management systems and methods for wafer processing systems |
US9691645B2 (en) | 2015-08-06 | 2017-06-27 | Applied Materials, Inc. | Bolted wafer chuck thermal management systems and methods for wafer processing systems |
US9349605B1 (en) | 2015-08-07 | 2016-05-24 | Applied Materials, Inc. | Oxide etch selectivity systems and methods |
US10504700B2 (en) | 2015-08-27 | 2019-12-10 | Applied Materials, Inc. | Plasma etching systems and methods with secondary plasma injection |
US10504754B2 (en) | 2016-05-19 | 2019-12-10 | Applied Materials, Inc. | Systems and methods for improved semiconductor etching and component protection |
US10522371B2 (en) | 2016-05-19 | 2019-12-31 | Applied Materials, Inc. | Systems and methods for improved semiconductor etching and component protection |
US9865484B1 (en) | 2016-06-29 | 2018-01-09 | Applied Materials, Inc. | Selective etch using material modification and RF pulsing |
US10062575B2 (en) | 2016-09-09 | 2018-08-28 | Applied Materials, Inc. | Poly directional etch by oxidation |
US10629473B2 (en) | 2016-09-09 | 2020-04-21 | Applied Materials, Inc. | Footing removal for nitride spacer |
US10546729B2 (en) | 2016-10-04 | 2020-01-28 | Applied Materials, Inc. | Dual-channel showerhead with improved profile |
US9721789B1 (en) | 2016-10-04 | 2017-08-01 | Applied Materials, Inc. | Saving ion-damaged spacers |
US9934942B1 (en) | 2016-10-04 | 2018-04-03 | Applied Materials, Inc. | Chamber with flow-through source |
US10062585B2 (en) | 2016-10-04 | 2018-08-28 | Applied Materials, Inc. | Oxygen compatible plasma source |
US10062579B2 (en) | 2016-10-07 | 2018-08-28 | Applied Materials, Inc. | Selective SiN lateral recess |
US9947549B1 (en) | 2016-10-10 | 2018-04-17 | Applied Materials, Inc. | Cobalt-containing material removal |
US9768034B1 (en) | 2016-11-11 | 2017-09-19 | Applied Materials, Inc. | Removal methods for high aspect ratio structures |
US10163696B2 (en) | 2016-11-11 | 2018-12-25 | Applied Materials, Inc. | Selective cobalt removal for bottom up gapfill |
US10242908B2 (en) | 2016-11-14 | 2019-03-26 | Applied Materials, Inc. | Airgap formation with damage-free copper |
US10026621B2 (en) | 2016-11-14 | 2018-07-17 | Applied Materials, Inc. | SiN spacer profile patterning |
US10566206B2 (en) | 2016-12-27 | 2020-02-18 | Applied Materials, Inc. | Systems and methods for anisotropic material breakthrough |
US10403507B2 (en) | 2017-02-03 | 2019-09-03 | Applied Materials, Inc. | Shaped etch profile with oxidation |
US10431429B2 (en) | 2017-02-03 | 2019-10-01 | Applied Materials, Inc. | Systems and methods for radial and azimuthal control of plasma uniformity |
US10043684B1 (en) | 2017-02-06 | 2018-08-07 | Applied Materials, Inc. | Self-limiting atomic thermal etching systems and methods |
US10319739B2 (en) | 2017-02-08 | 2019-06-11 | Applied Materials, Inc. | Accommodating imperfectly aligned memory holes |
US10943834B2 (en) | 2017-03-13 | 2021-03-09 | Applied Materials, Inc. | Replacement contact process |
US10319649B2 (en) | 2017-04-11 | 2019-06-11 | Applied Materials, Inc. | Optical emission spectroscopy (OES) for remote plasma monitoring |
US11276559B2 (en) | 2017-05-17 | 2022-03-15 | Applied Materials, Inc. | Semiconductor processing chamber for multiple precursor flow |
US11276590B2 (en) | 2017-05-17 | 2022-03-15 | Applied Materials, Inc. | Multi-zone semiconductor substrate supports |
US10497579B2 (en) | 2017-05-31 | 2019-12-03 | Applied Materials, Inc. | Water-free etching methods |
US10049891B1 (en) | 2017-05-31 | 2018-08-14 | Applied Materials, Inc. | Selective in situ cobalt residue removal |
US10920320B2 (en) | 2017-06-16 | 2021-02-16 | Applied Materials, Inc. | Plasma health determination in semiconductor substrate processing reactors |
US10541246B2 (en) | 2017-06-26 | 2020-01-21 | Applied Materials, Inc. | 3D flash memory cells which discourage cross-cell electrical tunneling |
US10727080B2 (en) | 2017-07-07 | 2020-07-28 | Applied Materials, Inc. | Tantalum-containing material removal |
US10541184B2 (en) | 2017-07-11 | 2020-01-21 | Applied Materials, Inc. | Optical emission spectroscopic techniques for monitoring etching |
US10354889B2 (en) | 2017-07-17 | 2019-07-16 | Applied Materials, Inc. | Non-halogen etching of silicon-containing materials |
US10043674B1 (en) | 2017-08-04 | 2018-08-07 | Applied Materials, Inc. | Germanium etching systems and methods |
US10170336B1 (en) | 2017-08-04 | 2019-01-01 | Applied Materials, Inc. | Methods for anisotropic control of selective silicon removal |
US10297458B2 (en) | 2017-08-07 | 2019-05-21 | Applied Materials, Inc. | Process window widening using coated parts in plasma etch processes |
US10283324B1 (en) | 2017-10-24 | 2019-05-07 | Applied Materials, Inc. | Oxygen treatment for nitride etching |
US10128086B1 (en) | 2017-10-24 | 2018-11-13 | Applied Materials, Inc. | Silicon pretreatment for nitride removal |
US10256112B1 (en) | 2017-12-08 | 2019-04-09 | Applied Materials, Inc. | Selective tungsten removal |
US10903054B2 (en) | 2017-12-19 | 2021-01-26 | Applied Materials, Inc. | Multi-zone gas distribution systems and methods |
US11328909B2 (en) | 2017-12-22 | 2022-05-10 | Applied Materials, Inc. | Chamber conditioning and removal processes |
US10854426B2 (en) | 2018-01-08 | 2020-12-01 | Applied Materials, Inc. | Metal recess for semiconductor structures |
US10679870B2 (en) | 2018-02-15 | 2020-06-09 | Applied Materials, Inc. | Semiconductor processing chamber multistage mixing apparatus |
US10964512B2 (en) | 2018-02-15 | 2021-03-30 | Applied Materials, Inc. | Semiconductor processing chamber multistage mixing apparatus and methods |
TWI716818B (zh) | 2018-02-28 | 2021-01-21 | 美商應用材料股份有限公司 | 形成氣隙的系統及方法 |
US10593560B2 (en) | 2018-03-01 | 2020-03-17 | Applied Materials, Inc. | Magnetic induction plasma source for semiconductor processes and equipment |
US10319600B1 (en) | 2018-03-12 | 2019-06-11 | Applied Materials, Inc. | Thermal silicon etch |
US10497573B2 (en) | 2018-03-13 | 2019-12-03 | Applied Materials, Inc. | Selective atomic layer etching of semiconductor materials |
US10573527B2 (en) | 2018-04-06 | 2020-02-25 | Applied Materials, Inc. | Gas-phase selective etching systems and methods |
US10490406B2 (en) | 2018-04-10 | 2019-11-26 | Appled Materials, Inc. | Systems and methods for material breakthrough |
US10699879B2 (en) | 2018-04-17 | 2020-06-30 | Applied Materials, Inc. | Two piece electrode assembly with gap for plasma control |
US10886137B2 (en) | 2018-04-30 | 2021-01-05 | Applied Materials, Inc. | Selective nitride removal |
US10755941B2 (en) | 2018-07-06 | 2020-08-25 | Applied Materials, Inc. | Self-limiting selective etching systems and methods |
US10872778B2 (en) | 2018-07-06 | 2020-12-22 | Applied Materials, Inc. | Systems and methods utilizing solid-phase etchants |
US10672642B2 (en) | 2018-07-24 | 2020-06-02 | Applied Materials, Inc. | Systems and methods for pedestal configuration |
US10892198B2 (en) | 2018-09-14 | 2021-01-12 | Applied Materials, Inc. | Systems and methods for improved performance in semiconductor processing |
US11049755B2 (en) | 2018-09-14 | 2021-06-29 | Applied Materials, Inc. | Semiconductor substrate supports with embedded RF shield |
US11062887B2 (en) | 2018-09-17 | 2021-07-13 | Applied Materials, Inc. | High temperature RF heater pedestals |
US11417534B2 (en) | 2018-09-21 | 2022-08-16 | Applied Materials, Inc. | Selective material removal |
US11682560B2 (en) | 2018-10-11 | 2023-06-20 | Applied Materials, Inc. | Systems and methods for hafnium-containing film removal |
US11121002B2 (en) | 2018-10-24 | 2021-09-14 | Applied Materials, Inc. | Systems and methods for etching metals and metal derivatives |
US11437242B2 (en) | 2018-11-27 | 2022-09-06 | Applied Materials, Inc. | Selective removal of silicon-containing materials |
US11721527B2 (en) | 2019-01-07 | 2023-08-08 | Applied Materials, Inc. | Processing chamber mixing systems |
US10920319B2 (en) | 2019-01-11 | 2021-02-16 | Applied Materials, Inc. | Ceramic showerheads with conductive electrodes |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2570844B1 (fr) * | 1984-09-21 | 1986-11-14 | Commissariat Energie Atomique | Film photosensible a base de polymere silicie et son utilisation comme resine de masquage dans un procede de lithographie |
US4818715A (en) * | 1987-07-09 | 1989-04-04 | Industrial Technology Research Institute | Method of fabricating a LDDFET with self-aligned silicide |
US5650220A (en) * | 1995-05-26 | 1997-07-22 | Owens-Corning Fiberglas Technology, Inc. | Formable reinforcing bar and method for making same |
US5843226A (en) * | 1996-07-16 | 1998-12-01 | Applied Materials, Inc. | Etch process for single crystal silicon |
TW350122B (en) * | 1997-02-14 | 1999-01-11 | Winbond Electronics Corp | Method of forming a shallow groove |
US5807789A (en) * | 1997-03-20 | 1998-09-15 | Taiwan Semiconductor Manufacturing, Co., Ltd. | Method for forming a shallow trench with tapered profile and round corners for the application of shallow trench isolation (STI) |
US5726090A (en) * | 1997-05-01 | 1998-03-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Gap-filling of O3 -TEOS for shallow trench isolation |
US6090304A (en) * | 1997-08-28 | 2000-07-18 | Lam Research Corporation | Methods for selective plasma etch |
US5801083A (en) * | 1997-10-20 | 1998-09-01 | Chartered Semiconductor Manufacturing, Ltd. | Use of polymer spacers for the fabrication of shallow trench isolation regions with rounded top corners |
US6069091A (en) * | 1997-12-29 | 2000-05-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | In-situ sequential silicon containing hard mask layer/silicon layer plasma etch method |
US6008104A (en) * | 1998-04-06 | 1999-12-28 | Siemens Aktiengesellschaft | Method of fabricating a trench capacitor with a deposited isolation collar |
US6077742A (en) * | 1998-04-24 | 2000-06-20 | Vanguard International Semiconductor Corporation | Method for making dynamic random access memory (DRAM) cells having zigzag-shaped stacked capacitors with increased capacitance |
US6287974B1 (en) * | 1999-06-30 | 2001-09-11 | Lam Research Corporation | Method of achieving top rounding and uniform etch depths while etching shallow trench isolation features |
US6218309B1 (en) * | 1999-06-30 | 2001-04-17 | Lam Research Corporation | Method of achieving top rounding and uniform etch depths while etching shallow trench isolation features |
US6830977B1 (en) * | 2000-08-31 | 2004-12-14 | Micron Technology, Inc. | Methods of forming an isolation trench in a semiconductor, methods of forming an isolation trench in a surface of a silicon wafer, methods of forming an isolation trench-isolated transistor, trench-isolated transistor, trench isolation structures formed in a semiconductor, memory cells and drams |
US6589879B2 (en) * | 2001-01-18 | 2003-07-08 | Applied Materials, Inc. | Nitride open etch process based on trifluoromethane and sulfur hexafluoride |
US6500727B1 (en) * | 2001-09-21 | 2002-12-31 | Taiwan Semiconductor Manufacturing Company | Silicon shallow trench etching with round top corner by photoresist-free process |
US6579801B1 (en) * | 2001-11-30 | 2003-06-17 | Advanced Micro Devices, Inc. | Method for enhancing shallow trench top corner rounding using endpoint control of nitride layer etch process with appropriate etch front |
-
2004
- 2004-08-26 US US10/925,921 patent/US20060043066A1/en not_active Abandoned
-
2005
- 2005-08-23 TW TW094128774A patent/TW200620456A/zh unknown
- 2005-08-26 CN CN200510119901.3A patent/CN1790626A/zh active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102148184A (zh) * | 2011-03-15 | 2011-08-10 | 上海宏力半导体制造有限公司 | 改善浅沟槽隔离侧壁粗糙度的方法 |
CN114171605A (zh) * | 2021-12-03 | 2022-03-11 | 杭州赛晶电子有限公司 | 一种p型杂质扩散结屏蔽栅硅二极管的制造方法 |
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