CN1685774A - 具有静电损伤限制特性的柔性电路 - Google Patents
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Abstract
一种结合静电电荷放电限制特性的柔性电路(10),所述电路包括一个选自聚酰亚胺或者液晶聚合体薄膜的介质基片,在介质基片的至少一个表面上至少具有一个镀覆的导电线路(30);所述放电限制特性包括一个选择性涂覆在至少所述电路的部分非关键性区域上的薄的导电聚合体涂层(60),所述特性将电路的表面电阻率减小至在大约104欧姆至大约108欧姆,以及所具有的摩擦电荷小于约50V。
Description
发明背景
微柔性电路广泛地应用于诸如集成电路(IC)、插件板、喷墨盒、硬盘驱动器(HDD)、医用仪器以及其它先进的基于柔性电路的电连接。这类连接在制造和装配包括绝缘材料(塑料,聚合体)的产品和人工操作的过程中需要静电放电(ESD)保护。ESD所关心的问题是在硬盘制造环境和应用中更为凸显,特别是对于在滑动触点中使用较大磁致读取(GMR)传感器的磁头万向组件。目前商品化的硬盘驱动器(HDD)生产平台是在40至60兆比特/英寸2[(GB)/in2],需要静电放电保护来保护这些敏感的读取磁头。ESD的要求可以根据在所有输入部件和接近处理/装配工作台所控制的表面电阻率和摩擦电荷(tribocharge)电压来指定。许多HDD生产商技术规格表明表面电阻率的指标应该较佳地控制在从大约104欧姆至大约108欧姆的范围内,并且有摩擦电荷所产生的最大表面电压必须小于10伏(V)。
根据最新HGA技术的发展路线图,未来HDD的规划是在80至100GB/盘或者更高,并且对包括适用于悬浮弯曲(FOS)的柔性电路的输入部件还将具有更加严格的ESD要求(摩擦电荷小于5V)。微驱动器程序、复杂的滑动触点结构和其它基于悬浮的电气连接和附着也都需要良好控制的ESD。由ESD所引发的损坏占了在HDD产业中的大部分HGA产量的损耗,这明显地影响着整个产业的利益。因此,对于HDD产业来说,控制ESD的能力是十分重要的。
在美国专利(序列号No.09/823,220)中,该申请将薄的、狭窄条状的导电成分涂覆在至少两个柔性电路的导电元件之间,以减小静电电荷的积累以及平衡在所有导电引线之间的电势。这一申请也披露了在保护覆盖层之下所设置的导电聚合体层可以使得最终的FOS电路能够通过HDD行业的严格离子污染测试。
然而,现在已经发现具有在非关键性区域的柔性电路部分上涂覆薄的导电聚合体涂层的柔性电路可充分地减小测得的表面电压。
发明内容
本发明是一种柔性电路,该电路结合静电电荷(ESD)限制特性并且设计用于计算机所应用的硬盘驱动器的制造。
根据本发明的一个实施例,为了减小可测量表面电压,可以将薄的导电聚合体涂层涂覆在非关键性区域中的部分柔性电路,通过在所涂覆表面上由摩擦电荷引起的电荷能够流动,使得当导电接地的探头接触时受影响的区域可以较快地放电。导电层因为它固有的电阻率,限制了放电的速率。如果涂层是与导电聚合体带相接触的,则所产生的电荷也会通过与所涂覆的非关键性表面接触的探头放电。最终的电路具有所附加的ESD保护,因为通过电荷一旦建立就立即开始放电使得导电表面能够对在其表面上所形成的任何电荷进行放电,因此,通过使能够和控制电压电平的衰减来降低表面的峰值电压。由于当能量是通过敏感的GMR传感器耦合时损坏GMR磁头的现有能量是与电压电平成正比的,所以总的能量就要减小。
薄的导电薄膜将会明显减小绝缘材料的表面电阻率,可以从大约1011欧姆至1014欧姆的范围减小至大约104欧姆至108欧姆的范围。
正如这里所使用的,这些术语可以具有下列含意:
(1)术语“非关键性区域”是指在电路的驱动器柔性键合区域和万向节区域之间的电路的区域。这是通常在装配过程中用于手持的部分。
(2)术语“层间材料”和“中间层”是指一层材料,例如,设置在电路下面的松弛衬垫材料,可用于通过并合将柔性电路带转移到印刷机构。
附图的简要说明
图1是在硬盘驱动器中所使用的柔性电路的剖面图,它具有根据本发明设置在电路非关键性区域中的导电聚合体薄膜层的特征。
图2是实现本发明方法的示意图。
图3显示了一例已经涂覆在柔性电路带之间的印刷图形的实例。
图4显示了在电路表面电阻率与在导电聚合体成分中NMP百分比之间的关系。
图5显示了在电路表面电阻率与涂覆导电聚合体成分之前使用等离子体处理步骤之间的关系。
具体实施方法
本发明是一种柔性电路10,它结合了静电放电(ESD)限制特性,正如图1所示,并且设计用于硬盘驱动器的制造中。典型的是,HGA是采用手工装配的。在这种操作过程中,当采用非接地的探头,工具或夹具来接触绝缘、保护的涂层,或者接触诸如橡胶垫之类的其它介质材料时,就会在柔性电路的表面上产生静电电荷。根据本发明的一个实施例,薄的导电聚合体涂层60涂覆在非关键性区域50中的部分柔性电路10上。非关键性区域是在电路70的驱动器柔性键合区域20和万向节区域之间的电路区域。这是通常在装配过程中用于手持的部分。导电聚合体涂层可以涂覆在选择性沉积保护涂层40的上面。由导电聚合体涂层所形成的导电薄膜层可以明显减小材料的表面电阻率,可以从大约1011欧姆至1014欧姆的范围减小至大约104欧姆至108欧姆的范围。在本实施例中,为了保护电路表面免受ESD,导电聚合体的涂层不一定要接触导电的引线。
导电聚合体成分可以采用一滚筒至滚筒的印刷工艺连续涂覆,以形成薄的导电聚合体薄膜元件,其最终的固化厚度在大约0.2微米至大约25微米的范围内,较佳的是在大约0.5微米至大约5微米的范围内,它可以涂覆在各种绝缘材料上,例如,聚合体薄膜、塑料表面、陶瓷、玻璃、纤维,以及特别是涂覆在柔性电路上。柔性电路可以是聚酰亚胺也可以是液晶聚合体的介质基片,在介质基片的至少一个表面上至少具有一个导电线路。该导电线路可以通过将光刻胶涂覆在介质基片的至少一个表面上,采用所需要的电路图形对光刻胶进行图形化,以及采用诸如铜、镍、金之类金属对所述电路图形进行附加电镀的方法来形成的。另外,也可以采用减法形成电路的方法来创建柔性电路。可以采用诸如化学蚀刻、激光消融、机械打孔以及其它等等方法在介质薄膜中形成穿孔、盲孔、窗口、介质基片的压紧或者更薄的区域以及其它等等之类的特性。在形成电路之后,保护性聚合体成分可以选择性的涂覆也可以整体性的涂覆在电路上。导电聚合体成分可以随后涂覆在该保护性涂层表面上。
本发明特别涉及一种适用于HGA部件的柔性电路,该HGA部件的表面电阻率在大约104欧姆至108欧姆的范围内,以及根据导电聚合体薄膜涂层的表面电阻率,摩擦电荷小于50V,更佳的是小于15V。
实例
较佳的导电聚合体成分包括导电聚合体、非离子型粘结材料、润湿剂和薄膜生成元素的混合物。
一种较佳的导电聚合体是一种具有由拜耳公司(Bayer Corporation ofPittsburgh,PA)出品、商标为BaytronTMP-LS的混合聚苯乙烯磺酸盐(polystyrene sulfonate)的聚-3-4-二氧乙烯噻吩(Poly-3-4-ethylenedioxythiophene)的水性扩散剂,它具有低残余离子容量。所提供的导电聚合体悬浮液具有大约为1%至4%的固体按重量计。
一种较佳的非离子粘结材料是Rhoplex HA-16,这是一种由Rohm和Haas公司(Rohm and Haas Company of Philadelphia,PA)出品的自交联丙烯酸粘结剂。
一种较佳的润湿剂是由Dupont化学公司(Dupont Chemical Company,Wilmington,DE)出品的ZonylFSN。其化学结构为“RfCH2CH2O(CH2CH2O)xH”,式中Rf=F(CF2CF2)y,其中,X=0至大约25,以及Y=1至大约9。润湿剂可用于以非常低的浓度来改变表面能量,并且兼容于大多数基于水性或溶剂的溶液。一般,润滑剂添加的浓度在大约0.1%至大约0.5%的范围内,按重量计。
较佳的添加剂是1-methyl-2-pyrolidone(NMP)。NMP的功能是便于从导电聚合体链的主要架构中释放更多的“自由离子”,以增加导电性。导电性改善的程度主要取决于所添加的NMP的数量。所添加的NMP在大约2%至大约8%的范围内,按重量计,并且更佳的是在大约2%至大约4%的范围内,按重量计。
导电聚合体成分可以通过上述成分的组合来制成。特别是,提供的10%至90%导电聚合体扩散剂(Baytron P-LS),在该扩散剂中已混入所选用的润滑剂。该扩散剂可以90%至10%丙烯酸乳状液(RHOPLEX HA-16)和2%至8%NMP的混合物来组合。随后,最终混合物的ph值可以通过添加大约0.1%至1%的50%铵氢氧化物(NH4OH)溶液从大约3.0调整至大约7.0和8.5的范围内。表1显示了一组说明的实例。
表1
适用于导电聚合体成分和最终导电聚合体薄膜性能的典型公式
实例1.1 | 实例1.2 | 实例1.3 | 实例1.4 | 实例1.5 | |
BAYTRON P-LS | 90wt.% | 88.2wt.% | 86.4wt.% | 82.8wt.% | 72wt.% |
RHOPLEX HA-16 | 10wt.% | 9.8wt.% | 9.6wt.% | 9.2wt.% | 8wt.% |
NMP | 0 | 2wt.% | 4wt.% | 8wt.% | 20wt.% |
摩擦电荷 | 10-50V | 10-30V | 5-15V | <10V | <10V |
注意:所有的导电聚合体成分都包含0.1%-0.3%的ZonylFSN。
导电聚合体成分可以采用一滚筒至滚筒的铺垫印刷系统涂覆在FOS线路的非关键性区域,铺垫印刷系统包括一个能够处理从大约70mm至大约300mm宽,较佳的是70mm宽的带的自动薄带处理系统,一个印刷台和一个干燥台。该系统的结构和装配如图2所示。在保护性涂层涂覆之前或之后,通过移出带处理设备和把印刷台插入到柔性线路生产线中该处理工艺可与FOS电路制造予以集成或者此工艺在具有保护涂层的柔性电路的最终带方面用作为单独的工艺。
在铺垫印刷处理工艺中,纸质衬垫或聚合体衬垫可以放在微柔性带的下面,这样可以具有防止墨水流到和扩散到不需要的区域。下带的放置容差可以由链轮齿孔(图3所示的320)控制,该孔设置在柔性电路带300的一侧上,并且可以在下带中以32间距累计误差为+/-0.254mm的方式表示。相交的带印刷的容差有时取决于涂覆的电路,但是通常为大约40密尔。
自动带处理系统能够处理从大约70mm到大约300mm宽的带,较佳的是,70mm宽的带,它包括在印刷台220之前的带放开台205,以及在烘箱245之后的带收卷台260。放松台可以容纳下两滚筒的材料,即,柔性电路215的带材和一滚筒的中间层材料210。中间层材料的目的是有助于在溶剂蒸发之前包含导电聚合体成分。中间层的宽度基本上与柔性电路带的宽度相同。通过控制支配到所传递的电路表面和区域上的导电聚合体成分数量,中间层可以起到允许电路的背面也可以涂覆的附加作用,从而对电路提供其它ESD的保护。通常,柔性电路是通过介质基片来开孔的,以便于分离各个部分。通过控制导电聚合体成分的数量,通过在柔性电路介质基片和中间层材料之间的这些开孔和毛细孔可以将材料涂覆在背面上。中间层材料可以选自一组包含凸状中间层、释放衬底或者Teflon中间层的材料。中间层是由滚筒210放开。随后,通过柔性电路滚筒,该带以方向v和相同速度馈出这些滚筒。几个惰轮用于保持薄膜的适当带的弹性。随后,在中间层上的柔性电路带进入到印刷台220。
导电聚合体成分涂覆在柔性电路带上的HDD电路的非关键性区域。涂覆方法可以使诸如丝网印刷或者衬垫印刷之类的转移印刷技术。举例来说,如图2所示的印刷台就是一个衬垫印刷台。当柔性电路材料215先进入印刷台时,印刷头230装载着导电聚合体成分并且随之压印在通过的带上。印刷头230设计成可以将导电聚合体成分沉积在HDD电路的非关键性区域上且横跨带的整个宽度(见图3)。该步骤可以规定的间距重复,使得沿着带长度纵向位置上的HDD电路的各行都可以采用类似的方式压印。一滚筒吸收纸可以结合印刷台使用,正如图2所示,以便于在溶剂蒸发之前所包含的导电聚合体成分能够保持清洁所需的程度。
在印刷之后,柔性电路材料进入到至少一个烘箱中。多余的溶剂可以烘干,并且粘结树脂在烘箱中交联。较佳的烘箱结构允许进行蒸发溶剂的预焙烘步骤和交联树脂和去除任何残剩溶剂的焙烘步骤。烘箱的预焙烘区域可设置在大约40℃至大约90℃的温度范围内。在预焙烘的电路已经饶上上绕台之后,可以在第二个烘箱中进行在线或者离线的最后焙烘步骤,未示出。最后的焙烘温度可以设置在在大约120℃至大约180℃范围内。烘箱可以是红外烘箱,也可以是强风对流烘箱。
作为衬垫印刷处理工艺,很重要的是导电聚合体薄膜在涂覆表面或在裸露聚酰亚胺基片上的均匀性。这些表面一般都具有较低的表面能量,其范围在大约28dyne/cm至大约39dyne/cm。表面能量可以使用包含Sherman Treaters(UK)公司出品的标准表面张力溶剂的记号笔来确定。
使用电子显微镜技术,可以确定导电聚合体薄膜的厚度分布范围为大约0.2微米至大约5微米。可以采用增加涂层或者聚酰亚胺上的表面能量的方式来检测各种常规的表面处理技术步骤,这同样应该改善粘结和薄膜的均匀性。令人惊讶的是,表面阻力的测量显示,与没有采用等离子体处理的表面相比较,等离子体刻蚀提高薄膜的导电性至少10倍。电晕处理应该可以产生类似或者更好的效果。
在电路上涂覆导电聚合体配方之前进行等离子体处理。可以使用混合的气体等离子体,包括氩气、氮气和氧气。在温度大约120℃时,带的速度可设置为大约3mpm。
涂层的厚度可以变化,通过单次、两次或甚至更多次印刷来增加薄膜的厚度,以及它的导电性。
表面阻力测量可以在单一电路表面上或者在表面上具有导电聚合体薄膜的其它薄膜表面上进行。该测量可以使用具有HRS环状探头的Hiresta UP MCP-HT260电阻仪(Mitsubishi Chemical,Tokyo,Japan)来进行。
HGA的ESD敏感性与这部分的可放电能量有关,这可以通过读/写磁头的GMR元件来指导。如果柔性电路的介质表面与其它介质或者没有接地的导电材料相接触,在不同的材料分开时,就会建立瞬时电压电势,因为存在着来自表面的多余正电荷或负电荷。如果表面具有高的电阻率,该电荷就会保持着,不会释放或者放泄。如果材料是导电的,则电荷将会扩散和形成中性电荷(衰减)。对于电路来说,通常需要好的介质材料,使得摩擦电荷效应变得非常一般。
电压电平直接与电路表面上的电荷点/单元区域的数量有关。一种直接测量表面电压的方法是使用Isoprobe静电电压表-Model 244A(MonroeElectronics,Lyndonville,New York)。对于高阻表面,可以测量这部分的峰值电压或者电压范围,以确定表面处理是否减小了所测得的电压电平。
图4显示在电路的表面电阻率和导电聚合体成分中的NMP百分比之间的关系,其中导电聚合体成分来自于对于给定厚度的导电聚合体薄膜在表1所示的实例。该导电性可以通过涂覆较厚的薄膜进一步增加。
图5显示在电路的表面电阻率和在涂覆导电聚合体成分之前使用等离子体处理步骤之间的关系。预处理电路的表面电阻与没有进行预处理的电路以及没有ESD保护的导电薄膜层的电路相比较。
Claims (16)
1.一种结合静电电荷放电限制特性的柔性电路,其特征在于,所述电路包括一个选自聚酰亚胺组或者液晶聚合体薄膜的介质基片,在介质基片的至少一个表面上具有至少一个镀覆的导电线路;所述放电限制特性包括一个选择性涂覆在至少所述电路的部分非关键性区域上的薄的导电聚合体涂层,所述特性将电路的表面电阻率减小至在大约104欧姆至108欧姆,以及所具有的摩擦电荷小于约50V。
2.根据权利要求1所述柔性电路,其特征在于,所述导电聚合体涂层包括至少1.3重量百分比导电聚合体的大约10至90重量百分比的水性扩散剂,大约4.5重量百分比的非离子自交联丙烯酸粘结树脂的大约10至大约90重量百分比的水性乳状液,,以及大约50重量百分比的氢氧化铵的0.1至1重量百分比的水性溶剂。
3.根据权利要求2所述柔性电路,其特征在于,所述放电限制特性包括聚-3-4-二氧乙烯噻吩(Poly-3-4-ethylenedioxythiophene)和聚苯乙烯磺酸盐(polystyrene sulfonate)的混合物,其中水性扩散剂含有从大约2%至大约3%的导电聚合体。
4.根据权利要求1所述柔性电路,其特征在于,所述导电聚合体是对可见光谱基本透明的。
5.根据权利要求1所述柔性电路,其特征在于,进一步包括在所述的电路线路上的选择性沉积的保护涂层,所述导电聚合体涂层是涂覆在其上面。
6.根据权利要求1所述柔性电路,其特征在于,所述电路线路是通过将光刻胶涂覆在所述介质基片的至少一个表面上,采用所述电路图形对光刻胶进行图形化,以及采用选自包含铜、镍和金之类导电金属对所述电路图形进行附加电镀的方法来形成。
7.根据权利要求1所述柔性电路,其特征在于,进一步包括至少一个特性选自包括在所述介质基片中所形成的穿孔、盲孔、窗口和缺口的组。
8.根据权利要求1所述柔性电路,其特征在于,所述摩擦电荷小于15V。
9.根据权利要求1所述柔性电路,其特征在于,所述摩擦电荷小于10V。
10.一种适用于形成结合静电放电限制特性的柔性电路的装置,其特征在于,所述该电路包括一个介质基片,所述介质基片在至少其一个表面上至少具有一条镀覆的导电线路,以及一个选择性涂覆在至少所述电路的部分非关键性区域上的薄的导电聚合体涂层,所述涂层可以采用自动带处理系统来形成,所述自动带处理系统能够处理宽度从大约70mm至大约300mm宽的带,并且包括一个在印刷台之前的带放开台,一个烘箱和一个在烘箱之后的带收卷台,所述带放开台具有用于柔性电路滚筒和一个中间层滚筒两者的滚筒。
11.一种适用于选择性形成薄的导电聚合体涂层的连续一滚筒至滚筒的印刷处理工艺,所述导电聚合体涂层涂覆在多个柔性电路中的至少部分非关键性区域,其特征在于,所述处理工艺包括:
提供一滚筒的中间层材料和一滚筒的柔性电路,所述柔性电路具有多个以行定位在滚筒横向宽度上的电路,以及多个沿着滚筒的纵向定位的行,从滚筒上放开中间层材料至带上,以带方向和所设定的速度来移动带和中间层材料通过柔性电路的滚筒,以带方向和相同速度将柔性电路从滚筒中馈出,同时籍助于多个惰轮来保持带的弹性,将带移进印刷台,籍助于转移印刷技术以横跨一行柔性电路的方式将导电聚合体成分涂覆在所述柔性电路中的至少部分非关键性区域,以带方向将带移动一个规定的间距,在柔性电路的相邻行上重复印刷步骤,印刷步骤重复规定间距,从而印刷各行,以及将带移进干燥烘箱。
12.根据权利要求11所述处理,其特征在于,进一步包括在印刷步骤之前的等离子体处理步骤。
13.根据权利要求12所述处理,其特征在于,使用一种混合气体等离子体,混合气体包括氩气、氮气和氧气。
14.根据权利要求11所述处理,其特征在于,进一步包括在印刷步骤之前的电晕处理。
15.根据权利要求11所述处理,其特征在于,对所述各个电路进行多次涂覆步骤。
16.根据权利要求11所述处理,其特征在于,多余的导电聚合体成分涂覆在电路带上,以致多余部分流动通过在带中的开孔以及在中间层材料和电路带之间的毛细孔也以薄层导电聚合体涂覆所述介质基片的背面。
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US (2) | US6815620B2 (zh) |
JP (1) | JP2006500782A (zh) |
CN (1) | CN1685774A (zh) |
AU (1) | AU2003263041A1 (zh) |
WO (1) | WO2004030427A1 (zh) |
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CN101202212B (zh) * | 2006-12-11 | 2011-03-23 | 爱德牌工程有限公司 | 基片损伤防止系统和方法 |
CN104078055A (zh) * | 2013-03-29 | 2014-10-01 | 东莞新科技术研究开发有限公司 | 挠性件及其制造方法、磁头折片组合以及磁盘驱动器 |
CN113271719A (zh) * | 2021-06-23 | 2021-08-17 | 昆山丘钛生物识别科技有限公司 | 柔性电路板处理方法、装置及设备 |
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JP4386863B2 (ja) * | 2005-02-21 | 2009-12-16 | 日本発條株式会社 | ヘッド・サスペンション |
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JP4571013B2 (ja) * | 2005-05-30 | 2010-10-27 | 日東電工株式会社 | 配線回路基板 |
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JP5138549B2 (ja) | 2008-10-31 | 2013-02-06 | 日東電工株式会社 | 回路付サスペンション基板 |
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-
2002
- 2002-09-26 US US10/255,507 patent/US6815620B2/en not_active Expired - Fee Related
-
2003
- 2003-08-29 AU AU2003263041A patent/AU2003263041A1/en not_active Abandoned
- 2003-08-29 JP JP2004540039A patent/JP2006500782A/ja not_active Withdrawn
- 2003-08-29 WO PCT/US2003/027362 patent/WO2004030427A1/en active Application Filing
- 2003-08-29 CN CNA038227762A patent/CN1685774A/zh active Pending
-
2004
- 2004-07-22 US US10/897,139 patent/US7135203B2/en not_active Expired - Fee Related
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101202212B (zh) * | 2006-12-11 | 2011-03-23 | 爱德牌工程有限公司 | 基片损伤防止系统和方法 |
CN104078055A (zh) * | 2013-03-29 | 2014-10-01 | 东莞新科技术研究开发有限公司 | 挠性件及其制造方法、磁头折片组合以及磁盘驱动器 |
CN104078055B (zh) * | 2013-03-29 | 2018-10-26 | 东莞新科技术研究开发有限公司 | 挠性件及其制造方法、磁头折片组合以及磁盘驱动器 |
CN113271719A (zh) * | 2021-06-23 | 2021-08-17 | 昆山丘钛生物识别科技有限公司 | 柔性电路板处理方法、装置及设备 |
CN113271719B (zh) * | 2021-06-23 | 2022-07-08 | 昆山丘钛生物识别科技有限公司 | 柔性电路板处理方法、装置及设备 |
Also Published As
Publication number | Publication date |
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US20030062194A1 (en) | 2003-04-03 |
US6815620B2 (en) | 2004-11-09 |
US20040257729A1 (en) | 2004-12-23 |
AU2003263041A1 (en) | 2004-04-19 |
JP2006500782A (ja) | 2006-01-05 |
US7135203B2 (en) | 2006-11-14 |
WO2004030427A1 (en) | 2004-04-08 |
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